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-rw-r--r--host/include/uhd/rfnoc/blocks/axi_ram_fifo_2x64.yml67
-rw-r--r--host/include/uhd/rfnoc/blocks/axi_ram_fifo_4x64.yml87
-rw-r--r--host/include/uhd/rfnoc/blocks/radio_1x64.yml66
-rw-r--r--host/include/uhd/rfnoc/blocks/radio_2x64.yml81
4 files changed, 0 insertions, 301 deletions
diff --git a/host/include/uhd/rfnoc/blocks/axi_ram_fifo_2x64.yml b/host/include/uhd/rfnoc/blocks/axi_ram_fifo_2x64.yml
deleted file mode 100644
index a9659c964..000000000
--- a/host/include/uhd/rfnoc/blocks/axi_ram_fifo_2x64.yml
+++ /dev/null
@@ -1,67 +0,0 @@
-schema: rfnoc_modtool_args
-module_name: axi_ram_fifo
-version: "1.0"
-rfnoc_version: "1.0"
-chdr_width: 64
-noc_id: 0xF1F00000
-
-parameters:
- NUM_PORTS: 2
- MEM_DATA_W: 64
- MEM_ADDR_W: 30
- FIFO_ADDR_BASE: "{30'h02000000, 30'h00000000}"
- FIFO_ADDR_MASK: "{30'h01FFFFFF, 30'h01FFFFFF}"
- MEM_CLK_RATE: "300e6"
-
-clocks:
- - name: rfnoc_chdr
- freq: "[]"
- - name: rfnoc_ctrl
- freq: "[]"
- - name: mem
- freq: "[]"
-
-control:
- fpga_iface: ctrlport
- interface_direction: slave
- fifo_depth: 32
- clk_domain: mem
- ctrlport:
- byte_mode: False
- timed: False
- has_status: False
-
-data:
- fpga_iface: axis_chdr
- clk_domain: mem
- inputs:
- in_0:
- item_width: 32
- nipc: 2
- format: int32
- mdata_sig: ~
- in_1:
- item_width: 32
- nipc: 2
- format: int32
- mdata_sig: ~
- outputs:
- out_0:
- item_width: 32
- nipc: 2
- format: int32
- mdata_sig: ~
- out_1:
- item_width: 32
- nipc: 2
- format: int32
- mdata_sig: ~
-
-io_ports:
- axi_ram:
- type: axi4_mm
- drive: master
-
-registers:
-
-properties:
diff --git a/host/include/uhd/rfnoc/blocks/axi_ram_fifo_4x64.yml b/host/include/uhd/rfnoc/blocks/axi_ram_fifo_4x64.yml
deleted file mode 100644
index cfae2e88e..000000000
--- a/host/include/uhd/rfnoc/blocks/axi_ram_fifo_4x64.yml
+++ /dev/null
@@ -1,87 +0,0 @@
-schema: rfnoc_modtool_args
-module_name: axi_ram_fifo
-version: "1.0"
-rfnoc_version: "1.0"
-chdr_width: 64
-noc_id: 0xF1F00000
-
-parameters:
- NUM_PORTS: 4
- MEM_DATA_W: 64
- MEM_ADDR_W: 32
- FIFO_ADDR_BASE: "{32'hC0000000, 32'h80000000, 32'h40000000, 32'h00000000}"
- FIFO_ADDR_MASK: "{32'h3FFFFFFF, 32'h3FFFFFFF, 32'h3FFFFFFF, 32'h3FFFFFFF}"
- MEM_CLK_RATE: "300e6"
-
-clocks:
- - name: rfnoc_chdr
- freq: "[]"
- - name: rfnoc_ctrl
- freq: "[]"
- - name: mem
- freq: "[]"
-
-control:
- fpga_iface: ctrlport
- interface_direction: slave
- fifo_depth: 32
- clk_domain: mem
- ctrlport:
- byte_mode: False
- timed: False
- has_status: False
-
-data:
- fpga_iface: axis_chdr
- clk_domain: mem
- inputs:
- in_0:
- item_width: 32
- nipc: 2
- format: int32
- mdata_sig: ~
- in_1:
- item_width: 32
- nipc: 2
- format: int32
- mdata_sig: ~
- in_2:
- item_width: 32
- nipc: 2
- format: int32
- mdata_sig: ~
- in_3:
- item_width: 32
- nipc: 2
- format: int32
- mdata_sig: ~
- outputs:
- out_0:
- item_width: 32
- nipc: 2
- format: int32
- mdata_sig: ~
- out_1:
- item_width: 32
- nipc: 2
- format: int32
- mdata_sig: ~
- out_2:
- item_width: 32
- nipc: 2
- format: int32
- mdata_sig: ~
- out_3:
- item_width: 32
- nipc: 2
- format: int32
- mdata_sig: ~
-
-io_ports:
- axi_ram:
- type: axi4_mm
- drive: master
-
-registers:
-
-properties:
diff --git a/host/include/uhd/rfnoc/blocks/radio_1x64.yml b/host/include/uhd/rfnoc/blocks/radio_1x64.yml
deleted file mode 100644
index 50b463a8d..000000000
--- a/host/include/uhd/rfnoc/blocks/radio_1x64.yml
+++ /dev/null
@@ -1,66 +0,0 @@
-schema: rfnoc_modtool_args
-module_name: radio
-version: "1.0"
-rfnoc_version: "1.0"
-chdr_width: 64
-noc_id: 0x12AD1000
-
-parameters:
- NUM_PORTS: 1
-
-clocks:
- - name: rfnoc_chdr
- freq: "[]"
- - name: rfnoc_ctrl
- freq: "[]"
- - name: radio
- freq: "[]"
-
-control:
- fpga_iface: ctrlport
- interface_direction: remote_master_slave
- fifo_depth: 512
- clk_domain: radio
- ctrlport:
- byte_mode: True
- timed: True
- has_status: True
-
-data:
- fpga_iface: axis_data
- clk_domain: radio
- inputs:
- in_0:
- item_width: 32
- nipc: 1
- info_fifo_depth: 32
- payload_fifo_depth: 2**MTU
- format: sc16
- mdata_sig: ~
- outputs:
- out_0:
- item_width: 32
- nipc: 1
- info_fifo_depth: 32
- payload_fifo_depth: 2**(MTU+1)
- sideband_at_end: True
- format: sc16
- mdata_sig: ~
-
-io_ports:
- ctrl_port:
- type: ctrl_port
- drive: master
- rename:
- pattern: (.*)
- repl: m_\1
- time_keeper:
- type: time_keeper
- drive: listener
- radio_iface:
- type: radio_1x32
- drive: slave
-
-registers:
-
-properties:
diff --git a/host/include/uhd/rfnoc/blocks/radio_2x64.yml b/host/include/uhd/rfnoc/blocks/radio_2x64.yml
deleted file mode 100644
index bab8e457c..000000000
--- a/host/include/uhd/rfnoc/blocks/radio_2x64.yml
+++ /dev/null
@@ -1,81 +0,0 @@
-schema: rfnoc_modtool_args
-module_name: radio
-version: "1.0"
-rfnoc_version: "1.0"
-chdr_width: 64
-noc_id: 0x12AD1000
-
-parameters:
- NUM_PORTS: 2
-
-clocks:
- - name: rfnoc_chdr
- freq: "[]"
- - name: rfnoc_ctrl
- freq: "[]"
- - name: radio
- freq: "[]"
-
-control:
- fpga_iface: ctrlport
- interface_direction: remote_master_slave
- fifo_depth: 512
- clk_domain: radio
- ctrlport:
- byte_mode: True
- timed: True
- has_status: True
-
-data:
- fpga_iface: axis_data
- clk_domain: radio
- inputs:
- in_0:
- item_width: 32
- nipc: 1
- info_fifo_depth: 32
- payload_fifo_depth: 2**MTU
- format: sc16
- mdata_sig: ~
- in_1:
- item_width: 32
- nipc: 1
- info_fifo_depth: 32
- payload_fifo_depth: 2**MTU
- format: sc16
- mdata_sig: ~
- outputs:
- out_0:
- item_width: 32
- nipc: 1
- info_fifo_depth: 32
- payload_fifo_depth: 2**(MTU+1)
- sideband_at_end: True
- format: sc16
- mdata_sig: ~
- out_1:
- item_width: 32
- nipc: 1
- info_fifo_depth: 32
- payload_fifo_depth: 2**(MTU+1)
- sideband_at_end: True
- format: sc16
- mdata_sig: ~
-
-io_ports:
- ctrl_port:
- type: ctrl_port
- drive: master
- rename:
- pattern: (.*)
- repl: m_\1
- time_keeper:
- type: time_keeper
- drive: listener
- x300_radio:
- type: x300_radio
- drive: slave
-
-registers:
-
-properties:
generated by cgit v1.2.3 (git 2.39.1) at 2024-12-30 20:44:40 +0000