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-rw-r--r--host/lib/CMakeLists.txt2
-rw-r--r--host/lib/usrp/usrp1/codec_ctrl.cpp73
-rw-r--r--host/lib/usrp/usrp1/usrp1_iface.cpp46
-rw-r--r--host/lib/usrp/usrp1/usrp1_impl.cpp12
4 files changed, 69 insertions, 64 deletions
diff --git a/host/lib/CMakeLists.txt b/host/lib/CMakeLists.txt
index 54f4893e3..f8886566a 100644
--- a/host/lib/CMakeLists.txt
+++ b/host/lib/CMakeLists.txt
@@ -121,5 +121,5 @@ ENDIF(DEFINED LIBUHD_OUTPUT_NAME)
INSTALL(TARGETS uhd
LIBRARY DESTINATION ${LIBRARY_DIR} COMPONENT libraries # .so file
ARCHIVE DESTINATION ${LIBRARY_DIR} COMPONENT libraries # .lib file
- RUNTIME DESTINATION ${LIBRARY_DIR} COMPONENT libraries # .dll file
+ RUNTIME DESTINATION ${RUNTIME_DIR} COMPONENT libraries # .dll file
)
diff --git a/host/lib/usrp/usrp1/codec_ctrl.cpp b/host/lib/usrp/usrp1/codec_ctrl.cpp
index 1b4411002..9df29da0e 100644
--- a/host/lib/usrp/usrp1/codec_ctrl.cpp
+++ b/host/lib/usrp/usrp1/codec_ctrl.cpp
@@ -71,7 +71,6 @@ private:
usrp1_clock_ctrl::sptr _clock_ctrl;
int _spi_slave;
ad9862_regs_t _ad9862_regs;
- aux_adc_t _last_aux_adc_a, _last_aux_adc_b;
void send_reg(boost::uint8_t addr);
void recv_reg(boost::uint8_t addr);
@@ -134,6 +133,10 @@ usrp1_codec_ctrl_impl::usrp1_codec_ctrl_impl(usrp1_iface::sptr iface,
this->send_reg(addr);
}
+ //always start conversions for aux ADC
+ _ad9862_regs.start_a = 1;
+ _ad9862_regs.start_b = 1;
+
//aux adc clock
_ad9862_regs.clk_4 = ad9862_regs_t::CLK_4_1_4;
this->send_reg(34);
@@ -206,55 +209,37 @@ static double aux_adc_to_volts(boost::uint8_t high, boost::uint8_t low)
return double(((boost::uint16_t(high) << 2) | low)*3.3)/0x3ff;
}
-double usrp1_codec_ctrl_impl::read_aux_adc(aux_adc_t which)
-{
- //check to see if the switch needs to be set
- bool write_switch = false;
- switch(which) {
-
+double usrp1_codec_ctrl_impl::read_aux_adc(aux_adc_t which){
+ switch(which){
case AUX_ADC_A1:
+ _ad9862_regs.select_a = ad9862_regs_t::SELECT_A_AUX_ADC1;
+ this->send_reg(34); //start conversion and select mux
+ this->recv_reg(28); //read the value (2 bytes, 2 reads)
+ this->recv_reg(29);
+ return aux_adc_to_volts(_ad9862_regs.aux_adc_a1_9_2, _ad9862_regs.aux_adc_a1_1_0);
+
case AUX_ADC_A2:
- if (which != _last_aux_adc_a) {
- _ad9862_regs.select_a = (which == AUX_ADC_A1)?
- ad9862_regs_t::SELECT_A_AUX_ADC1: ad9862_regs_t::SELECT_A_AUX_ADC2;
- _last_aux_adc_a = which;
- write_switch = true;
- }
- break;
+ _ad9862_regs.select_a = ad9862_regs_t::SELECT_A_AUX_ADC2;
+ this->send_reg(34); //start conversion and select mux
+ this->recv_reg(26); //read the value (2 bytes, 2 reads)
+ this->recv_reg(27);
+ return aux_adc_to_volts(_ad9862_regs.aux_adc_a2_9_2, _ad9862_regs.aux_adc_a2_1_0);
case AUX_ADC_B1:
- case AUX_ADC_B2:
- if (which != _last_aux_adc_b) {
- _ad9862_regs.select_b = (which == AUX_ADC_B1)?
- ad9862_regs_t::SELECT_B_AUX_ADC1: ad9862_regs_t::SELECT_B_AUX_ADC2;
- _last_aux_adc_b = which;
- write_switch = true;
- }
- break;
+ _ad9862_regs.select_b = ad9862_regs_t::SELECT_B_AUX_ADC1;
+ this->send_reg(34); //start conversion and select mux
+ this->recv_reg(32); //read the value (2 bytes, 2 reads)
+ this->recv_reg(33);
+ return aux_adc_to_volts(_ad9862_regs.aux_adc_b1_9_2, _ad9862_regs.aux_adc_b1_1_0);
+ case AUX_ADC_B2:
+ _ad9862_regs.select_b = ad9862_regs_t::SELECT_B_AUX_ADC2;
+ this->send_reg(34); //start conversion and select mux
+ this->recv_reg(30); //read the value (2 bytes, 2 reads)
+ this->recv_reg(31);
+ return aux_adc_to_volts(_ad9862_regs.aux_adc_b2_9_2, _ad9862_regs.aux_adc_b2_1_0);
}
-
- //write the switch if it changed
- if(write_switch) this->send_reg(34);
-
- //map aux adcs to register values to read
- static const uhd::dict<aux_adc_t, boost::uint8_t> aux_dac_to_addr = boost::assign::map_list_of
- (AUX_ADC_A2, 26) (AUX_ADC_A1, 28)
- (AUX_ADC_B2, 30) (AUX_ADC_B1, 32)
- ;
-
- //read the value
- this->recv_reg(aux_dac_to_addr[which]+0);
- this->recv_reg(aux_dac_to_addr[which]+1);
-
- //return the value scaled to volts
- switch(which) {
- case AUX_ADC_A1: return aux_adc_to_volts(_ad9862_regs.aux_adc_a1_9_2, _ad9862_regs.aux_adc_a1_1_0);
- case AUX_ADC_A2: return aux_adc_to_volts(_ad9862_regs.aux_adc_a2_9_2, _ad9862_regs.aux_adc_a2_1_0);
- case AUX_ADC_B1: return aux_adc_to_volts(_ad9862_regs.aux_adc_b1_9_2, _ad9862_regs.aux_adc_b1_1_0);
- case AUX_ADC_B2: return aux_adc_to_volts(_ad9862_regs.aux_adc_b2_9_2, _ad9862_regs.aux_adc_b2_1_0);
- }
- UHD_ASSERT_THROW(false);
+ UHD_THROW_INVALID_CODE_PATH();
}
/***********************************************************************
diff --git a/host/lib/usrp/usrp1/usrp1_iface.cpp b/host/lib/usrp/usrp1/usrp1_iface.cpp
index ea7c1cea5..8f10df751 100644
--- a/host/lib/usrp/usrp1/usrp1_iface.cpp
+++ b/host/lib/usrp/usrp1/usrp1_iface.cpp
@@ -175,24 +175,31 @@ public:
UHD_ASSERT_THROW((num_bits <= 32) && !(num_bits % 8));
size_t num_bytes = num_bits / 8;
- // Byteswap on num_bytes
- unsigned char buff[4] = { 0 };
- for (size_t i = 1; i <= num_bytes; i++)
- buff[num_bytes - i] = (bits >> ((i - 1) * 8)) & 0xff;
-
if (readback) {
- boost::uint8_t w_len_h = which_slave & 0xff;
- boost::uint8_t w_len_l = num_bytes & 0xff;
-
- int ret = _ctrl_transport->usrp_control_read(
- VRQ_SPI_TRANSACT,
- (buff[0] << 8) | (buff[1] << 0),
- (buff[2] << 8) | (buff[3] << 0),
- buff,
- (w_len_h << 8) | (w_len_l << 0));
-
- if (ret < 0) throw uhd::io_error("USRP1: failed SPI readback transaction");
-
+ unsigned char buff[4] = {
+ (bits >> 0) & 0xff, (bits >> 8) & 0xff,
+ (bits >> 16) & 0xff, (bits >> 24) & 0xff
+ };
+ //conditions where there are two header bytes
+ if (num_bytes >= 3 and buff[num_bytes-1] != 0 and buff[num_bytes-2] != 0 and buff[num_bytes-3] == 0){
+ if (int(num_bytes-2) != _ctrl_transport->usrp_control_read(
+ VRQ_SPI_READ, (buff[num_bytes-1] << 8) | (buff[num_bytes-2] << 0),
+ (which_slave << 8) | SPI_FMT_MSB | SPI_FMT_HDR_2,
+ buff, num_bytes-2
+ )) throw uhd::io_error("USRP1: failed SPI readback transaction");
+ }
+
+ //conditions where there is one header byte
+ else if (num_bytes >= 2 and buff[num_bytes-1] != 0 and buff[num_bytes-2] == 0){
+ if (int(num_bytes-1) != _ctrl_transport->usrp_control_read(
+ VRQ_SPI_READ, buff[num_bytes-1],
+ (which_slave << 8) | SPI_FMT_MSB | SPI_FMT_HDR_1,
+ buff, num_bytes-1
+ )) throw uhd::io_error("USRP1: failed SPI readback transaction");
+ }
+ else{
+ throw uhd::io_error("USRP1: invalid input data for SPI readback");
+ }
boost::uint32_t val = (((boost::uint32_t)buff[0]) << 0) |
(((boost::uint32_t)buff[1]) << 8) |
(((boost::uint32_t)buff[2]) << 16) |
@@ -200,6 +207,11 @@ public:
return val;
}
else {
+ // Byteswap on num_bytes
+ unsigned char buff[4] = { 0 };
+ for (size_t i = 1; i <= num_bytes; i++)
+ buff[num_bytes - i] = (bits >> ((i - 1) * 8)) & 0xff;
+
boost::uint8_t w_index_h = which_slave & 0xff;
boost::uint8_t w_index_l = (SPI_FMT_MSB | SPI_FMT_HDR_0) & 0xff;
diff --git a/host/lib/usrp/usrp1/usrp1_impl.cpp b/host/lib/usrp/usrp1/usrp1_impl.cpp
index 7005c59f2..a99777775 100644
--- a/host/lib/usrp/usrp1/usrp1_impl.cpp
+++ b/host/lib/usrp/usrp1/usrp1_impl.cpp
@@ -86,7 +86,11 @@ static device_addrs_t usrp1_find(const device_addr_t &hint)
}
//std::cout << "USRP1 firmware image: " << usrp1_fw_image << std::endl;
- usrp_ctrl::make(usb_control::make(handle))->usrp_load_firmware(usrp1_fw_image);
+ usb_control::sptr control;
+ try{control = usb_control::make(handle);}
+ catch(const uhd::exception &){continue;} //ignore claimed
+
+ usrp_ctrl::make(control)->usrp_load_firmware(usrp1_fw_image);
}
//get descriptors again with serial number, but using the initialized VID/PID now since we have firmware
@@ -94,7 +98,11 @@ static device_addrs_t usrp1_find(const device_addr_t &hint)
pid = USRP1_PRODUCT_ID;
BOOST_FOREACH(usb_device_handle::sptr handle, usb_device_handle::get_device_list(vid, pid)) {
- usrp1_iface::sptr iface = usrp1_iface::make(usrp_ctrl::make(usb_control::make(handle)));
+ usb_control::sptr control;
+ try{control = usb_control::make(handle);}
+ catch(const uhd::exception &){continue;} //ignore claimed
+
+ usrp1_iface::sptr iface = usrp1_iface::make(usrp_ctrl::make(control));
device_addr_t new_addr;
new_addr["type"] = "usrp1";
new_addr["name"] = iface->mb_eeprom["name"];
generated by cgit v1.2.3 (git 2.39.1) at 2024-12-28 04:16:34 +0000