diff options
Diffstat (limited to 'host/lib')
31 files changed, 356 insertions, 169 deletions
diff --git a/host/lib/convert/convert_fc32_item32.cpp b/host/lib/convert/convert_fc32_item32.cpp index 29bfefd46..641fc2608 100644 --- a/host/lib/convert/convert_fc32_item32.cpp +++ b/host/lib/convert/convert_fc32_item32.cpp @@ -28,7 +28,7 @@ typedef boost::uint32_t (*to32_type)(boost::uint32_t); template <typename type, to32_type tohost> struct convert_fc32_item32_1_to_star_1 : public converter { - convert_fc32_item32_1_to_star_1(void) + convert_fc32_item32_1_to_star_1(void):_scalar(0.0) { //NOP } @@ -48,9 +48,9 @@ struct convert_fc32_item32_1_to_star_1 : public converter { const item32_t i32 = tohost(input[i++]); const item32_t q32 = tohost(input[i++]); - const float i_f32 = reinterpret_cast<const float &>(i32); - const float q_f32 = reinterpret_cast<const float &>(q32); - output[o] = std::complex<type>(type(i_f32*_scalar), type(q_f32*_scalar)); + const float *i_f32p = reinterpret_cast<const float *>(&i32); + const float *q_f32p = reinterpret_cast<const float *>(&q32); + output[o] = std::complex<type>(type((*i_f32p)*_scalar), type((*q_f32p)*_scalar)); } } @@ -60,7 +60,7 @@ struct convert_fc32_item32_1_to_star_1 : public converter template <typename type, to32_type towire> struct convert_star_1_to_fc32_item32_1 : public converter { - convert_star_1_to_fc32_item32_1(void) + convert_star_1_to_fc32_item32_1(void):_scalar(0.0) { //NOP } @@ -80,9 +80,10 @@ struct convert_star_1_to_fc32_item32_1 : public converter { const float i_f32 = type(input[i].real()*_scalar); const float q_f32 = type(input[i].imag()*_scalar); - const item32_t i32 = towire(reinterpret_cast<const item32_t &>(i_f32)); - const item32_t q32 = towire(reinterpret_cast<const item32_t &>(q_f32)); - output[o++] = i32; output[o++] = q32; + const item32_t *i32p = reinterpret_cast<const item32_t *>(&i_f32); + const item32_t *q32p = reinterpret_cast<const item32_t *>(&q_f32); + output[o++] = towire(*i32p); + output[o++] = towire(*q32p); } } diff --git a/host/lib/convert/convert_pack_sc12.cpp b/host/lib/convert/convert_pack_sc12.cpp index 680814994..92cd5d152 100644 --- a/host/lib/convert/convert_pack_sc12.cpp +++ b/host/lib/convert/convert_pack_sc12.cpp @@ -67,7 +67,7 @@ void convert_star_4_to_sc12_item32_3 template <typename type, towire32_type towire> struct convert_star_1_to_sc12_item32_1 : public converter { - convert_star_1_to_sc12_item32_1(void) + convert_star_1_to_sc12_item32_1(void):_scalar(0.0) { //NOP } diff --git a/host/lib/convert/convert_unpack_sc12.cpp b/host/lib/convert/convert_unpack_sc12.cpp index e98ab73f1..a2aec2ae5 100644 --- a/host/lib/convert/convert_unpack_sc12.cpp +++ b/host/lib/convert/convert_unpack_sc12.cpp @@ -84,7 +84,7 @@ void convert_sc12_item32_3_to_star_4 template <typename type, tohost32_type tohost> struct convert_sc12_item32_1_to_star_1 : public converter { - convert_sc12_item32_1_to_star_1(void) + convert_sc12_item32_1_to_star_1(void):_scalar(0.0) { //NOP } diff --git a/host/lib/convert/sse2_fc32_to_sc16.cpp b/host/lib/convert/sse2_fc32_to_sc16.cpp index 90bf0ed04..69786d7ce 100644 --- a/host/lib/convert/sse2_fc32_to_sc16.cpp +++ b/host/lib/convert/sse2_fc32_to_sc16.cpp @@ -27,6 +27,7 @@ DECLARE_CONVERTER(fc32, 1, sc16_item32_le, 1, PRIORITY_SIMD){ const __m128 scalar = _mm_set_ps1(float(scale_factor)); + // this macro converts values faster by using SSE intrinsics to convert 4 values at a time #define convert_fc32_1_to_item32_1_nswap_guts(_al_) \ for (; i+3 < nsamps; i+=4){ \ /* load from input */ \ @@ -48,17 +49,25 @@ DECLARE_CONVERTER(fc32, 1, sc16_item32_le, 1, PRIORITY_SIMD){ size_t i = 0; - //dispatch according to alignment + // need to dispatch according to alignment for fastest conversion switch (size_t(input) & 0xf){ - case 0x8: - xx_to_item32_sc16<uhd::htowx>(input, output, 1, scale_factor); i++; case 0x0: + // the data is 16-byte aligned, so do the fast processing of the bulk of the samples + convert_fc32_1_to_item32_1_nswap_guts(_) + break; + case 0x8: + // the first sample is 8-byte aligned - process it to align the remainder of the samples to 16-bytes + xx_to_item32_sc16<uhd::htowx>(input, output, 1, scale_factor); + i++; + // do faster processing of the bulk of the samples now that we are 16-byte aligned convert_fc32_1_to_item32_1_nswap_guts(_) break; - default: convert_fc32_1_to_item32_1_nswap_guts(u_) + default: + // we are not 8 or 16-byte aligned, so do fast processing with the unaligned load + convert_fc32_1_to_item32_1_nswap_guts(u_) } - //convert remainder + // convert any remaining samples xx_to_item32_sc16<uhd::htowx>(input+i, output+i, nsamps-i, scale_factor); } @@ -68,6 +77,7 @@ DECLARE_CONVERTER(fc32, 1, sc16_item32_be, 1, PRIORITY_SIMD){ const __m128 scalar = _mm_set_ps1(float(scale_factor)); + // this macro converts values faster by using SSE intrinsics to convert 4 values at a time #define convert_fc32_1_to_item32_1_bswap_guts(_al_) \ for (; i+3 < nsamps; i+=4){ \ /* load from input */ \ @@ -88,16 +98,24 @@ DECLARE_CONVERTER(fc32, 1, sc16_item32_be, 1, PRIORITY_SIMD){ size_t i = 0; - //dispatch according to alignment + // need to dispatch according to alignment for fastest conversion switch (size_t(input) & 0xf){ - case 0x8: - xx_to_item32_sc16<uhd::htonx>(input, output, 1, scale_factor); i++; case 0x0: + // the data is 16-byte aligned, so do the fast processing of the bulk of the samples + convert_fc32_1_to_item32_1_bswap_guts(_) + break; + case 0x8: + // the first value is 8-byte aligned - process it and prepare the bulk of the data for fast conversion + xx_to_item32_sc16<uhd::htonx>(input, output, 1, scale_factor); + i++; + // do faster processing of the remaining samples now that we are 16-byte aligned convert_fc32_1_to_item32_1_bswap_guts(_) break; - default: convert_fc32_1_to_item32_1_bswap_guts(u_) + default: + // we are not 8 or 16-byte aligned, so do fast processing with the unaligned load + convert_fc32_1_to_item32_1_bswap_guts(u_) } - //convert remainder + // convert any remaining samples xx_to_item32_sc16<uhd::htonx>(input+i, output+i, nsamps-i, scale_factor); } diff --git a/host/lib/convert/sse2_sc16_to_fc32.cpp b/host/lib/convert/sse2_sc16_to_fc32.cpp index c03e41585..0ac7f1798 100644 --- a/host/lib/convert/sse2_sc16_to_fc32.cpp +++ b/host/lib/convert/sse2_sc16_to_fc32.cpp @@ -28,6 +28,7 @@ DECLARE_CONVERTER(sc16_item32_le, 1, fc32, 1, PRIORITY_SIMD){ const __m128 scalar = _mm_set_ps1(float(scale_factor)/(1 << 16)); const __m128i zeroi = _mm_setzero_si128(); + // this macro converts values faster by using SSE intrinsics to convert 4 values at a time #define convert_item32_1_to_fc32_1_nswap_guts(_al_) \ for (; i+3 < nsamps; i+=4){ \ /* load from input */ \ @@ -50,17 +51,25 @@ DECLARE_CONVERTER(sc16_item32_le, 1, fc32, 1, PRIORITY_SIMD){ size_t i = 0; - //dispatch according to alignment + // need to dispatch according to alignment for fastest conversion switch (size_t(output) & 0xf){ - case 0x8: - item32_sc16_to_xx<uhd::htowx>(input, output, 1, scale_factor); i++; case 0x0: + // the data is 16-byte aligned, so do the fast processing of the bulk of the samples + convert_item32_1_to_fc32_1_nswap_guts(_) + break; + case 0x8: + // the first sample is 8-byte aligned - process it to align the remainder of the samples to 16-bytes + item32_sc16_to_xx<uhd::htowx>(input, output, 1, scale_factor); + i++; + // do faster processing of the bulk of the samples now that we are 16-byte aligned convert_item32_1_to_fc32_1_nswap_guts(_) break; - default: convert_item32_1_to_fc32_1_nswap_guts(u_) + default: + // we are not 8 or 16-byte aligned, so do fast processing with the unaligned load and store + convert_item32_1_to_fc32_1_nswap_guts(u_) } - //convert remainder + // convert any remaining samples item32_sc16_to_xx<uhd::htowx>(input+i, output+i, nsamps-i, scale_factor); } @@ -71,6 +80,7 @@ DECLARE_CONVERTER(sc16_item32_be, 1, fc32, 1, PRIORITY_SIMD){ const __m128 scalar = _mm_set_ps1(float(scale_factor)/(1 << 16)); const __m128i zeroi = _mm_setzero_si128(); + // this macro converts values faster by using SSE intrinsics to convert 4 values at a time #define convert_item32_1_to_fc32_1_bswap_guts(_al_) \ for (; i+3 < nsamps; i+=4){ \ /* load from input */ \ @@ -92,16 +102,24 @@ DECLARE_CONVERTER(sc16_item32_be, 1, fc32, 1, PRIORITY_SIMD){ size_t i = 0; - //dispatch according to alignment + // need to dispatch according to alignment for fastest conversion switch (size_t(output) & 0xf){ - case 0x8: - item32_sc16_to_xx<uhd::htonx>(input, output, 1, scale_factor); i++; case 0x0: + // the data is 16-byte aligned, so do the fast processing of the bulk of the samples + convert_item32_1_to_fc32_1_bswap_guts(_) + break; + case 0x8: + // the first sample is 8-byte aligned - process it to align the remainder of the samples to 16-bytes + item32_sc16_to_xx<uhd::htonx>(input, output, 1, scale_factor); + i++; + // do faster processing of the bulk of the samples now that we are 16-byte aligned convert_item32_1_to_fc32_1_bswap_guts(_) break; - default: convert_item32_1_to_fc32_1_bswap_guts(u_) + default: + // we are not 8 or 16-byte aligned, so do fast processing with the unaligned load and store + convert_item32_1_to_fc32_1_bswap_guts(u_) } - //convert remainder + // convert any remaining samples item32_sc16_to_xx<uhd::htonx>(input+i, output+i, nsamps-i, scale_factor); } diff --git a/host/lib/transport/super_recv_packet_handler.hpp b/host/lib/transport/super_recv_packet_handler.hpp index 688228e49..5080182d6 100644 --- a/host/lib/transport/super_recv_packet_handler.hpp +++ b/host/lib/transport/super_recv_packet_handler.hpp @@ -246,7 +246,8 @@ private: struct xport_chan_props_type{ xport_chan_props_type(void): packet_count(0), - handle_overflow(&handle_overflow_nop) + handle_overflow(&handle_overflow_nop), + fc_update_window(0) {} get_buff_type get_buff; issue_stream_cmd_type issue_stream_cmd; diff --git a/host/lib/transport/super_send_packet_handler.hpp b/host/lib/transport/super_send_packet_handler.hpp index 41f030ea6..ae483d1f3 100644 --- a/host/lib/transport/super_send_packet_handler.hpp +++ b/host/lib/transport/super_send_packet_handler.hpp @@ -239,7 +239,7 @@ private: size_t _header_offset_words32; double _tick_rate, _samp_rate; struct xport_chan_props_type{ - xport_chan_props_type(void):has_sid(false){} + xport_chan_props_type(void):has_sid(false),sid(0){} get_buff_type get_buff; bool has_sid; boost::uint32_t sid; diff --git a/host/lib/transport/udp_zero_copy.cpp b/host/lib/transport/udp_zero_copy.cpp index 166177177..7b6a476f5 100644 --- a/host/lib/transport/udp_zero_copy.cpp +++ b/host/lib/transport/udp_zero_copy.cpp @@ -68,7 +68,7 @@ static void check_registry_for_fast_send_threshold(const size_t mtu){ class udp_zero_copy_asio_mrb : public managed_recv_buffer{ public: udp_zero_copy_asio_mrb(void *mem, int sock_fd, const size_t frame_size): - _mem(mem), _sock_fd(sock_fd), _frame_size(frame_size) { /*NOP*/ } + _mem(mem), _sock_fd(sock_fd), _frame_size(frame_size), _len(0) { /*NOP*/ } void release(void){ _claimer.release(); @@ -87,6 +87,7 @@ public: if (wait_for_recv_ready(_sock_fd, timeout)){ _len = ::recv(_sock_fd, (char *)_mem, _frame_size, 0); + UHD_ASSERT_THROW(_len > 0); // TODO: Handle case of recv error index++; //advances the caller's buffer return make(this, _mem, size_t(_len)); } diff --git a/host/lib/types/tune.cpp b/host/lib/types/tune.cpp index 154f0990f..7697bd966 100644 --- a/host/lib/types/tune.cpp +++ b/host/lib/types/tune.cpp @@ -24,7 +24,9 @@ using namespace uhd; tune_request_t::tune_request_t(double target_freq): target_freq(target_freq), rf_freq_policy(POLICY_AUTO), - dsp_freq_policy(POLICY_AUTO) + rf_freq(0.0), + dsp_freq_policy(POLICY_AUTO), + dsp_freq(0.0) { /* NOP */ } @@ -33,7 +35,8 @@ tune_request_t::tune_request_t(double target_freq, double lo_off): target_freq(target_freq), rf_freq_policy(POLICY_MANUAL), rf_freq(target_freq + lo_off), - dsp_freq_policy(POLICY_AUTO) + dsp_freq_policy(POLICY_AUTO), + dsp_freq(0.0) { /* NOP */ } diff --git a/host/lib/usrp/README b/host/lib/usrp/README deleted file mode 100644 index 344209179..000000000 --- a/host/lib/usrp/README +++ /dev/null @@ -1,15 +0,0 @@ -######################################################################## -# lib USRP directories: -######################################################################## - -dboard: - Daughterboard implementation code for all USRP daughterboards - -usrp1: - Implementation code for the USB-based USRP Classic motherboard. - -usrp2: - Implementation code for USRP2, USRP-N200, and USRP-N210. - -usrp_e100: - Implementation code for USRP-E100. diff --git a/host/lib/usrp/b100/usb_zero_copy_wrapper.cpp b/host/lib/usrp/b100/usb_zero_copy_wrapper.cpp index 2096e4ef4..451cdae50 100644 --- a/host/lib/usrp/b100/usb_zero_copy_wrapper.cpp +++ b/host/lib/usrp/b100/usb_zero_copy_wrapper.cpp @@ -167,6 +167,7 @@ public: usb_zero_copy_wrapper(zero_copy_if::sptr usb_zc, const size_t frame_boundary): _internal_zc(usb_zc), _frame_boundary(frame_boundary), + _last_recv_offset(0), _next_recv_buff_index(0) { for (size_t i = 0; i < this->get_num_recv_frames(); i++){ diff --git a/host/lib/usrp/b200/b200_iface.cpp b/host/lib/usrp/b200/b200_iface.cpp index bb46fbfce..5d799bf01 100644 --- a/host/lib/usrp/b200/b200_iface.cpp +++ b/host/lib/usrp/b200/b200_iface.cpp @@ -17,6 +17,7 @@ #include "b200_iface.hpp" +#include <uhd/config.hpp> #include <uhd/utils/msg.hpp> #include <uhd/exception.hpp> #include <boost/functional/hash.hpp> @@ -62,6 +63,7 @@ const static boost::uint8_t B200_VREQ_FX3_RESET = 0x99; const static boost::uint8_t B200_VREQ_EEPROM_WRITE = 0xBA; const static boost::uint8_t B200_VREQ_EEPROM_READ = 0xBB; +const static boost::uint8_t FX3_STATE_UNDEFINED = 0x00; const static boost::uint8_t FX3_STATE_FPGA_READY = 0x01; const static boost::uint8_t FX3_STATE_CONFIGURING_FPGA = 0x02; const static boost::uint8_t FX3_STATE_BUSY = 0x03; @@ -88,6 +90,9 @@ typedef boost::uint32_t hash_type; */ static hash_type generate_hash(const char *filename) { + if (filename == NULL) + return hash_type(0); + std::ifstream file(filename); if (not file){ throw uhd::io_error(std::string("cannot open input file ") + filename); @@ -120,15 +125,15 @@ static hash_type generate_hash(const char *filename) * \param record a line from an Intel HEX file * \return true if record is valid, false otherwise */ -bool checksum(std::string *record) { +bool checksum(const std::string& record) { - size_t len = record->length(); + size_t len = record.length(); unsigned int i; unsigned char sum = 0; unsigned int val; for (i = 1; i < len; i += 2) { - std::istringstream(record->substr(i, 2)) >> std::hex >> val; + std::istringstream(record.substr(i, 2)) >> std::hex >> val; sum += val; } @@ -149,22 +154,25 @@ bool checksum(std::string *record) { * \param data output data * \return true if record is sucessfully read, false on error */ -bool parse_record(std::string *record, boost::uint16_t &len, \ +bool parse_record(const std::string& record, boost::uint16_t &len, \ boost::uint16_t &addr, boost::uint16_t &type, unsigned char* data) { unsigned int i; std::string _data; unsigned int val; - if (record->substr(0, 1) != ":") + if (record.substr(0, 1) != ":") return false; - std::istringstream(record->substr(1, 2)) >> std::hex >> len; - std::istringstream(record->substr(3, 4)) >> std::hex >> addr; - std::istringstream(record->substr(7, 2)) >> std::hex >> type; + std::istringstream(record.substr(1, 2)) >> std::hex >> len; + std::istringstream(record.substr(3, 4)) >> std::hex >> addr; + std::istringstream(record.substr(7, 2)) >> std::hex >> type; + + if (len > (2 * (record.length() - 9))) // sanity check to prevent buffer overrun + return false; for (i = 0; i < len; i++) { - std::istringstream(record->substr(9 + 2 * i, 2)) >> std::hex >> val; + std::istringstream(record.substr(9 + 2 * i, 2)) >> std::hex >> val; data[i] = (unsigned char) val; } @@ -179,19 +187,16 @@ class b200_iface_impl : public b200_iface{ public: b200_iface_impl(usb_control::sptr usb_ctrl): - _usb_ctrl(usb_ctrl) - { + _usb_ctrl(usb_ctrl) { //NOP } - int fx3_control_write(boost::uint8_t request, boost::uint16_t value, boost::uint16_t index, unsigned char *buff, boost::uint16_t length, - boost::int32_t timeout = 0) - { + boost::int32_t timeout = 0) { return _usb_ctrl->submit(VRT_VENDOR_OUT, // bmReqeustType request, // bRequest value, // wValue @@ -201,14 +206,12 @@ public: timeout); // timeout } - int fx3_control_read(boost::uint8_t request, boost::uint16_t value, boost::uint16_t index, unsigned char *buff, boost::uint16_t length, - boost::int32_t timeout = 0) - { + boost::int32_t timeout = 0) { return _usb_ctrl->submit(VRT_VENDOR_IN, // bmReqeustType request, // bRequest value, // wValue @@ -218,39 +221,45 @@ public: timeout); // timeout } - - void write_i2c(boost::uint16_t addr, const byte_vector_t &bytes) + void write_i2c(UHD_UNUSED(boost::uint16_t addr), UHD_UNUSED(const byte_vector_t &bytes)) { throw uhd::not_implemented_error("b200 write i2c"); } - byte_vector_t read_i2c(boost::uint16_t addr, size_t num_bytes) + byte_vector_t read_i2c(UHD_UNUSED(boost::uint16_t addr), UHD_UNUSED(size_t num_bytes)) { throw uhd::not_implemented_error("b200 read i2c"); } void write_eeprom(boost::uint16_t addr, boost::uint16_t offset, - const byte_vector_t &bytes) - { - fx3_control_write(B200_VREQ_EEPROM_WRITE, + const byte_vector_t &bytes) { + int ret = fx3_control_write(B200_VREQ_EEPROM_WRITE, 0, offset | (boost::uint16_t(addr) << 8), (unsigned char *) &bytes[0], bytes.size()); + + if (ret < 0) + throw uhd::io_error((boost::format("Failed to write EEPROM (%d: %s)") % ret % libusb_error_name(ret)).str()); + else if ((size_t)ret != bytes.size()) + throw uhd::io_error((boost::format("Short write on write EEPROM (expecting: %d, returned: %d)") % bytes.size() % ret).str()); } byte_vector_t read_eeprom( boost::uint16_t addr, boost::uint16_t offset, - size_t num_bytes - ){ + size_t num_bytes) { byte_vector_t recv_bytes(num_bytes); int bytes_read = fx3_control_read(B200_VREQ_EEPROM_READ, 0, offset | (boost::uint16_t(addr) << 8), (unsigned char*) &recv_bytes[0], num_bytes); - if (bytes_read != num_bytes) - throw uhd::io_error("Failed to read data from EEPROM."); + + if (bytes_read < 0) + throw uhd::io_error((boost::format("Failed to read EEPROM (%d: %s)") % bytes_read % libusb_error_name(bytes_read)).str()); + else if ((size_t)bytes_read != num_bytes) + throw uhd::io_error((boost::format("Short read on read EEPROM (expecting: %d, returned: %d)") % num_bytes % bytes_read).str()); + return recv_bytes; } @@ -258,8 +267,7 @@ public: unsigned char *tx_data, size_t num_tx_bits, unsigned char *rx_data, - size_t num_rx_bits - ){ + size_t num_rx_bits) { int ret = 0; boost::uint16_t tx_length = num_tx_bits / 8; @@ -271,9 +279,10 @@ public: 0x00, tx_data, tx_length); } - if(ret < 0) { - throw uhd::io_error("transact_spi: fx3_control_write failed!"); - } + if (ret < 0) + throw uhd::io_error((boost::format("Failed to write SPI (%d: %s)") % ret % libusb_error_name(ret)).str()); + else if (ret != tx_length) + throw uhd::io_error((boost::format("Short write on write SPI (expecting: %d, returned: %d)") % tx_length % ret).str()); if(num_rx_bits) { @@ -282,25 +291,38 @@ public: ret = fx3_control_read(B200_VREQ_LOOP, 0x00, \ 0x00, rx_data, total_length); - if(ret < 0) { - throw uhd::io_error("transact_spi: readback failed!"); - } + if (ret < 0) + throw uhd::io_error((boost::format("Failed to readback (%d: %s)") % ret % libusb_error_name(ret)).str()); + else if (ret != total_length) + throw uhd::io_error((boost::format("Short read on readback (expecting: %d, returned: %d)") % total_length % ret).str()); } } void ad9361_transact(const unsigned char in_buff[64], unsigned char out_buff[64]) { - fx3_control_write(B200_VREQ_AD9361_CTRL_WRITE, 0x00, 0x00, (unsigned char *)in_buff, 64); - int ret = 0; - for (size_t i = 0; i < 30; i++) + const int bytes_to_write = 64; + const int bytes_to_read = 64; + const size_t read_retries = 30; + + int ret = fx3_control_write(B200_VREQ_AD9361_CTRL_WRITE, 0x00, 0x00, (unsigned char *)in_buff, bytes_to_write); + if (ret < 0) + throw uhd::io_error((boost::format("Failed to write AD9361 (%d: %s)") % ret % libusb_error_name(ret)).str()); + else if (ret != bytes_to_write) + throw uhd::io_error((boost::format("Short write on write AD9361 (expecting: %d, returned: %d)") % bytes_to_write % ret).str()); + + for (size_t i = 0; i < read_retries; i++) { - ret = fx3_control_read(B200_VREQ_AD9361_CTRL_READ, 0x00, 0x00, out_buff, 64, 1000); - if (ret == 64) return; + ret = fx3_control_read(B200_VREQ_AD9361_CTRL_READ, 0x00, 0x00, out_buff, bytes_to_read, 1000); + if (ret < 0) + throw uhd::io_error((boost::format("Failed to read AD9361 (%d: %s)") % ret % libusb_error_name(ret)).str()); + + if (ret == bytes_to_read) + return; } - throw uhd::io_error(str(boost::format("ad9361_transact failed with usb error: %d") % ret)); - } + throw uhd::io_error(str(boost::format("Failed to read complete AD9361 (expecting: %d, last read: %d)") % bytes_to_read % ret)); + } - void load_firmware(const std::string filestring, bool force = false) + void load_firmware(const std::string filestring, UHD_UNUSED(bool force) = false) { const char *filename = filestring.c_str(); @@ -330,8 +352,11 @@ public: std::string record; file >> record; + if (!(record.length() > 0)) + continue; + /* Check for valid Intel HEX record. */ - if (!checksum(&record) || !parse_record(&record, len, \ + if (!checksum(record) || !parse_record(record, len, \ lower_address_bits, type, data)) { throw uhd::io_error("fx3_load_firmware: bad intel hex record checksum"); } @@ -404,46 +429,75 @@ public: throw uhd::io_error("fx3_load_firmware: No EOF record found."); } - void reset_fx3(void) { unsigned char data[4]; memset(data, 0x00, sizeof(data)); + const int bytes_to_send = sizeof(data); - fx3_control_write(B200_VREQ_FX3_RESET, 0x00, 0x00, data, 4); + int ret = fx3_control_write(B200_VREQ_FX3_RESET, 0x00, 0x00, data, bytes_to_send); + if (ret < 0) + throw uhd::io_error((boost::format("Failed to reset FX3 (%d: %s)") % ret % libusb_error_name(ret)).str()); + else if (ret != bytes_to_send) + throw uhd::io_error((boost::format("Short write on reset FX3 (expecting: %d, returned: %d)") % bytes_to_send % ret).str()); } void reset_gpif(void) { unsigned char data[4]; memset(data, 0x00, sizeof(data)); + const int bytes_to_send = sizeof(data); - fx3_control_write(B200_VREQ_GPIF_RESET, 0x00, 0x00, data, 4); + int ret = fx3_control_write(B200_VREQ_GPIF_RESET, 0x00, 0x00, data, bytes_to_send); + if (ret < 0) + throw uhd::io_error((boost::format("Failed to reset GPIF (%d: %s)") % ret % libusb_error_name(ret)).str()); + else if (ret != bytes_to_send) + throw uhd::io_error((boost::format("Short write on reset GPIF (expecting: %d, returned: %d)") % bytes_to_send % ret).str()); } - void set_fpga_reset_pin(const bool reset) - { + void set_fpga_reset_pin(const bool reset) { unsigned char data[4]; memset(data, (reset)? 0xFF : 0x00, sizeof(data)); UHD_THROW_INVALID_CODE_PATH(); - fx3_control_write(B200_VREQ_FPGA_RESET, 0x00, 0x00, data, 4); + // Below is dead code as long as UHD_THROW_INVALID_CODE_PATH(); is declared above. + // It is preserved here in a comment in case it is needed later: + /* + const int bytes_to_send = sizeof(data); + + int ret = fx3_control_write(B200_VREQ_FPGA_RESET, 0x00, 0x00, data, bytes_to_send); + if (ret < 0) + throw uhd::io_error((boost::format("Failed to reset FPGA (%d: %s)") % ret % libusb_error_name(ret)).str()); + else if (ret != bytes_to_send) + throw uhd::io_error((boost::format("Short write on reset FPGA (expecting: %d, returned: %d)") % bytes_to_send % ret).str()); + */ } boost::uint8_t get_usb_speed(void) { unsigned char rx_data[1]; + memset(rx_data, 0x00, sizeof(rx_data)); + const int bytes_to_recv = sizeof(rx_data); - fx3_control_read(B200_VREQ_GET_USB, 0x00, 0x00, rx_data, 1); + int ret = fx3_control_read(B200_VREQ_GET_USB, 0x00, 0x00, rx_data, bytes_to_recv); + if (ret < 0) + throw uhd::io_error((boost::format("Failed to get USB speed (%d: %s)") % ret % libusb_error_name(ret)).str()); + else if (ret != bytes_to_recv) + throw uhd::io_error((boost::format("Short read on get USB speed (expecting: %d, returned: %d)") % bytes_to_recv % ret).str()); return boost::lexical_cast<boost::uint8_t>(rx_data[0]); } - boost::uint8_t get_fx3_status(void) { unsigned char rx_data[1]; + memset(rx_data, 0x00, sizeof(rx_data)); + const int bytes_to_recv = sizeof(rx_data); - fx3_control_read(B200_VREQ_GET_STATUS, 0x00, 0x00, &rx_data[0], 1); + int ret = fx3_control_read(B200_VREQ_GET_STATUS, 0x00, 0x00, rx_data, bytes_to_recv); + if (ret < 0) + throw uhd::io_error((boost::format("Failed to get FX3 status (%d: %s)") % ret % libusb_error_name(ret)).str()); + else if (ret != bytes_to_recv) + throw uhd::io_error((boost::format("Short read on get FX3 status (expecting: %d, returned: %d)") % bytes_to_recv % ret).str()); return boost::lexical_cast<boost::uint8_t>(rx_data[0]); } @@ -451,47 +505,79 @@ public: boost::uint16_t get_compat_num(void) { unsigned char rx_data[2]; + memset(rx_data, 0x00, sizeof(rx_data)); + const int bytes_to_recv = sizeof(rx_data); - fx3_control_read(B200_VREQ_GET_COMPAT , 0x00, 0x00, rx_data, 2); + int ret = fx3_control_read(B200_VREQ_GET_COMPAT , 0x00, 0x00, rx_data, bytes_to_recv); + if (ret < 0) + throw uhd::io_error((boost::format("Failed to get compat num (%d: %s)") % ret % libusb_error_name(ret)).str()); + else if (ret != bytes_to_recv) + throw uhd::io_error((boost::format("Short read on get compat num (expecting: %d, returned: %d)") % bytes_to_recv % ret).str()); - boost::uint16_t compat = 0x0000; - compat |= (((uint16_t) rx_data[0]) << 8); - compat |= (rx_data[1] & 0x00FF); - - return compat; + return (((uint16_t)rx_data[0]) << 8) | rx_data[1]; } void usrp_get_firmware_hash(hash_type &hash) { - fx3_control_read(B200_VREQ_GET_FW_HASH, 0x00, 0x00, - (unsigned char*) &hash, 4, 500); + const int bytes_to_recv = 4; + if (sizeof(hash_type) != bytes_to_recv) + throw uhd::type_error((boost::format("hash_type is %d bytes but transfer length is %d bytes") % sizeof(hash_type) % bytes_to_recv).str()); + + int ret = fx3_control_read(B200_VREQ_GET_FW_HASH, 0x00, 0x00, (unsigned char*) &hash, bytes_to_recv, 500); + if (ret < 0) + throw uhd::io_error((boost::format("Failed to get firmware hash (%d: %s)") % ret % libusb_error_name(ret)).str()); + else if (ret != bytes_to_recv) + throw uhd::io_error((boost::format("Short read on get firmware hash (expecting: %d, returned: %d)") % bytes_to_recv % ret).str()); } void usrp_set_firmware_hash(hash_type hash) { - fx3_control_write(B200_VREQ_SET_FW_HASH, 0x00, 0x00, - (unsigned char*) &hash, 4); + const int bytes_to_send = 4; + if (sizeof(hash_type) != bytes_to_send) + throw uhd::type_error((boost::format("hash_type is %d bytes but transfer length is %d bytes") % sizeof(hash_type) % bytes_to_send).str()); + + int ret = fx3_control_write(B200_VREQ_SET_FW_HASH, 0x00, 0x00, (unsigned char*) &hash, bytes_to_send); + if (ret < 0) + throw uhd::io_error((boost::format("Failed to set firmware hash (%d: %s)") % ret % libusb_error_name(ret)).str()); + else if (ret != bytes_to_send) + throw uhd::io_error((boost::format("Short write on set firmware hash (expecting: %d, returned: %d)") % bytes_to_send % ret).str()); } void usrp_get_fpga_hash(hash_type &hash) { - fx3_control_read(B200_VREQ_GET_FPGA_HASH, 0x00, 0x00, - (unsigned char*) &hash, 4, 500); + const int bytes_to_recv = 4; + if (sizeof(hash_type) != bytes_to_recv) + throw uhd::type_error((boost::format("hash_type is %d bytes but transfer length is %d bytes") % sizeof(hash_type) % bytes_to_recv).str()); + + int ret = fx3_control_read(B200_VREQ_GET_FPGA_HASH, 0x00, 0x00, (unsigned char*) &hash, bytes_to_recv, 500); + if (ret < 0) + throw uhd::io_error((boost::format("Failed to get FPGA hash (%d: %s)") % ret % libusb_error_name(ret)).str()); + else if (ret != bytes_to_recv) + throw uhd::io_error((boost::format("Short read on get FPGA hash (expecting: %d, returned: %d)") % bytes_to_recv % ret).str()); } void usrp_set_fpga_hash(hash_type hash) { - fx3_control_write(B200_VREQ_SET_FPGA_HASH, 0x00, 0x00, - (unsigned char*) &hash, 4); + const int bytes_to_send = 4; + if (sizeof(hash_type) != bytes_to_send) + throw uhd::type_error((boost::format("hash_type is %d bytes but transfer length is %d bytes") % sizeof(hash_type) % bytes_to_send).str()); + + int ret = fx3_control_write(B200_VREQ_SET_FPGA_HASH, 0x00, 0x00, (unsigned char*) &hash, bytes_to_send); + if (ret < 0) + throw uhd::io_error((boost::format("Failed to set FPGA hash (%d: %s)") % ret % libusb_error_name(ret)).str()); + else if (ret != bytes_to_send) + throw uhd::io_error((boost::format("Short write on set FPGA hash (expecting: %d, returned: %d)") % bytes_to_send % ret).str()); } boost::uint32_t load_fpga(const std::string filestring) { boost::uint8_t fx3_state = 0; boost::uint32_t wait_count; + int ret = 0; + int bytes_to_xfer = 0; const char *filename = filestring.c_str(); hash_type hash = generate_hash(filename); hash_type loaded_hash; usrp_get_fpga_hash(loaded_hash); if (hash == loaded_hash) return 0; - + // Establish default largest possible control request transfer size based on operating USB speed int transfer_size = VREQ_DEFAULT_SIZE; int current_usb_speed = get_usb_speed(); @@ -499,16 +585,19 @@ public: transfer_size = VREQ_MAX_SIZE_USB3; else if (current_usb_speed != 2) throw uhd::io_error("load_fpga: get_usb_speed returned invalid USB speed (not 2 or 3)."); - + UHD_ASSERT_THROW(transfer_size <= VREQ_MAX_SIZE); - + unsigned char out_buff[VREQ_MAX_SIZE]; - + // Request loopback read, which will indicate the firmware's current control request buffer size // Make sure that if operating as USB2, requested length is within spec - int nread = fx3_control_read(B200_VREQ_LOOP, 0, 0, out_buff, std::min(transfer_size, (int)sizeof(out_buff)), 1000); - if (nread <= 0) - throw uhd::io_error("load_fpga: unable to complete firmware loopback request."); + int ntoread = std::min(transfer_size, (int)sizeof(out_buff)); + int nread = fx3_control_read(B200_VREQ_LOOP, 0, 0, out_buff, ntoread, 1000); + if (nread < 0) + throw uhd::io_error((boost::format("load_fpga: unable to complete firmware loopback request (%d: %s)") % nread % libusb_error_name(nread)).str()); + else if (nread != ntoread) + throw uhd::io_error((boost::format("load_fpga: short read on firmware loopback request (expecting: %d, returned: %d)") % ntoread % nread).str()); transfer_size = std::min(transfer_size, nread); // Select the smaller value size_t file_size = 0; @@ -520,18 +609,26 @@ public: std::ifstream file; file.open(filename, std::ios::in | std::ios::binary); - if(!file.good()) { + if (!file.good()) { throw uhd::io_error("load_fpga: cannot open FPGA input file."); } + // Zero the hash, in case we abort programming another image and revert to the previously programmed image + usrp_set_fpga_hash(0); + memset(out_buff, 0x00, sizeof(out_buff)); - fx3_control_write(B200_VREQ_FPGA_CONFIG, 0, 0, out_buff, 1, 1000); + bytes_to_xfer = 1; + ret = fx3_control_write(B200_VREQ_FPGA_CONFIG, 0, 0, out_buff, bytes_to_xfer, 1000); + if (ret < 0) + throw uhd::io_error((boost::format("Failed to start FPGA config (%d: %s)") % ret % libusb_error_name(ret)).str()); + else if (ret != bytes_to_xfer) + throw uhd::io_error((boost::format("Short write on start FPGA config (expecting: %d, returned: %d)") % bytes_to_xfer % ret).str()); wait_count = 0; do { fx3_state = get_fx3_status(); - if((wait_count >= 500) || (fx3_state == FX3_STATE_ERROR)) { + if((wait_count >= 500) || (fx3_state == FX3_STATE_ERROR) || (fx3_state == FX3_STATE_UNDEFINED)) { return fx3_state; } @@ -543,13 +640,18 @@ public: if (load_img_msg) UHD_MSG(status) << "Loading FPGA image: " \ << filestring << "..." << std::flush; - fx3_control_write(B200_VREQ_FPGA_START, 0, 0, out_buff, 1, 1000); + bytes_to_xfer = 1; + ret = fx3_control_write(B200_VREQ_FPGA_START, 0, 0, out_buff, bytes_to_xfer, 1000); + if (ret < 0) + throw uhd::io_error((boost::format("Failed to start FPGA bitstream (%d: %s)") % ret % libusb_error_name(ret)).str()); + else if (ret != bytes_to_xfer) + throw uhd::io_error((boost::format("Short write on start FPGA bitstream (expecting: %d, returned: %d)") % bytes_to_xfer % ret).str()); wait_count = 0; do { fx3_state = get_fx3_status(); - if((wait_count >= 1000) || (fx3_state == FX3_STATE_ERROR)) { + if((wait_count >= 1000) || (fx3_state == FX3_STATE_ERROR) || (fx3_state == FX3_STATE_UNDEFINED)) { return fx3_state; } @@ -559,19 +661,20 @@ public: } while(fx3_state != FX3_STATE_CONFIGURING_FPGA); size_t bytes_sent = 0; - while(!file.eof()) { + while (!file.eof()) { file.read((char *) out_buff, transfer_size); const std::streamsize n = file.gcount(); - if(n == 0) continue; + if(n == 0) + continue; boost::uint16_t transfer_count = boost::uint16_t(n); /* Send the data to the device. */ int nwritten = fx3_control_write(B200_VREQ_FPGA_DATA, 0, 0, out_buff, transfer_count, 5000); - if (nwritten <= 0) - throw uhd::io_error("load_fpga: cannot write bitstream to FX3."); + if (nwritten < 0) + throw uhd::io_error((boost::format("load_fpga: cannot write bitstream to FX3 (%d: %s)") % nwritten % libusb_error_name(nwritten)).str()); else if (nwritten != transfer_count) - throw uhd::io_error("load_fpga: short write while transferring bitstream to FX3."); + throw uhd::io_error((boost::format("load_fpga: short write while transferring bitstream to FX3 (expecting: %d, returned: %d)") % transfer_count % nwritten).str()); if (load_img_msg) { @@ -592,7 +695,7 @@ public: do { fx3_state = get_fx3_status(); - if((wait_count >= 500) || (fx3_state == FX3_STATE_ERROR)) { + if((wait_count >= 500) || (fx3_state == FX3_STATE_ERROR) || (fx3_state == FX3_STATE_UNDEFINED)) { return fx3_state; } @@ -603,7 +706,8 @@ public: usrp_set_fpga_hash(hash); - if (load_img_msg) UHD_MSG(status) << "\b\b\b\b done" << std::endl; + if (load_img_msg) + UHD_MSG(status) << "\b\b\b\b done" << std::endl; return 0; } @@ -612,6 +716,29 @@ private: usb_control::sptr _usb_ctrl; }; + +std::string b200_iface::fx3_state_string(boost::uint8_t state) +{ + switch (state) + { + case FX3_STATE_FPGA_READY: + return std::string("Ready"); + case FX3_STATE_CONFIGURING_FPGA: + return std::string("Configuring FPGA"); + case FX3_STATE_BUSY: + return std::string("Busy"); + case FX3_STATE_RUNNING: + return std::string("Running"); + case FX3_STATE_UNCONFIGURED: + return std::string("Unconfigured"); + case FX3_STATE_ERROR: + return std::string("Error"); + default: + break; + } + return std::string("Unknown"); +} + /*********************************************************************** * Make an instance of the implementation **********************************************************************/ diff --git a/host/lib/usrp/b200/b200_iface.hpp b/host/lib/usrp/b200/b200_iface.hpp index 5b6eeede4..20b4a7a89 100644 --- a/host/lib/usrp/b200/b200_iface.hpp +++ b/host/lib/usrp/b200/b200_iface.hpp @@ -78,6 +78,8 @@ public: virtual void write_eeprom(boost::uint16_t addr, boost::uint16_t offset, const uhd::byte_vector_t &bytes) = 0; virtual uhd::byte_vector_t read_eeprom(boost::uint16_t addr, boost::uint16_t offset, size_t num_bytes) = 0; + + static std::string fx3_state_string(boost::uint8_t state); }; diff --git a/host/lib/usrp/b200/b200_impl.hpp b/host/lib/usrp/b200/b200_impl.hpp index 362c45347..bee42679b 100644 --- a/host/lib/usrp/b200/b200_impl.hpp +++ b/host/lib/usrp/b200/b200_impl.hpp @@ -44,9 +44,9 @@ #include <uhd/transport/bounded_buffer.hpp> #include <boost/weak_ptr.hpp> #include "recv_packet_demuxer_3000.hpp" -static const boost::uint8_t B200_FW_COMPAT_NUM_MAJOR = 0x03; +static const boost::uint8_t B200_FW_COMPAT_NUM_MAJOR = 0x04; static const boost::uint8_t B200_FW_COMPAT_NUM_MINOR = 0x00; -static const boost::uint16_t B200_FPGA_COMPAT_NUM = 0x02; +static const boost::uint16_t B200_FPGA_COMPAT_NUM = 0x03; static const double B200_LINK_RATE_BPS = (5e9)/8; //practical link rate (5 Gbps) static const double B200_BUS_CLOCK_RATE = 100e6; static const double B200_DEFAULT_TICK_RATE = 32e6; diff --git a/host/lib/usrp/b200/b200_io_impl.cpp b/host/lib/usrp/b200/b200_io_impl.cpp index 4fe90bd4a..4768aa37b 100644 --- a/host/lib/usrp/b200/b200_io_impl.cpp +++ b/host/lib/usrp/b200/b200_io_impl.cpp @@ -249,14 +249,14 @@ rx_streamer::sptr b200_impl::get_rx_stream(const uhd::stream_args_t &args_) //calculate packet size static const size_t hdr_size = 0 + vrt::max_if_hdr_words32*sizeof(boost::uint32_t) - //+ sizeof(vrt::if_packet_info_t().tlr) //forced to have trailer + //+ sizeof(vrt::if_packet_info_t().tlr) //no longer using trailer - sizeof(vrt::if_packet_info_t().cid) //no class id ever used - sizeof(vrt::if_packet_info_t().tsi) //no int time ever used ; const size_t bpp = _data_transport->get_recv_frame_size() - hdr_size; const size_t bpi = convert::get_bytes_per_item(args.otw_format); size_t spp = unsigned(args.args.cast<double>("spp", bpp/bpi)); - spp = std::min<size_t>(2000, spp); //magic maximum for framing at full rate + spp = std::min<size_t>(4092, spp); //FPGA FIFO maximum for framing at full rate //make the new streamer given the samples per packet if (not my_streamer) my_streamer = boost::make_shared<sph::recv_packet_streamer>(spp); diff --git a/host/lib/usrp/common/fx2_ctrl.cpp b/host/lib/usrp/common/fx2_ctrl.cpp index 6111efea9..6552f1b2d 100644 --- a/host/lib/usrp/common/fx2_ctrl.cpp +++ b/host/lib/usrp/common/fx2_ctrl.cpp @@ -119,6 +119,9 @@ bool parse_record(std::string *record, unsigned int &len, std::istringstream(record->substr(3, 4)) >> std::hex >> addr; std::istringstream(record->substr(7, 2)) >> std::hex >> type; + if (len > (2 * (record->length() - 9))) // sanity check to prevent buffer overrun + return false; + for (i = 0; i < len; i++) { std::istringstream(record->substr(9 + 2 * i, 2)) >> std::hex >> val; data[i] = (unsigned char) val; @@ -181,6 +184,9 @@ public: std::string record; file >> record; + if (!(record.length() > 0)) + continue; + //check for valid record if (not checksum(&record) or not parse_record(&record, len, addr, type, data)) { throw uhd::io_error("usrp_load_firmware: bad record checksum"); diff --git a/host/lib/usrp/cores/rx_dsp_core_200.cpp b/host/lib/usrp/cores/rx_dsp_core_200.cpp index ef6b85de9..2fdc220b5 100644 --- a/host/lib/usrp/cores/rx_dsp_core_200.cpp +++ b/host/lib/usrp/cores/rx_dsp_core_200.cpp @@ -59,8 +59,11 @@ public: const size_t dsp_base, const size_t ctrl_base, const boost::uint32_t sid, const bool lingering_packet ): - _iface(iface), _dsp_base(dsp_base), _ctrl_base(ctrl_base), _sid(sid) + _iface(iface), _dsp_base(dsp_base), _ctrl_base(ctrl_base), _sid(sid) { + // previously uninitialized - assuming zero for all + _tick_rate = _link_rate = _host_extra_scaling = _fxpt_scalar_correction = 0.0; + //init to something so update method has reasonable defaults _scaling_adjustment = 1.0; _dsp_extra_scaling = 1.0; diff --git a/host/lib/usrp/cores/rx_dsp_core_3000.cpp b/host/lib/usrp/cores/rx_dsp_core_3000.cpp index 7b3324f74..525916032 100644 --- a/host/lib/usrp/cores/rx_dsp_core_3000.cpp +++ b/host/lib/usrp/cores/rx_dsp_core_3000.cpp @@ -50,10 +50,13 @@ public: ): _iface(iface), _dsp_base(dsp_base) { + // previously uninitialized - assuming zero for all + _link_rate = _host_extra_scaling = _fxpt_scalar_correction = 0.0; + //init to something so update method has reasonable defaults _scaling_adjustment = 1.0; _dsp_extra_scaling = 1.0; - this->set_tick_rate(1.0); + _tick_rate = 1.0; } ~rx_dsp_core_3000_impl(void) diff --git a/host/lib/usrp/cores/rx_frontend_core_200.cpp b/host/lib/usrp/cores/rx_frontend_core_200.cpp index 09b36c1a6..864b5cc53 100644 --- a/host/lib/usrp/cores/rx_frontend_core_200.cpp +++ b/host/lib/usrp/cores/rx_frontend_core_200.cpp @@ -38,7 +38,7 @@ static boost::uint32_t fs_to_bits(const double num, const size_t bits){ class rx_frontend_core_200_impl : public rx_frontend_core_200{ public: rx_frontend_core_200_impl(wb_iface::sptr iface, const size_t base): - _iface(iface), _base(base) + _i_dc_off(0), _q_dc_off(0), _iface(iface), _base(base) { //NOP } diff --git a/host/lib/usrp/cores/time64_core_200.cpp b/host/lib/usrp/cores/time64_core_200.cpp index 11b310362..ad5e6477c 100644 --- a/host/lib/usrp/cores/time64_core_200.cpp +++ b/host/lib/usrp/cores/time64_core_200.cpp @@ -48,6 +48,7 @@ public: ): _iface(iface), _base(base), _readback_bases(readback_bases), + _tick_rate(0.0), _mimo_delay_cycles(mimo_delay_cycles) { _sources.push_back("none"); diff --git a/host/lib/usrp/cores/tx_dsp_core_200.cpp b/host/lib/usrp/cores/tx_dsp_core_200.cpp index 808f13028..f8aa87aa3 100644 --- a/host/lib/usrp/cores/tx_dsp_core_200.cpp +++ b/host/lib/usrp/cores/tx_dsp_core_200.cpp @@ -60,6 +60,9 @@ public: ): _iface(iface), _dsp_base(dsp_base), _ctrl_base(ctrl_base), _sid(sid) { + // previously uninitialized - assuming zero for all + _tick_rate = _link_rate = _host_extra_scaling = _fxpt_scalar_correction = 0.0; + //init to something so update method has reasonable defaults _scaling_adjustment = 1.0; _dsp_extra_scaling = 1.0; diff --git a/host/lib/usrp/cores/tx_dsp_core_3000.cpp b/host/lib/usrp/cores/tx_dsp_core_3000.cpp index feb749cd9..93c8702bc 100644 --- a/host/lib/usrp/cores/tx_dsp_core_3000.cpp +++ b/host/lib/usrp/cores/tx_dsp_core_3000.cpp @@ -45,6 +45,9 @@ public: ): _iface(iface), _dsp_base(dsp_base) { + // previously uninitialized - assuming zero for all + _link_rate = _host_extra_scaling = _fxpt_scalar_correction = 0.0; + //init to something so update method has reasonable defaults _scaling_adjustment = 1.0; _dsp_extra_scaling = 1.0; diff --git a/host/lib/usrp/dboard/db_dbsrx.cpp b/host/lib/usrp/dboard/db_dbsrx.cpp index b1cee4aa7..9d04d8e16 100644 --- a/host/lib/usrp/dboard/db_dbsrx.cpp +++ b/host/lib/usrp/dboard/db_dbsrx.cpp @@ -179,7 +179,7 @@ dbsrx::dbsrx(ctor_args_t args) : rx_dboard_base(args){ "DBSRX: incorrect dbid\n" "Expected dbid 0x0002 and R193\n" "found dbid == %d\n" - "Please see the daughterboard app notes" + "Please see the daughterboard app notes" ) % this->get_rx_id().to_pp_string(); //warn user about incorrect DBID on non-USRP1, requires R194 populated @@ -188,7 +188,7 @@ dbsrx::dbsrx(ctor_args_t args) : rx_dboard_base(args){ "DBSRX: incorrect dbid\n" "Expected dbid 0x000D and R194\n" "found dbid == %d\n" - "Please see the daughterboard app notes" + "Please see the daughterboard app notes" ) % this->get_rx_id().to_pp_string(); //send initial register settings @@ -305,13 +305,13 @@ double dbsrx::set_lo_freq(double target_freq){ goto done_loop; } - } + } done_loop: - //Assert because we failed to find a suitable combination of ref_clock, R and N + //Assert because we failed to find a suitable combination of ref_clock, R and N UHD_ASSERT_THROW(ref_clock <= 27.0e6 and ref_clock >= 0.0); - UHD_ASSERT_THROW(ref_clock/m >= 1e6 and ref_clock/m <= 2.5e6); + UHD_ASSERT_THROW(m and ref_clock/m >= 1e6 and ref_clock/m <= 2.5e6); UHD_ASSERT_THROW((pfd_freq >= dbsrx_pfd_freq_range.start()) and (pfd_freq <= dbsrx_pfd_freq_range.stop())); UHD_ASSERT_THROW((N >= 256) and (N <= 32768)); @@ -332,7 +332,7 @@ double dbsrx::set_lo_freq(double target_freq){ _max2118_write_regs.r_divider = (max2118_write_regs_t::r_divider_t) r; _max2118_write_regs.set_n_divider(N); _max2118_write_regs.ade_vco_ade_read = max2118_write_regs_t::ADE_VCO_ADE_READ_ENABLED; - + //compute prescaler variables int scaler = actual_freq > 1125e6 ? 2 : 4; _max2118_write_regs.div2 = scaler == 4 ? max2118_write_regs_t::DIV2_DIV4 : max2118_write_regs_t::DIV2_DIV2; @@ -377,7 +377,7 @@ double dbsrx::set_lo_freq(double target_freq){ if (_max2118_read_regs.adc == 0){ if (_max2118_write_regs.osc_band == 0){ UHD_MSG(warning) << boost::format( - "DBSRX: Tuning exceeded vco range, _max2118_write_regs.osc_band == %d\n" + "DBSRX: Tuning exceeded vco range, _max2118_write_regs.osc_band == %d\n" ) % int(_max2118_write_regs.osc_band); UHD_ASSERT_THROW(_max2118_read_regs.adc != 0); //just to cause a throw } @@ -389,7 +389,7 @@ double dbsrx::set_lo_freq(double target_freq){ if (_max2118_read_regs.adc == 7){ if (_max2118_write_regs.osc_band == 7){ UHD_MSG(warning) << boost::format( - "DBSRX: Tuning exceeded vco range, _max2118_write_regs.osc_band == %d\n" + "DBSRX: Tuning exceeded vco range, _max2118_write_regs.osc_band == %d\n" ) % int(_max2118_write_regs.osc_band); UHD_ASSERT_THROW(_max2118_read_regs.adc != 7); //just to cause a throw } @@ -408,7 +408,7 @@ double dbsrx::set_lo_freq(double target_freq){ //allow for setup time before checking condition again boost::this_thread::sleep(boost::posix_time::milliseconds(10)); } - + UHD_LOGV(often) << boost::format( "DBSRX: final vco %d, vtune adc %d" ) % int(_max2118_write_regs.osc_band) % int(_max2118_read_regs.adc) << std::endl; @@ -417,7 +417,7 @@ double dbsrx::set_lo_freq(double target_freq){ if (_max2118_read_regs.adc <= 2) _max2118_write_regs.cp_current = max2118_write_regs_t::CP_CURRENT_I_CP_100UA; else if (_max2118_read_regs.adc >= 5) _max2118_write_regs.cp_current = max2118_write_regs_t::CP_CURRENT_I_CP_400UA; else _max2118_write_regs.cp_current = max2118_write_regs_t::CP_CURRENT_I_CP_200UA; - + //update charge pump bias current setting send_reg(0x2, 0x2); @@ -524,7 +524,7 @@ double dbsrx::set_bandwidth(double bandwidth){ bandwidth = dbsrx_bandwidth_range.clip(bandwidth); double ref_clock = this->get_iface()->get_clock_rate(dboard_iface::UNIT_RX); - + //NOTE: _max2118_write_regs.m_divider set in set_lo_freq //compute f_dac setting diff --git a/host/lib/usrp/dboard/db_tvrx.cpp b/host/lib/usrp/dboard/db_tvrx.cpp index edee46cd5..e9f60f765 100644 --- a/host/lib/usrp/dboard/db_tvrx.cpp +++ b/host/lib/usrp/dboard/db_tvrx.cpp @@ -267,7 +267,7 @@ static std::string get_band(double freq) { * \return a voltage to feed the TVRX analog gain */ -static double gain_interp(double gain, boost::array<double, 17> db_vector, boost::array<double, 17> volts_vector) { +static double gain_interp(double gain, const boost::array<double, 17>& db_vector, const boost::array<double, 17>& volts_vector) { double volts; gain = uhd::clip<double>(gain, db_vector.front(), db_vector.back()); //let's not get carried away here diff --git a/host/lib/usrp/dboard/db_wbx_common.hpp b/host/lib/usrp/dboard/db_wbx_common.hpp index 9e984dce7..d1beb160e 100644 --- a/host/lib/usrp/dboard/db_wbx_common.hpp +++ b/host/lib/usrp/dboard/db_wbx_common.hpp @@ -118,7 +118,7 @@ protected: */ class wbx_versionx { public: - wbx_versionx() {} + wbx_versionx():self_base(NULL) {} ~wbx_versionx(void) {} virtual double set_tx_gain(double gain, const std::string &name) = 0; diff --git a/host/lib/usrp/gps_ctrl.cpp b/host/lib/usrp/gps_ctrl.cpp index c3af75faa..105a52b30 100644 --- a/host/lib/usrp/gps_ctrl.cpp +++ b/host/lib/usrp/gps_ctrl.cpp @@ -223,7 +223,6 @@ private: boost::this_thread::sleep(milliseconds(GPS_TIMEOUT_DELAY_MS)); } throw uhd::value_error(str(boost::format("get_nmea(): no %s message found") % msgtype)); - return std::string(); } //helper function to retrieve a field from an NMEA sentence @@ -322,7 +321,6 @@ private: boost::this_thread::sleep(milliseconds(GPS_TIMEOUT_DELAY_MS)); } throw uhd::value_error("get_stat(): no servo message found"); - return std::string(); } uart_iface::sptr _uart; diff --git a/host/lib/usrp/usrp1/io_impl.cpp b/host/lib/usrp/usrp1/io_impl.cpp index d384eb13f..e1f17e5a6 100644 --- a/host/lib/usrp/usrp1/io_impl.cpp +++ b/host/lib/usrp/usrp1/io_impl.cpp @@ -63,7 +63,7 @@ static const size_t alignment_padding = 512; * Helper struct to associate an offset with a buffer **********************************************************************/ struct offset_send_buffer{ - offset_send_buffer(void){ + offset_send_buffer(void):offset(0){ /* NOP */ } diff --git a/host/lib/usrp/usrp1/usrp1_iface.cpp b/host/lib/usrp/usrp1/usrp1_iface.cpp index 9301721aa..6eff9d3ad 100644 --- a/host/lib/usrp/usrp1/usrp1_iface.cpp +++ b/host/lib/usrp/usrp1/usrp1_iface.cpp @@ -91,11 +91,11 @@ public: return uhd::ntohx(value_out); } - + void poke16(boost::uint32_t, boost::uint16_t) { throw uhd::not_implemented_error("Unhandled command poke16()"); } - + boost::uint16_t peek16(boost::uint32_t) { throw uhd::not_implemented_error("Unhandled command peek16()"); return 0; @@ -141,8 +141,10 @@ public: if (readback) { unsigned char buff[4] = { - (bits >> 0) & 0xff, (bits >> 8) & 0xff, - (bits >> 16) & 0xff, (bits >> 24) & 0xff + (unsigned char)(bits & 0xff), + (unsigned char)((bits >> 8) & 0xff), + (unsigned char)((bits >> 16) & 0xff), + (unsigned char)((bits >> 24) & 0xff) }; //conditions where there are two header bytes if (num_bytes >= 3 and buff[num_bytes-1] != 0 and buff[num_bytes-2] != 0 and buff[num_bytes-3] == 0){ @@ -168,7 +170,7 @@ public: (((boost::uint32_t)buff[1]) << 8) | (((boost::uint32_t)buff[2]) << 16) | (((boost::uint32_t)buff[3]) << 24); - return val; + return val; } else { // Byteswap on num_bytes diff --git a/host/lib/usrp/usrp2/usrp2_clk_regs.hpp b/host/lib/usrp/usrp2/usrp2_clk_regs.hpp index 8b185eac0..d5e506d8d 100644 --- a/host/lib/usrp/usrp2/usrp2_clk_regs.hpp +++ b/host/lib/usrp/usrp2/usrp2_clk_regs.hpp @@ -22,8 +22,18 @@ class usrp2_clk_regs_t { public: - usrp2_clk_regs_t(void) { ; } + usrp2_clk_regs_t(void): + test(0), + fpga(0), + adc(0), + dac(0), + serdes(0), + exp(0), + tx_db(0), + rx_db(0) {} + usrp2_clk_regs_t(usrp2_iface::rev_type rev) { + fpga = adc = serdes = exp = tx_db = 0; test = 0; fpga = 1; dac = 3; @@ -54,7 +64,7 @@ public: //dont throw, it may be unitialized break; } - + rx_db = 7; } diff --git a/host/lib/usrp/usrp2/usrp2_iface.cpp b/host/lib/usrp/usrp2/usrp2_iface.cpp index 3b230ca69..5f97045e1 100644 --- a/host/lib/usrp/usrp2/usrp2_iface.cpp +++ b/host/lib/usrp/usrp2/usrp2_iface.cpp @@ -271,7 +271,7 @@ public: //send and recv usrp2_ctrl_data_t in_data = this->ctrl_send_and_recv(out_data, MIN_PROTO_COMPAT_I2C); UHD_ASSERT_THROW(ntohl(in_data.id) == USRP2_CTRL_ID_HERES_THE_I2C_DATA_DUDE); - UHD_ASSERT_THROW(in_data.data.i2c_args.addr = num_bytes); + UHD_ASSERT_THROW(in_data.data.i2c_args.bytes == num_bytes); //copy out the data byte_vector_t result(num_bytes); diff --git a/host/lib/utils/paths.cpp b/host/lib/utils/paths.cpp index 25cade693..3e2bea1c6 100644 --- a/host/lib/utils/paths.cpp +++ b/host/lib/utils/paths.cpp @@ -115,8 +115,8 @@ std::string uhd::get_tmp_path(void){ //try the stdio define if available #ifdef P_tmpdir - if (P_tmpdir != NULL) return P_tmpdir; - #endif + return P_tmpdir; + #else //try unix environment variables tmp_path = std::getenv("TMPDIR"); @@ -124,6 +124,7 @@ std::string uhd::get_tmp_path(void){ //give up and use the unix default return "/tmp"; + #endif } std::string uhd::get_app_path(void){ |