diff options
Diffstat (limited to 'host/lib')
| -rw-r--r-- | host/lib/include/uhdlib/rfnoc/client_zero.hpp | 13 | ||||
| -rw-r--r-- | host/lib/rfnoc/client_zero.cpp | 4 | ||||
| -rw-r--r-- | host/lib/rfnoc/link_stream_manager.cpp | 8 |
3 files changed, 21 insertions, 4 deletions
diff --git a/host/lib/include/uhdlib/rfnoc/client_zero.hpp b/host/lib/include/uhdlib/rfnoc/client_zero.hpp index 43f955870..f022c2dfa 100644 --- a/host/lib/include/uhdlib/rfnoc/client_zero.hpp +++ b/host/lib/include/uhdlib/rfnoc/client_zero.hpp @@ -75,12 +75,24 @@ public: return _num_stream_endpoints; }; + //! Return the number of stream endpoints connected to the control crossbar + size_t get_num_ctrl_endpoints() const + { + return _num_ctrl_endpoints; + }; + //! Return the number of transports available size_t get_num_transports() { return _num_transports; }; + //! Return the control crossbar port of the block \p block_idx + size_t get_ctrl_xbar_port(const size_t block_idx) const + { + return 1 + _num_ctrl_endpoints + block_idx; + } + //! Return whether or not the device includes a CHDR crossbar bool has_chdr_crossbar() { @@ -189,6 +201,7 @@ private: uint16_t _device_type; uint16_t _num_blocks; uint16_t _num_stream_endpoints; + uint16_t _num_ctrl_endpoints; uint16_t _num_transports; bool _has_chdr_crossbar; uint16_t _num_edges; diff --git a/host/lib/rfnoc/client_zero.cpp b/host/lib/rfnoc/client_zero.cpp index af23ba1cc..81ac5830d 100644 --- a/host/lib/rfnoc/client_zero.cpp +++ b/host/lib/rfnoc/client_zero.cpp @@ -28,6 +28,8 @@ constexpr int PORT_CNT_ADDR = 1 * 4; constexpr int EDGE_CNT_ADDR = 2 * 4; //! Register address of the device information constexpr int DEVICE_INFO_ADDR = 3 * 4; +//! Register address of the controlport information +constexpr int CTRLPORT_CNT_ADDR = 4 * 4; //! (Write) Register address of the flush and reset controls constexpr int FLUSH_RESET_ADDR = 1 * 4; @@ -46,6 +48,7 @@ client_zero::client_zero(register_iface::sptr reg) const uint32_t port_reg_val = regs().peek32(PORT_CNT_ADDR); const uint32_t edge_reg_val = regs().peek32(EDGE_CNT_ADDR); const uint32_t device_info_reg_val = regs().peek32(DEVICE_INFO_ADDR); + const uint32_t cport_info_reg_val = regs().peek32(CTRLPORT_CNT_ADDR); // Parse the PROTOVER_ADDR register _proto_ver = proto_reg_val & 0xFFFF; @@ -55,6 +58,7 @@ client_zero::client_zero(register_iface::sptr reg) _num_transports = uhd::narrow_cast<uint16_t>((port_reg_val & 0x3FF00000) >> 20); _num_blocks = uhd::narrow_cast<uint16_t>((port_reg_val & 0x000FFC00) >> 10); _num_stream_endpoints = uhd::narrow_cast<uint16_t>((port_reg_val & 0x000003FF)); + _num_ctrl_endpoints = uhd::narrow_cast<uint16_t>(cport_info_reg_val & 0x3FF); // Parse the EDGE_CNT_ADDR register // The only non-zero entry here is _num_edges diff --git a/host/lib/rfnoc/link_stream_manager.cpp b/host/lib/rfnoc/link_stream_manager.cpp index a85ad2b4b..1c3ad407d 100644 --- a/host/lib/rfnoc/link_stream_manager.cpp +++ b/host/lib/rfnoc/link_stream_manager.cpp @@ -155,16 +155,16 @@ public: "Control for the specified EPID was not initialized"); } const client_zero::sptr& c0_ctrl = _client_zero_map.at(dst_epid); - uint16_t dst_port = 1 + c0_ctrl->get_num_stream_endpoints() + block_index; + const uint16_t block_slot = 1 + c0_ctrl->get_num_stream_endpoints() + block_index; if (block_index >= c0_ctrl->get_num_blocks()) { throw uhd::value_error("Requested block index out of range"); } // Create control endpoint return _ctrl_ep->get_ctrlport_ep(dst_epid, - dst_port, - (size_t(1) << c0_ctrl->get_block_info(dst_port).ctrl_fifo_size), - c0_ctrl->get_block_info(dst_port).ctrl_max_async_msgs, + c0_ctrl->get_ctrl_xbar_port(block_index), + (size_t(1) << c0_ctrl->get_block_info(block_slot).ctrl_fifo_size), + c0_ctrl->get_block_info(block_slot).ctrl_max_async_msgs, client_clk, timebase_clk); } |