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-rw-r--r--host/lib/convert/convert_with_tables.cpp2
-rw-r--r--host/lib/transport/chdr.cpp2
-rw-r--r--host/lib/transport/gen_vrt_if_packet.py4
3 files changed, 4 insertions, 4 deletions
diff --git a/host/lib/convert/convert_with_tables.cpp b/host/lib/convert/convert_with_tables.cpp
index 40efc5190..5c9248052 100644
--- a/host/lib/convert/convert_with_tables.cpp
+++ b/host/lib/convert/convert_with_tables.cpp
@@ -168,7 +168,7 @@ private:
* Factory functions and registration
**********************************************************************/
-#ifdef BOOST_BIG_ENDIAN
+#ifdef UHD_BIG_ENDIAN
# define SHIFT_PAIR0 16, 0
# define SHIFT_PAIR1 0, 16
# define BE_SWAP false
diff --git a/host/lib/transport/chdr.cpp b/host/lib/transport/chdr.cpp
index ff3b6475a..312cca318 100644
--- a/host/lib/transport/chdr.cpp
+++ b/host/lib/transport/chdr.cpp
@@ -10,7 +10,7 @@
#include <uhd/utils/byteswap.hpp>
// define the endian macros to convert integers
-#ifdef BOOST_BIG_ENDIAN
+#ifdef UHD_BIG_ENDIAN
# define BE_MACRO(x) (x)
# define LE_MACRO(x) uhd::byteswap(x)
#else
diff --git a/host/lib/transport/gen_vrt_if_packet.py b/host/lib/transport/gen_vrt_if_packet.py
index 225a59dfe..6a17d9e3b 100644
--- a/host/lib/transport/gen_vrt_if_packet.py
+++ b/host/lib/transport/gen_vrt_if_packet.py
@@ -23,11 +23,11 @@ TMPL_TEXT = """<% import time %>
#include <uhd/exception.hpp>
#include <uhd/transport/vrt_if_packet.hpp>
#include <uhd/utils/byteswap.hpp>
-#include <boost/detail/endian.hpp>
+#include <uhd/types/endianness.hpp>
#include <vector>
//define the endian macros to convert integers
-#ifdef BOOST_BIG_ENDIAN
+#ifdef UHD_BIG_ENDIAN
#define BE_MACRO(x) (x)
#define LE_MACRO(x) uhd::byteswap(x)
#else