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-rw-r--r--host/lib/ic_reg_maps/CMakeLists.txt4
-rw-r--r--host/lib/ic_reg_maps/common.py53
-rwxr-xr-xhost/lib/ic_reg_maps/gen_ad5623_regs.py (renamed from host/lib/ic_reg_maps/gen_ad5624_regs.py)4
-rwxr-xr-xhost/lib/ic_reg_maps/gen_ad9777_regs.py2
-rw-r--r--host/lib/usrp/dboard/db_rfx.cpp2
-rw-r--r--host/lib/usrp/usrp2/dboard_iface.cpp39
6 files changed, 83 insertions, 21 deletions
diff --git a/host/lib/ic_reg_maps/CMakeLists.txt b/host/lib/ic_reg_maps/CMakeLists.txt
index 63378eb89..ba1bbc9f0 100644
--- a/host/lib/ic_reg_maps/CMakeLists.txt
+++ b/host/lib/ic_reg_maps/CMakeLists.txt
@@ -40,8 +40,8 @@ LIBUHD_PYTHON_GEN_SOURCE(
)
LIBUHD_PYTHON_GEN_SOURCE(
- ${CMAKE_SOURCE_DIR}/lib/ic_reg_maps/gen_ad5624_regs.py
- ${CMAKE_BINARY_DIR}/lib/ic_reg_maps/ad5624_regs.hpp
+ ${CMAKE_SOURCE_DIR}/lib/ic_reg_maps/gen_ad5623_regs.py
+ ${CMAKE_BINARY_DIR}/lib/ic_reg_maps/ad5623_regs.hpp
)
LIBUHD_PYTHON_GEN_SOURCE(
diff --git a/host/lib/ic_reg_maps/common.py b/host/lib/ic_reg_maps/common.py
index e27c2816d..173186eb1 100644
--- a/host/lib/ic_reg_maps/common.py
+++ b/host/lib/ic_reg_maps/common.py
@@ -80,6 +80,26 @@ $body
return addrs;
}
+ #for $mreg in $mregs
+ $mreg.get_type() get_$(mreg.get_name())(void){
+ return
+ #set $shift = 0
+ #for $reg in $mreg.get_regs()
+ ($(mreg.get_type())($reg.get_name() & $reg.get_mask()) << $shift) |
+ #set $shift = $shift + $reg.get_bit_width()
+ #end for
+ 0;
+ }
+
+ void set_$(mreg.get_name())($mreg.get_type() reg){
+ #set $shift = 0
+ #for $reg in $mreg.get_regs()
+ $reg.get_name() = (reg >> $shift) & $reg.get_mask();
+ #set $shift = $shift + $reg.get_bit_width()
+ #end for
+ }
+
+ #end for
private:
$(name)_t *_state;
};
@@ -90,7 +110,7 @@ private:
def parse_tmpl(_tmpl_text, **kwargs):
return str(Template(_tmpl_text, kwargs))
-def to_num(arg): return eval(arg)
+def to_num(arg): return int(eval(arg))
class reg:
def __init__(self, reg_des):
@@ -135,13 +155,42 @@ class reg:
def get_mask(self): return hex(int('1'*self.get_bit_width(), 2))
def get_bit_width(self): return self._addr_spec[1] - self._addr_spec[0] + 1
+class mreg:
+ def __init__(self, mreg_des, regs):
+ try: self.parse(mreg_des, regs)
+ except Exception, e:
+ raise Exception, 'Error parsing meta register description: "%s"\nWhat: %s'%(mreg_des, e)
+
+ def parse(self, mreg_des, regs):
+ x = re.match('^~(\w*)\s+(.*)\s*$', mreg_des)
+ self._name, reg_names = x.groups()
+ regs_dict = dict([(reg.get_name(), reg) for reg in regs])
+ self._regs = [regs_dict[reg_name] for reg_name in map(str.strip, reg_names.split(','))]
+
+ def get_name(self): return self._name
+ def get_regs(self): return self._regs
+ def get_bit_width(self): return sum(map(reg.get_bit_width, self._regs))
+ def get_type(self):
+ return 'boost::uint%d_t'%max(2**math.ceil(math.log(self.get_bit_width(), 2)), 8)
+
def generate(name, regs_tmpl, body_tmpl='', file=__file__):
- regs = map(reg, parse_tmpl(regs_tmpl).splitlines())
+ #evaluate the regs template and parse each line into a register
+ regs = list(); mregs = list()
+ for entry in parse_tmpl(regs_tmpl).splitlines():
+ if entry.startswith('~'): mregs.append(mreg(entry, regs))
+ else: regs.append(reg(entry))
+
+ #evaluate the body template with the list of registers
body = parse_tmpl(body_tmpl, regs=regs).replace('\n', '\n ').strip()
+
+ #evaluate the code template with the parsed registers and arguments
code = parse_tmpl(COMMON_TMPL,
name=name,
regs=regs,
+ mregs=mregs,
body=body,
file=file,
)
+
+ #write the generated code to file specified by argv1
open(sys.argv[1], 'w').write(code)
diff --git a/host/lib/ic_reg_maps/gen_ad5624_regs.py b/host/lib/ic_reg_maps/gen_ad5623_regs.py
index 24401b878..e653921ba 100755
--- a/host/lib/ic_reg_maps/gen_ad5624_regs.py
+++ b/host/lib/ic_reg_maps/gen_ad5623_regs.py
@@ -22,7 +22,7 @@
########################################################################
REGS_TMPL="""\
data 0[4:15] 0
-addr 0[16:18] 0 DAC_A=0, DAC_B=1, DAC_C=2, DAC_D=3, ALL=7
+addr 0[16:18] 0 DAC_A=0, DAC_B=1, ALL=7
cmd 0[19:21] 0 wr_input_n, up_dac_n, wr_input_n_up_all, wr_up_dac_chan_n, power_down, reset, load_ldac
"""
@@ -41,7 +41,7 @@ boost::uint32_t get_reg(void){
if __name__ == '__main__':
import common; common.generate(
- name='ad5624_regs',
+ name='ad5623_regs',
regs_tmpl=REGS_TMPL,
body_tmpl=BODY_TMPL,
file=__file__,
diff --git a/host/lib/ic_reg_maps/gen_ad9777_regs.py b/host/lib/ic_reg_maps/gen_ad9777_regs.py
index 690b15e24..47b61cf44 100755
--- a/host/lib/ic_reg_maps/gen_ad9777_regs.py
+++ b/host/lib/ic_reg_maps/gen_ad9777_regs.py
@@ -76,9 +76,11 @@ qdac_coarse_gain_adjust 0xA[0:3] 0
########################################################################
idac_offset_adjust_msb 7[0:7] 0
idac_offset_adjust_lsb 8[0:1] 0
+~idac_offset_adjust idac_offset_adjust_lsb, idac_offset_adjust_msb
idac_ioffset_direction 8[7] 0 out_a, out_b
qdac_offset_adjust_msb 0xB[0:7] 0
qdac_offset_adjust_lsb 0xC[0:1] 0
+~qdac_offset_adjust qdac_offset_adjust_lsb, qdac_offset_adjust_msb
qdac_ioffset_direction 0xC[7] 0 out_a, out_b
"""
diff --git a/host/lib/usrp/dboard/db_rfx.cpp b/host/lib/usrp/dboard/db_rfx.cpp
index 17fc00d24..2585dfa8d 100644
--- a/host/lib/usrp/dboard/db_rfx.cpp
+++ b/host/lib/usrp/dboard/db_rfx.cpp
@@ -257,7 +257,7 @@ void rfx_xcvr::set_rx_gain(float gain, const std::string &name){
_rx_gains[name] = gain;
//write the new voltage to the aux dac
- this->get_iface()->write_aux_dac(dboard_iface::UNIT_RX, 1, dac_volts);
+ this->get_iface()->write_aux_dac(dboard_iface::UNIT_RX, 0, dac_volts);
}
else UHD_THROW_INVALID_CODE_PATH();
}
diff --git a/host/lib/usrp/usrp2/dboard_iface.cpp b/host/lib/usrp/usrp2/dboard_iface.cpp
index 9f7c7f9e6..114f83f41 100644
--- a/host/lib/usrp/usrp2/dboard_iface.cpp
+++ b/host/lib/usrp/usrp2/dboard_iface.cpp
@@ -25,7 +25,7 @@
#include <boost/asio.hpp> //htonl and ntohl
#include <boost/math/special_functions/round.hpp>
#include "ad7922_regs.hpp" //aux adc
-#include "ad5624_regs.hpp" //aux dac
+#include "ad5623_regs.hpp" //aux dac
using namespace uhd;
using namespace uhd::usrp;
@@ -72,7 +72,7 @@ private:
boost::uint32_t _ddr_shadow;
boost::uint32_t _gpio_shadow;
- uhd::dict<unit_t, ad5624_regs_t> _dac_regs;
+ uhd::dict<unit_t, ad5623_regs_t> _dac_regs;
void _write_aux_dac(unit_t);
};
@@ -99,12 +99,12 @@ usrp2_dboard_iface::usrp2_dboard_iface(
_gpio_shadow = 0;
//reset the aux dacs
- _dac_regs[UNIT_RX] = ad5624_regs_t();
- _dac_regs[UNIT_TX] = ad5624_regs_t();
+ _dac_regs[UNIT_RX] = ad5623_regs_t();
+ _dac_regs[UNIT_TX] = ad5623_regs_t();
BOOST_FOREACH(unit_t unit, _dac_regs.keys()){
_dac_regs[unit].data = 1;
- _dac_regs[unit].addr = ad5624_regs_t::ADDR_ALL;
- _dac_regs[unit].cmd = ad5624_regs_t::CMD_RESET;
+ _dac_regs[unit].addr = ad5623_regs_t::ADDR_ALL;
+ _dac_regs[unit].cmd = ad5623_regs_t::CMD_RESET;
this->_write_aux_dac(unit);
}
}
@@ -242,14 +242,25 @@ void usrp2_dboard_iface::_write_aux_dac(unit_t unit){
void usrp2_dboard_iface::write_aux_dac(unit_t unit, int which, float value){
_dac_regs[unit].data = boost::math::iround(4095*value/3.3);
- _dac_regs[unit].cmd = ad5624_regs_t::CMD_WR_UP_DAC_CHAN_N;
- switch(which){
- case 0: _dac_regs[unit].addr = ad5624_regs_t::ADDR_DAC_A; break;
- case 1: _dac_regs[unit].addr = ad5624_regs_t::ADDR_DAC_B; break;
- case 2: _dac_regs[unit].addr = ad5624_regs_t::ADDR_DAC_C; break;
- case 3: _dac_regs[unit].addr = ad5624_regs_t::ADDR_DAC_D; break;
- default: throw std::runtime_error("not a possible aux dac, must be 0, 1, 2, or 3");
- }
+ _dac_regs[unit].cmd = ad5623_regs_t::CMD_WR_UP_DAC_CHAN_N;
+ //standardize on USRP1 interface, A=0, B=1, C=2, D=3
+ static const uhd::dict<
+ unit_t, uhd::dict<int, ad5623_regs_t::addr_t>
+ > unit_to_which_to_addr = map_list_of
+ (UNIT_RX, map_list_of
+ (0, ad5623_regs_t::ADDR_DAC_B)
+ (1, ad5623_regs_t::ADDR_DAC_A)
+ (2, ad5623_regs_t::ADDR_DAC_A)
+ (3, ad5623_regs_t::ADDR_DAC_B)
+ )
+ (UNIT_TX, map_list_of
+ (0, ad5623_regs_t::ADDR_DAC_A)
+ (1, ad5623_regs_t::ADDR_DAC_B)
+ (2, ad5623_regs_t::ADDR_DAC_B)
+ (3, ad5623_regs_t::ADDR_DAC_A)
+ )
+ ;
+ _dac_regs[unit].addr = unit_to_which_to_addr[unit][which];
this->_write_aux_dac(unit);
}
generated by cgit v1.2.3 (git 2.39.1) at 2024-12-28 04:47:16 +0000