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-rw-r--r--host/lib/usrp/b100/b100_impl.cpp2
-rw-r--r--host/lib/usrp/b100/b100_impl.hpp1
-rw-r--r--host/lib/usrp/cores/rx_dsp_core_200.cpp11
-rw-r--r--host/lib/usrp/cores/rx_dsp_core_200.hpp2
-rw-r--r--host/lib/usrp/cores/tx_dsp_core_200.cpp11
-rw-r--r--host/lib/usrp/cores/tx_dsp_core_200.hpp2
-rw-r--r--host/lib/usrp/e100/e100_impl.cpp2
-rw-r--r--host/lib/usrp/e100/e100_impl.hpp1
-rw-r--r--host/lib/usrp/usrp1/io_impl.cpp14
-rw-r--r--host/lib/usrp/usrp2/usrp2_impl.cpp2
-rw-r--r--host/lib/usrp/usrp2/usrp2_impl.hpp1
11 files changed, 37 insertions, 12 deletions
diff --git a/host/lib/usrp/b100/b100_impl.cpp b/host/lib/usrp/b100/b100_impl.cpp
index 5410f57e5..b58e70694 100644
--- a/host/lib/usrp/b100/b100_impl.cpp
+++ b/host/lib/usrp/b100/b100_impl.cpp
@@ -273,6 +273,7 @@ b100_impl::b100_impl(const device_addr_t &device_addr){
_fpga_ctrl, B100_REG_SR_ADDR(B100_SR_RX_DSP1), B100_REG_SR_ADDR(B100_SR_RX_CTRL1), B100_RX_SID_BASE + 1
));
for (size_t dspno = 0; dspno < _rx_dsps.size(); dspno++){
+ _rx_dsps[dspno]->set_link_rate(B100_LINK_RATE_BPS);
_tree->access<double>(mb_path / "tick_rate")
.subscribe(boost::bind(&rx_dsp_core_200::set_tick_rate, _rx_dsps[dspno], _1));
property_tree::path_type rx_dsp_path = mb_path / str(boost::format("rx_dsps/%u") % dspno);
@@ -293,6 +294,7 @@ b100_impl::b100_impl(const device_addr_t &device_addr){
_tx_dsp = tx_dsp_core_200::make(
_fpga_ctrl, B100_REG_SR_ADDR(B100_SR_TX_DSP), B100_REG_SR_ADDR(B100_SR_TX_CTRL), B100_TX_ASYNC_SID
);
+ _tx_dsp->set_link_rate(B100_LINK_RATE_BPS);
_tree->access<double>(mb_path / "tick_rate")
.subscribe(boost::bind(&tx_dsp_core_200::set_tick_rate, _tx_dsp, _1));
_tree->create<double>(mb_path / "tx_dsps/0/rate/value")
diff --git a/host/lib/usrp/b100/b100_impl.hpp b/host/lib/usrp/b100/b100_impl.hpp
index 115fba985..62a22674e 100644
--- a/host/lib/usrp/b100/b100_impl.hpp
+++ b/host/lib/usrp/b100/b100_impl.hpp
@@ -42,6 +42,7 @@
#include <uhd/usrp/dboard_manager.hpp>
#include <uhd/transport/usb_zero_copy.hpp>
+static const double B100_LINK_RATE_BPS = 256e6/8; //pratical link rate (< 480 Mbps)
static const std::string B100_FW_FILE_NAME = "usrp_b100_fw.ihx";
static const std::string B100_FPGA_FILE_NAME = "usrp_b100_fpga.bin";
static const boost::uint16_t B100_FW_COMPAT_NUM = 0x02;
diff --git a/host/lib/usrp/cores/rx_dsp_core_200.cpp b/host/lib/usrp/cores/rx_dsp_core_200.cpp
index 0c065e228..e059ddfca 100644
--- a/host/lib/usrp/cores/rx_dsp_core_200.cpp
+++ b/host/lib/usrp/cores/rx_dsp_core_200.cpp
@@ -18,6 +18,7 @@
#include "rx_dsp_core_200.hpp"
#include <uhd/types/dict.hpp>
#include <uhd/exception.hpp>
+#include <uhd/utils/algorithm.hpp>
#include <boost/assign/list_of.hpp>
#include <boost/math/special_functions/round.hpp>
#include <boost/math/special_functions/sign.hpp>
@@ -122,8 +123,14 @@ public:
_tick_rate = rate;
}
+ void set_link_rate(const double rate){
+ _link_rate = rate/sizeof(boost::uint32_t); //in samps/s
+ }
+
double set_host_rate(const double rate){
- const size_t decim_rate = boost::math::iround(_tick_rate/rate);
+ const size_t decim_rate = uhd::clip<size_t>(
+ boost::math::iround(_tick_rate/rate), size_t(std::ceil(_tick_rate/_link_rate)), 512
+ );
size_t decim = decim_rate;
//determine which half-band filters are activated
@@ -172,7 +179,7 @@ public:
private:
wb_iface::sptr _iface;
const size_t _dsp_base, _ctrl_base;
- double _tick_rate;
+ double _tick_rate, _link_rate;
bool _continuous_streaming;
};
diff --git a/host/lib/usrp/cores/rx_dsp_core_200.hpp b/host/lib/usrp/cores/rx_dsp_core_200.hpp
index 72ed07230..abe7bf817 100644
--- a/host/lib/usrp/cores/rx_dsp_core_200.hpp
+++ b/host/lib/usrp/cores/rx_dsp_core_200.hpp
@@ -44,6 +44,8 @@ public:
virtual void set_tick_rate(const double rate) = 0;
+ virtual void set_link_rate(const double rate) = 0;
+
virtual double set_host_rate(const double rate) = 0;
virtual uhd::meta_range_t get_freq_range(void) = 0;
diff --git a/host/lib/usrp/cores/tx_dsp_core_200.cpp b/host/lib/usrp/cores/tx_dsp_core_200.cpp
index d2981bbdb..222ba589a 100644
--- a/host/lib/usrp/cores/tx_dsp_core_200.cpp
+++ b/host/lib/usrp/cores/tx_dsp_core_200.cpp
@@ -18,6 +18,7 @@
#include "tx_dsp_core_200.hpp"
#include <uhd/types/dict.hpp>
#include <uhd/exception.hpp>
+#include <uhd/utils/algorithm.hpp>
#include <boost/assign/list_of.hpp>
#include <boost/math/special_functions/round.hpp>
#include <boost/math/special_functions/sign.hpp>
@@ -68,8 +69,14 @@ public:
_tick_rate = rate;
}
+ void set_link_rate(const double rate){
+ _link_rate = rate/sizeof(boost::uint32_t); //in samps/s
+ }
+
double set_host_rate(const double rate){
- const size_t interp_rate = boost::math::iround(_tick_rate/rate);
+ const size_t interp_rate = uhd::clip<size_t>(
+ boost::math::iround(_tick_rate/rate), size_t(std::ceil(_tick_rate/_link_rate)), 512
+ );
size_t interp = interp_rate;
//determine which half-band filters are activated
@@ -125,7 +132,7 @@ public:
private:
wb_iface::sptr _iface;
const size_t _dsp_base, _ctrl_base;
- double _tick_rate;
+ double _tick_rate, _link_rate;
};
tx_dsp_core_200::sptr tx_dsp_core_200::make(wb_iface::sptr iface, const size_t dsp_base, const size_t ctrl_base, const boost::uint32_t sid){
diff --git a/host/lib/usrp/cores/tx_dsp_core_200.hpp b/host/lib/usrp/cores/tx_dsp_core_200.hpp
index f74ec0bdb..65f822558 100644
--- a/host/lib/usrp/cores/tx_dsp_core_200.hpp
+++ b/host/lib/usrp/cores/tx_dsp_core_200.hpp
@@ -36,6 +36,8 @@ public:
virtual void set_tick_rate(const double rate) = 0;
+ virtual void set_link_rate(const double rate) = 0;
+
virtual double set_host_rate(const double rate) = 0;
virtual uhd::meta_range_t get_freq_range(void) = 0;
diff --git a/host/lib/usrp/e100/e100_impl.cpp b/host/lib/usrp/e100/e100_impl.cpp
index 8086eb985..a86a75816 100644
--- a/host/lib/usrp/e100/e100_impl.cpp
+++ b/host/lib/usrp/e100/e100_impl.cpp
@@ -232,6 +232,7 @@ e100_impl::e100_impl(const uhd::device_addr_t &device_addr){
_fpga_ctrl, E100_REG_SR_ADDR(UE_SR_RX_DSP1), E100_REG_SR_ADDR(UE_SR_RX_CTRL1), E100_RX_SID_BASE + 1
));
for (size_t dspno = 0; dspno < _rx_dsps.size(); dspno++){
+ _rx_dsps[dspno]->set_link_rate(E100_LINK_RATE_BPS);
_tree->access<double>(mb_path / "tick_rate")
.subscribe(boost::bind(&rx_dsp_core_200::set_tick_rate, _rx_dsps[dspno], _1));
property_tree::path_type rx_dsp_path = mb_path / str(boost::format("rx_dsps/%u") % dspno);
@@ -252,6 +253,7 @@ e100_impl::e100_impl(const uhd::device_addr_t &device_addr){
_tx_dsp = tx_dsp_core_200::make(
_fpga_ctrl, E100_REG_SR_ADDR(UE_SR_TX_DSP), E100_REG_SR_ADDR(UE_SR_TX_CTRL), E100_TX_ASYNC_SID
);
+ _tx_dsp->set_link_rate(E100_LINK_RATE_BPS);
_tree->access<double>(mb_path / "tick_rate")
.subscribe(boost::bind(&tx_dsp_core_200::set_tick_rate, _tx_dsp, _1));
_tree->create<double>(mb_path / "tx_dsps/0/rate/value")
diff --git a/host/lib/usrp/e100/e100_impl.hpp b/host/lib/usrp/e100/e100_impl.hpp
index a7051d497..e24360223 100644
--- a/host/lib/usrp/e100/e100_impl.hpp
+++ b/host/lib/usrp/e100/e100_impl.hpp
@@ -42,6 +42,7 @@
uhd::transport::zero_copy_if::sptr e100_make_mmap_zero_copy(e100_ctrl::sptr iface);
+static const double E100_LINK_RATE_BPS = 256e6/8;
static const std::string E100_I2C_DEV_NODE = "/dev/i2c-3";
static const std::string E100_FPGA_FILE_NAME = "usrp_e100_fpga_v2.bin";
static const boost::uint16_t E100_FPGA_COMPAT_NUM = 0x05;
diff --git a/host/lib/usrp/usrp1/io_impl.cpp b/host/lib/usrp/usrp1/io_impl.cpp
index bf34fde4f..b596bbd04 100644
--- a/host/lib/usrp/usrp1/io_impl.cpp
+++ b/host/lib/usrp/usrp1/io_impl.cpp
@@ -383,10 +383,9 @@ void usrp1_impl::update_tx_subdev_spec(const uhd::usrp::subdev_spec_t &spec){
double usrp1_impl::update_rx_samp_rate(const double samp_rate){
boost::mutex::scoped_lock lock = _io_impl->recv_handler.get_scoped_lock();
- size_t rate = boost::math::iround(_master_clock_rate / samp_rate);
-
- //clip the rate to something in range:
- rate = std::min<size_t>(std::max<size_t>(rate, 4), 256);
+ const size_t rate = uhd::clip<size_t>(
+ boost::math::iround(_master_clock_rate / samp_rate), size_t(std::ceil(_master_clock_rate / 8e6)), 256
+ );
bool s = this->disable_rx();
_iface->poke32(FR_DECIM_RATE, rate/2 - 1);
@@ -399,10 +398,9 @@ double usrp1_impl::update_rx_samp_rate(const double samp_rate){
double usrp1_impl::update_tx_samp_rate(const double samp_rate){
boost::mutex::scoped_lock lock = _io_impl->send_handler.get_scoped_lock();
- size_t rate = boost::math::iround(_master_clock_rate / samp_rate);
-
- //clip the rate to something in range:
- rate = std::min<size_t>(std::max<size_t>(rate, 4), 256);
+ const size_t rate = uhd::clip<size_t>(
+ boost::math::iround(_master_clock_rate / samp_rate), size_t(std::ceil(_master_clock_rate / 8e6)), 256
+ );
bool s = this->disable_tx();
_iface->poke32(FR_INTERP_RATE, rate/2 - 1);
diff --git a/host/lib/usrp/usrp2/usrp2_impl.cpp b/host/lib/usrp/usrp2/usrp2_impl.cpp
index 9741bec44..390d1813b 100644
--- a/host/lib/usrp/usrp2/usrp2_impl.cpp
+++ b/host/lib/usrp/usrp2/usrp2_impl.cpp
@@ -445,6 +445,7 @@ usrp2_impl::usrp2_impl(const device_addr_t &_device_addr){
_mbc[mb].iface, U2_REG_SR_ADDR(SR_RX_DSP1), U2_REG_SR_ADDR(SR_RX_CTRL1), USRP2_RX_SID_BASE + 1, true
));
for (size_t dspno = 0; dspno < _mbc[mb].rx_dsps.size(); dspno++){
+ _mbc[mb].rx_dsps[dspno]->set_link_rate(USRP2_LINK_RATE_BPS);
_tree->access<double>(mb_path / "tick_rate")
.subscribe(boost::bind(&rx_dsp_core_200::set_tick_rate, _mbc[mb].rx_dsps[dspno], _1));
//This is a hack/fix for the lingering packet problem.
@@ -469,6 +470,7 @@ usrp2_impl::usrp2_impl(const device_addr_t &_device_addr){
_mbc[mb].tx_dsp = tx_dsp_core_200::make(
_mbc[mb].iface, U2_REG_SR_ADDR(SR_TX_DSP), U2_REG_SR_ADDR(SR_TX_CTRL), USRP2_TX_ASYNC_SID
);
+ _mbc[mb].tx_dsp->set_link_rate(USRP2_LINK_RATE_BPS);
_tree->access<double>(mb_path / "tick_rate")
.subscribe(boost::bind(&tx_dsp_core_200::set_tick_rate, _mbc[mb].tx_dsp, _1));
_tree->create<double>(mb_path / "tx_dsps/0/rate/value")
diff --git a/host/lib/usrp/usrp2/usrp2_impl.hpp b/host/lib/usrp/usrp2/usrp2_impl.hpp
index eae7b7dcb..f2125e094 100644
--- a/host/lib/usrp/usrp2/usrp2_impl.hpp
+++ b/host/lib/usrp/usrp2/usrp2_impl.hpp
@@ -43,6 +43,7 @@
#include <uhd/usrp/dboard_manager.hpp>
#include <uhd/usrp/subdev_spec.hpp>
+static const double USRP2_LINK_RATE_BPS = 1000e6/8;
static const double mimo_clock_delay_usrp2_rev4 = 4.18e-9;
static const double mimo_clock_delay_usrp_n2xx = 3.55e-9;
static const size_t mimo_clock_sync_delay_cycles = 137;
generated by cgit v1.2.3 (git 2.39.1) at 2024-12-29 12:29:45 +0000