diff options
Diffstat (limited to 'host/lib/usrp/usrp_e100/clock_ctrl.cpp')
| -rw-r--r-- | host/lib/usrp/usrp_e100/clock_ctrl.cpp | 12 |
1 files changed, 6 insertions, 6 deletions
diff --git a/host/lib/usrp/usrp_e100/clock_ctrl.cpp b/host/lib/usrp/usrp_e100/clock_ctrl.cpp index e29fe18ce..bb6fb7e3b 100644 --- a/host/lib/usrp/usrp_e100/clock_ctrl.cpp +++ b/host/lib/usrp/usrp_e100/clock_ctrl.cpp @@ -17,7 +17,7 @@ #include "clock_ctrl.hpp" #include "ad9522_regs.hpp" -#include <uhd/utils/assert.hpp> +#include <uhd/utils/assert_has.hpp> #include <boost/cstdint.hpp> #include "usrp_e100_regs.hpp" //spi slave constants #include <boost/assign/list_of.hpp> @@ -158,7 +158,7 @@ static clock_settings_type get_clock_settings(double rate){ } } - throw std::runtime_error(str(boost::format( + throw uhd::value_error(str(boost::format( "USRP-E100 clock control: could not calculate settings for clock rate %fMHz" ) % (rate/1e6))); } @@ -409,10 +409,10 @@ private: void send_reg(boost::uint16_t addr){ boost::uint32_t reg = _ad9522_regs.get_write_reg(addr); //std::cout << "clock control write reg: " << std::hex << reg << std::endl; - _iface->transact_spi( + _iface->write_spi( UE_SPI_SS_AD9522, spi_config_t::EDGE_RISE, - reg, 24, false /*no rb*/ + reg, 24 ); } @@ -427,9 +427,9 @@ private: //wait for calibration done: static const boost::uint8_t addr = 0x01F; for (size_t ms10 = 0; ms10 < 100; ms10++){ - boost::uint32_t reg = _iface->transact_spi( + boost::uint32_t reg = _iface->read_spi( UE_SPI_SS_AD9522, spi_config_t::EDGE_RISE, - _ad9522_regs.get_read_reg(addr), 24, true /*rb*/ + _ad9522_regs.get_read_reg(addr), 24 ); _ad9522_regs.set_reg(addr, reg); if (_ad9522_regs.vco_calibration_finished) return; |