diff options
Diffstat (limited to 'host/lib/usrp/usrp2')
| -rw-r--r-- | host/lib/usrp/usrp2/mboard_impl.cpp | 1 | ||||
| -rw-r--r-- | host/lib/usrp/usrp2/usrp2_regs.cpp | 1 | ||||
| -rw-r--r-- | host/lib/usrp/usrp2/usrp2_regs.hpp | 6 |
3 files changed, 8 insertions, 0 deletions
diff --git a/host/lib/usrp/usrp2/mboard_impl.cpp b/host/lib/usrp/usrp2/mboard_impl.cpp index 7243880f3..c8e22a709 100644 --- a/host/lib/usrp/usrp2/mboard_impl.cpp +++ b/host/lib/usrp/usrp2/mboard_impl.cpp @@ -89,6 +89,7 @@ usrp2_mboard_impl::usrp2_mboard_impl( _iface->poke32(_iface->regs.tx_ctrl_num_chan, 0); //1 channel _iface->poke32(_iface->regs.tx_ctrl_clear_state, 1); //reset _iface->poke32(_iface->regs.tx_ctrl_report_sid, 1); //sid 1 (different from rx) + _iface->poke32(_iface->regs.tx_ctrl_policy, U2_FLAG_TX_CTRL_POLICY_NEXT_PACKET); //init the ddc init_ddc_config(); diff --git a/host/lib/usrp/usrp2/usrp2_regs.cpp b/host/lib/usrp/usrp2/usrp2_regs.cpp index e40407f99..857fbda9c 100644 --- a/host/lib/usrp/usrp2/usrp2_regs.cpp +++ b/host/lib/usrp/usrp2/usrp2_regs.cpp @@ -92,6 +92,7 @@ usrp2_regs_t usrp2_get_regs(int hw_rev) { x.tx_ctrl_num_chan = sr_addr(misc_output_base, x.sr_tx_ctrl + 0); x.tx_ctrl_clear_state = sr_addr(misc_output_base, x.sr_tx_ctrl + 1); x.tx_ctrl_report_sid = sr_addr(misc_output_base, x.sr_tx_ctrl + 2); + x.tx_ctrl_policy = sr_addr(misc_output_base, x.sr_tx_ctrl + 3); return x; } diff --git a/host/lib/usrp/usrp2/usrp2_regs.hpp b/host/lib/usrp/usrp2/usrp2_regs.hpp index 8dbd6c4b4..c12098c8e 100644 --- a/host/lib/usrp/usrp2/usrp2_regs.hpp +++ b/host/lib/usrp/usrp2/usrp2_regs.hpp @@ -97,6 +97,7 @@ typedef struct { int tx_ctrl_num_chan; int tx_ctrl_clear_state; int tx_ctrl_report_sid; + int tx_ctrl_policy; } usrp2_regs_t; extern const usrp2_regs_t usrp2_regs; //the register definitions, set in usrp2_regs.cpp and usrp2p_regs.cpp @@ -261,5 +262,10 @@ usrp2_regs_t usrp2_get_regs(int hw_rev); //#define U2_REG_TX_CTRL_NUM_CHAN _SR_ADDR(SR_TX_CTRL + 0) //#define U2_REG_TX_CTRL_CLEAR_STATE _SR_ADDR(SR_TX_CTRL + 1) //#define U2_REG_TX_CTRL_REPORT_SID _SR_ADDR(SR_TX_CTRL + 2) +//#define U2_REG_TX_CTRL_POLICY _SR_ADDR(SR_TX_CTRL + 3) + +#define U2_FLAG_TX_CTRL_POLICY_WAIT (0x1 << 0) +#define U2_FLAG_TX_CTRL_POLICY_NEXT_PACKET (0x1 << 1) +#define U2_FLAG_TX_CTRL_POLICY_NEXT_BURST (0x1 << 2) #endif /* INCLUDED_USRP2_REGS_HPP */ |