diff options
Diffstat (limited to 'host/lib/usrp/usrp1')
| -rw-r--r-- | host/lib/usrp/usrp1/codec_ctrl.cpp | 4 | ||||
| -rw-r--r-- | host/lib/usrp/usrp1/dsp_impl.cpp | 97 | ||||
| -rw-r--r-- | host/lib/usrp/usrp1/io_impl.cpp | 481 | ||||
| -rw-r--r-- | host/lib/usrp/usrp1/mboard_impl.cpp | 74 | ||||
| -rw-r--r-- | host/lib/usrp/usrp1/usrp1_ctrl.cpp | 28 | ||||
| -rw-r--r-- | host/lib/usrp/usrp1/usrp1_iface.cpp | 4 | ||||
| -rw-r--r-- | host/lib/usrp/usrp1/usrp1_impl.cpp | 7 | ||||
| -rw-r--r-- | host/lib/usrp/usrp1/usrp1_impl.hpp | 24 |
8 files changed, 387 insertions, 332 deletions
diff --git a/host/lib/usrp/usrp1/codec_ctrl.cpp b/host/lib/usrp/usrp1/codec_ctrl.cpp index 3ab02eeeb..33b18b196 100644 --- a/host/lib/usrp/usrp1/codec_ctrl.cpp +++ b/host/lib/usrp/usrp1/codec_ctrl.cpp @@ -129,7 +129,7 @@ usrp1_codec_ctrl_impl::usrp1_codec_ctrl_impl(usrp1_iface::sptr iface, _ad9862_regs.clkout2_div_factor = ad9862_regs_t::CLKOUT2_DIV_FACTOR_2; //write the register settings to the codec - for (uint8_t addr = 0; addr <= 25; addr++) { + for (boost::uint8_t addr = 0; addr <= 25; addr++) { this->send_reg(addr); } @@ -202,7 +202,7 @@ float usrp1_codec_ctrl_impl::get_rx_pga_gain(char which){ **********************************************************************/ static float aux_adc_to_volts(boost::uint8_t high, boost::uint8_t low) { - return float((boost::uint16_t(high) << 2) | low)*3.3/0x3ff; + return float(((boost::uint16_t(high) << 2) | low)*3.3)/0x3ff; } float usrp1_codec_ctrl_impl::read_aux_adc(aux_adc_t which) diff --git a/host/lib/usrp/usrp1/dsp_impl.cpp b/host/lib/usrp/usrp1/dsp_impl.cpp index d5a88fa2d..e9a5e60a6 100644 --- a/host/lib/usrp/usrp1/dsp_impl.cpp +++ b/host/lib/usrp/usrp1/dsp_impl.cpp @@ -21,6 +21,8 @@ #include <uhd/usrp/dsp_props.hpp> #include <boost/bind.hpp> #include <boost/format.hpp> +#include <boost/lexical_cast.hpp> +#include <boost/assign/list_of.hpp> #include <iostream> #include <cmath> @@ -42,11 +44,15 @@ void usrp1_impl::rx_dsp_init(void) /*********************************************************************** * RX DDC Get **********************************************************************/ -void usrp1_impl::rx_dsp_get(const wax::obj &key, wax::obj &val) -{ +void usrp1_impl::rx_dsp_get(const wax::obj &key_, wax::obj &val){ + named_prop_t key = named_prop_t::extract(key_); + switch(key.as<dsp_prop_t>()){ case DSP_PROP_NAME: - val = std::string("usrp1 ddc0"); + val = str(boost::format("usrp1 ddc %uX %s") + % this->get_num_ddcs() + % (this->has_rx_halfband()? "+ hb" : "") + ); return; case DSP_PROP_OTHERS: @@ -54,7 +60,16 @@ void usrp1_impl::rx_dsp_get(const wax::obj &key, wax::obj &val) return; case DSP_PROP_FREQ_SHIFT: - val = _rx_dsp_freq; + val = _rx_dsp_freqs[key.name]; + return; + + case DSP_PROP_FREQ_SHIFT_NAMES:{ + prop_names_t names; + for(size_t i = 0; i < this->get_num_ddcs(); i++){ + names.push_back(boost::lexical_cast<std::string>(i)); + } + val = names; + } return; case DSP_PROP_CODEC_RATE: @@ -73,30 +88,26 @@ void usrp1_impl::rx_dsp_get(const wax::obj &key, wax::obj &val) /*********************************************************************** * RX DDC Set **********************************************************************/ -void usrp1_impl::rx_dsp_set(const wax::obj &key, const wax::obj &val) -{ +void usrp1_impl::rx_dsp_set(const wax::obj &key_, const wax::obj &val){ + named_prop_t key = named_prop_t::extract(key_); + switch(key.as<dsp_prop_t>()) { case DSP_PROP_FREQ_SHIFT: { double new_freq = val.as<double>(); boost::uint32_t reg_word = dsp_type1::calc_cordic_word_and_update( new_freq, _clock_ctrl->get_master_clock_freq()); - //TODO TODO TODO TODO TODO TODO TODO TODO TODO - // - // Handle multiple receive channels / DDC's - // - //TODO TODO TODO TODO TODO TODO TODO TODO TODO - _iface->poke32(FR_RX_FREQ_0, reg_word); - _iface->poke32(FR_RX_FREQ_1, reg_word); - _iface->poke32(FR_RX_FREQ_2, reg_word); - _iface->poke32(FR_RX_FREQ_3, reg_word); - - _rx_dsp_freq = new_freq; + static const uhd::dict<std::string, boost::uint32_t> + freq_name_to_reg_val = boost::assign::map_list_of + ("0", FR_RX_FREQ_0) ("1", FR_RX_FREQ_1) + ("2", FR_RX_FREQ_2) ("3", FR_RX_FREQ_3) + ; + _iface->poke32(freq_name_to_reg_val[key.name], reg_word); + _rx_dsp_freqs[key.name] = new_freq; return; } case DSP_PROP_HOST_RATE: { - unsigned int rate = - _clock_ctrl->get_master_clock_freq() / val.as<double>(); + size_t rate = size_t(_clock_ctrl->get_master_clock_freq() / val.as<double>()); if ((rate & 0x01) || (rate < 4) || (rate > 256)) { std::cerr << "Decimation must be even and between 4 and 256" @@ -106,7 +117,7 @@ void usrp1_impl::rx_dsp_set(const wax::obj &key, const wax::obj &val) _rx_dsp_decim = rate; //TODO Poll every 100ms. Make it selectable? - _rx_samps_per_poll_interval = 0.1 * _clock_ctrl->get_master_clock_freq() / rate; + _rx_samps_per_poll_interval = size_t(0.1 * _clock_ctrl->get_master_clock_freq() / rate); _iface->poke32(FR_DECIM_RATE, _rx_dsp_decim/2 - 1); } @@ -133,11 +144,15 @@ void usrp1_impl::tx_dsp_init(void) /*********************************************************************** * TX DUC Get **********************************************************************/ -void usrp1_impl::tx_dsp_get(const wax::obj &key, wax::obj &val) -{ +void usrp1_impl::tx_dsp_get(const wax::obj &key_, wax::obj &val){ + named_prop_t key = named_prop_t::extract(key_); + switch(key.as<dsp_prop_t>()) { case DSP_PROP_NAME: - val = std::string("usrp1 duc0"); + val = str(boost::format("usrp1 duc %uX %s") + % this->get_num_ducs() + % (this->has_tx_halfband()? "+ hb" : "") + ); return; case DSP_PROP_OTHERS: @@ -145,7 +160,16 @@ void usrp1_impl::tx_dsp_get(const wax::obj &key, wax::obj &val) return; case DSP_PROP_FREQ_SHIFT: - val = _tx_dsp_freq; + val = _tx_dsp_freqs[key.name]; + return; + + case DSP_PROP_FREQ_SHIFT_NAMES:{ + prop_names_t names; + for(size_t i = 0; i < this->get_num_ducs(); i++){ + names.push_back(boost::lexical_cast<std::string>(i)); + } + val = names; + } return; case DSP_PROP_CODEC_RATE: @@ -164,26 +188,25 @@ void usrp1_impl::tx_dsp_get(const wax::obj &key, wax::obj &val) /*********************************************************************** * TX DUC Set **********************************************************************/ -void usrp1_impl::tx_dsp_set(const wax::obj &key, const wax::obj &val) -{ +void usrp1_impl::tx_dsp_set(const wax::obj &key_, const wax::obj &val){ + named_prop_t key = named_prop_t::extract(key_); + switch(key.as<dsp_prop_t>()) { - //TODO TODO TODO TODO TODO TODO TODO TODO TODO TODO TODO TODO - // - // Set both codec frequencies until we have duality properties - // - //TODO TODO TODO TODO TODO TODO TODO TODO TODO TODO TODO TODO case DSP_PROP_FREQ_SHIFT: { double new_freq = val.as<double>(); - _codec_ctrls[DBOARD_SLOT_A]->set_duc_freq(new_freq); - _codec_ctrls[DBOARD_SLOT_B]->set_duc_freq(new_freq); - _tx_dsp_freq = new_freq; + + //map the freq shift key to a subdev spec to a particular codec chip + std::string db_name = _tx_subdev_spec.at(boost::lexical_cast<size_t>(key.name)).db_name; + if (db_name == "A") _codec_ctrls[DBOARD_SLOT_A]->set_duc_freq(new_freq); + if (db_name == "B") _codec_ctrls[DBOARD_SLOT_B]->set_duc_freq(new_freq); + + _tx_dsp_freqs[key.name] = new_freq; return; } case DSP_PROP_HOST_RATE: { - unsigned int rate = - _clock_ctrl->get_master_clock_freq() * 2 / val.as<double>(); + size_t rate = size_t(_clock_ctrl->get_master_clock_freq() * 2 / val.as<double>()); if ((rate & 0x01) || (rate < 8) || (rate > 512)) { std::cerr << "Interpolation rate must be even and between 8 and 512" @@ -194,7 +217,7 @@ void usrp1_impl::tx_dsp_set(const wax::obj &key, const wax::obj &val) _tx_dsp_interp = rate; //TODO Poll every 100ms. Make it selectable? - _tx_samps_per_poll_interval = 0.1 * _clock_ctrl->get_master_clock_freq() * 2 / rate; + _tx_samps_per_poll_interval = size_t(0.1 * _clock_ctrl->get_master_clock_freq() * 2 / rate); _iface->poke32(FR_INTERP_RATE, _tx_dsp_interp / 4 - 1); return; diff --git a/host/lib/usrp/usrp1/io_impl.cpp b/host/lib/usrp/usrp1/io_impl.cpp index 92e8bc20a..73974f2d6 100644 --- a/host/lib/usrp/usrp1/io_impl.cpp +++ b/host/lib/usrp/usrp1/io_impl.cpp @@ -33,294 +33,283 @@ using namespace uhd::usrp; using namespace uhd::transport; namespace asio = boost::asio; -struct usrp1_send_state { - uhd::transport::managed_send_buffer::sptr send_buff; - size_t bytes_written; - size_t underrun_poll_samp_count; - - size_t bytes_free() +/*********************************************************************** + * Pseudo send buffer implementation + **********************************************************************/ +class pseudo_managed_send_buffer : public managed_send_buffer{ +public: + + pseudo_managed_send_buffer( + const boost::asio::mutable_buffer &buff, + const boost::function<ssize_t(size_t)> &commit + ): + _buff(buff), + _commit(commit) { - if (send_buff != NULL) - return send_buff->size() - bytes_written; - else - return 0; + /* NOP */ } -}; -struct usrp1_recv_state { - uhd::transport::managed_recv_buffer::sptr recv_buff; - size_t bytes_read; - size_t overrun_poll_samp_count; + ssize_t commit(size_t num_bytes){ + return _commit(num_bytes); + } - size_t bytes_avail() - { - if (recv_buff != NULL) - return recv_buff->size() - bytes_read; - else - return 0; +private: + const boost::asio::mutable_buffer &get(void) const{ + return _buff; } -}; -/*********************************************************************** - * IO Implementation Details - **********************************************************************/ -struct usrp1_impl::io_impl { - io_impl(); - ~io_impl(void); - - //state handling for buffer management - usrp1_recv_state recv_state; - usrp1_send_state send_state; - - //send transport management - bool get_send_buffer(zero_copy_if::sptr zc_if); - size_t copy_convert_send_samps(const void *buff, size_t num_samps, - size_t sample_offset, const io_type_t io_type, - otw_type_t otw_type); - bool conditional_buff_commit(bool force); - bool check_underrun(usrp_ctrl::sptr ctrl_if, - size_t poll_interval, bool force); - - //recv transport management - bool get_recv_buffer(zero_copy_if::sptr zc_if); - size_t copy_convert_recv_samps(void *buff, size_t num_samps, - size_t sample_offset, const io_type_t io_type, - otw_type_t otw_type); - bool check_overrun(usrp_ctrl::sptr ctrl_if, - size_t poll_interval, bool force); + const boost::asio::mutable_buffer _buff; + const boost::function<ssize_t(size_t)> _commit; }; -usrp1_impl::io_impl::io_impl() -{ - send_state.send_buff = uhd::transport::managed_send_buffer::sptr(); - recv_state.recv_buff = uhd::transport::managed_recv_buffer::sptr(); -} - -usrp1_impl::io_impl::~io_impl(void) -{ - /* NOP */ -} - -void usrp1_impl::io_init(void) -{ - _rx_otw_type.width = 16; - _rx_otw_type.shift = 0; - _rx_otw_type.byteorder = otw_type_t::BO_LITTLE_ENDIAN; - - _tx_otw_type.width = 16; - _tx_otw_type.shift = 0; - _tx_otw_type.byteorder = otw_type_t::BO_LITTLE_ENDIAN; - - _io_impl = UHD_PIMPL_MAKE(io_impl, ()); -} - /*********************************************************************** - * Data Send + * IO Implementation Details **********************************************************************/ -bool usrp1_impl::io_impl::get_send_buffer(zero_copy_if::sptr zc_if) -{ - if (send_state.send_buff == NULL) { +struct usrp1_impl::io_impl{ + io_impl(zero_copy_if::sptr data_transport): + data_transport(data_transport), + underflow_poll_samp_count(0), + overflow_poll_samp_count(0), + send_buff(data_transport->get_send_buff()), + num_bytes_committed(0) + { + /* NOP */ + } - send_state.send_buff = zc_if->get_send_buff(); - if (send_state.send_buff == NULL) - return false; + ~io_impl(void){ + flush_send_buff(); + } - send_state.bytes_written = 0; + zero_copy_if::sptr data_transport; + + //state management for the vrt packet handler code + vrt_packet_handler::recv_state packet_handler_recv_state; + vrt_packet_handler::send_state packet_handler_send_state; + + //state management for overflow and underflow + size_t underflow_poll_samp_count; + size_t overflow_poll_samp_count; + + //wrapper around the actual send buffer interface + //all of this to ensure only full buffers are committed + managed_send_buffer::sptr send_buff; + size_t num_bytes_committed; + boost::uint8_t pseudo_buff[BYTES_PER_PACKET]; + ssize_t phony_commit_pseudo_buff(size_t num_bytes); + ssize_t phony_commit_send_buff(size_t num_bytes); + ssize_t commit_send_buff(void); + void flush_send_buff(void); + bool get_send_buffs(vrt_packet_handler::managed_send_buffs_t &); + + //helpers to get at the send buffer + offset + inline void *get_send_mem_ptr(void){ + return send_buff->cast<boost::uint8_t *>() + num_bytes_committed; + } + inline size_t get_send_mem_size(void){ + return send_buff->size() - num_bytes_committed; } +}; - return true; +/*! + * Accept a commit of num bytes to the pseudo buffer. + * Memcpy the entire contents of pseudo buffer into send buffers. + * + * Under most conditions: + * The first loop iteration will fill the remainder of the send buffer. + * The second loop iteration will empty the pseudo buffer remainder. + */ +ssize_t usrp1_impl::io_impl::phony_commit_pseudo_buff(size_t num_bytes){ + size_t bytes_to_copy = num_bytes, bytes_copied = 0; + while(bytes_to_copy){ + size_t bytes_copied_here = std::min(bytes_to_copy, get_send_mem_size()); + std::memcpy(get_send_mem_ptr(), pseudo_buff + bytes_copied, bytes_copied_here); + ssize_t ret = phony_commit_send_buff(bytes_copied_here); + if (ret < 0) return ret; + bytes_to_copy -= ret; + bytes_copied += ret; + } + return bytes_copied; } -size_t usrp1_impl::io_impl::copy_convert_send_samps(const void *buff, - size_t num_samps, - size_t sample_offset, - const io_type_t io_type, - otw_type_t otw_type) -{ - UHD_ASSERT_THROW(send_state.bytes_free() % otw_type.get_sample_size() == 0); - - size_t samps_free = send_state.bytes_free() / otw_type.get_sample_size(); - size_t copy_samps = std::min(num_samps - sample_offset, samps_free); - - const boost::uint8_t *io_mem = - reinterpret_cast<const boost::uint8_t *>(buff); - - boost::uint8_t *otw_mem = send_state.send_buff->cast<boost::uint8_t *>(); - - convert_io_type_to_otw_type(io_mem + sample_offset * io_type.size, - io_type, - otw_mem + send_state.bytes_written, - otw_type, - copy_samps); - - send_state.bytes_written += copy_samps * otw_type.get_sample_size(); - send_state.underrun_poll_samp_count += copy_samps; - - return copy_samps; +/*! + * Accept a commit of num bytes to the send buffer. + * Conditionally commit the send buffer if full. + */ +ssize_t usrp1_impl::io_impl::phony_commit_send_buff(size_t num_bytes){ + num_bytes_committed += num_bytes; + if (num_bytes_committed != send_buff->size()) return num_bytes; + ssize_t ret = commit_send_buff(); + return (ret < 0)? ret : num_bytes; } -bool usrp1_impl::io_impl::conditional_buff_commit(bool force) -{ - if (send_state.bytes_written % 512) - return false; - - if (force || send_state.bytes_free() == 0) { - send_state.send_buff->commit(send_state.bytes_written); - send_state.send_buff = uhd::transport::managed_send_buffer::sptr(); - return true; - } - - return false; +/*! + * Flush the send buffer: + * Zero-pad the send buffer to the nearest 512 byte boundary and commit. + */ +void usrp1_impl::io_impl::flush_send_buff(void){ + size_t bytes_to_pad = (-1*num_bytes_committed)%512; + std::memset(get_send_mem_ptr(), 0, bytes_to_pad); + num_bytes_committed += bytes_to_pad; + commit_send_buff(); } -bool usrp1_impl::io_impl::check_underrun(usrp_ctrl::sptr ctrl_if, - size_t poll_interval, - bool force) -{ - unsigned char underrun = 0; - - bool ready_to_poll = send_state.underrun_poll_samp_count > poll_interval; - - if (force || ready_to_poll) { - int ret = ctrl_if->usrp_control_read(VRQ_GET_STATUS, - 0, - GS_TX_UNDERRUN, - &underrun, sizeof(char)); - if (ret < 0) - std::cerr << "USRP: underrun check failed" << std::endl; - if (underrun) - std::cerr << "U" << std::flush; - - send_state.underrun_poll_samp_count = 0; - } - - return (bool) underrun; +/*! + * Perform an actual commit on the send buffer: + * Commit the contents of the send buffer and request a new buffer. + */ +ssize_t usrp1_impl::io_impl::commit_send_buff(void){ + ssize_t ret = send_buff->commit(num_bytes_committed); + send_buff = data_transport->get_send_buff(); + num_bytes_committed = 0; + return ret; } -size_t usrp1_impl::send(const std::vector<const void *> &buffs, - size_t num_samps, - const tx_metadata_t &, - const io_type_t &io_type, - send_mode_t) -{ +bool usrp1_impl::io_impl::get_send_buffs( + vrt_packet_handler::managed_send_buffs_t &buffs +){ UHD_ASSERT_THROW(buffs.size() == 1); - size_t total_samps_sent = 0; - - while (total_samps_sent < num_samps) { - if (!_io_impl->get_send_buffer(_data_transport)) - return 0; - - total_samps_sent += _io_impl->copy_convert_send_samps(buffs[0], - num_samps, - total_samps_sent, - io_type, - _tx_otw_type); - if (total_samps_sent == num_samps) - _io_impl->conditional_buff_commit(true); - else - _io_impl->conditional_buff_commit(false); - - _io_impl->check_underrun(_ctrl_transport, - _tx_samps_per_poll_interval, false); + //not enough bytes free -> use the pseudo buffer + if (get_send_mem_size() < BYTES_PER_PACKET){ + buffs[0] = managed_send_buffer::sptr(new pseudo_managed_send_buffer( + boost::asio::buffer(pseudo_buff), + boost::bind(&usrp1_impl::io_impl::phony_commit_pseudo_buff, this, _1) + )); + } + //otherwise use the send buffer offset by the bytes written + else{ + buffs[0] = managed_send_buffer::sptr(new pseudo_managed_send_buffer( + boost::asio::buffer(get_send_mem_ptr(), get_send_mem_size()), + boost::bind(&usrp1_impl::io_impl::phony_commit_send_buff, this, _1) + )); } - return total_samps_sent; + return buffs[0].get() != NULL; } /*********************************************************************** - * Data Recv + * Initialize internals within this file **********************************************************************/ -bool usrp1_impl::io_impl::get_recv_buffer(zero_copy_if::sptr zc_if) -{ - if ((recv_state.recv_buff == NULL) || (recv_state.bytes_avail() == 0)) { - - recv_state.recv_buff = zc_if->get_recv_buff(); - if (recv_state.recv_buff == NULL) - return false; +void usrp1_impl::io_init(void){ + _rx_otw_type.width = 16; + _rx_otw_type.shift = 0; + _rx_otw_type.byteorder = otw_type_t::BO_LITTLE_ENDIAN; - recv_state.bytes_read = 0; - } + _tx_otw_type.width = 16; + _tx_otw_type.shift = 0; + _tx_otw_type.byteorder = otw_type_t::BO_LITTLE_ENDIAN; - return true; + _io_impl = UHD_PIMPL_MAKE(io_impl, (_data_transport)); } -size_t usrp1_impl::io_impl::copy_convert_recv_samps(void *buff, - size_t num_samps, - size_t sample_offset, - const io_type_t io_type, - otw_type_t otw_type) -{ - UHD_ASSERT_THROW(recv_state.bytes_avail() % otw_type.get_sample_size() == 0); - - size_t samps_avail = recv_state.bytes_avail() / otw_type.get_sample_size(); - size_t copy_samps = std::min(num_samps - sample_offset, samps_avail); - - const boost::uint8_t *otw_mem = - recv_state.recv_buff->cast<const boost::uint8_t *>(); - - boost::uint8_t *io_mem = reinterpret_cast<boost::uint8_t *>(buff); - - convert_otw_type_to_io_type(otw_mem + recv_state.bytes_read, - otw_type, - io_mem + sample_offset * io_type.size, - io_type, - copy_samps); - - recv_state.bytes_read += copy_samps * otw_type.get_sample_size(); - recv_state.overrun_poll_samp_count += copy_samps; - - return copy_samps; +/*********************************************************************** + * Data send + helper functions + **********************************************************************/ +static void usrp1_bs_vrt_packer( + boost::uint32_t *, + vrt::if_packet_info_t &if_packet_info +){ + if_packet_info.num_header_words32 = 0; + if_packet_info.num_packet_words32 = if_packet_info.num_payload_words32; } -bool usrp1_impl::io_impl::check_overrun(usrp_ctrl::sptr ctrl_if, - size_t poll_interval, - bool force) -{ - unsigned char overrun = 0; - - bool ready_to_poll = recv_state.overrun_poll_samp_count > poll_interval; - - if (force || ready_to_poll) { - int ret = ctrl_if->usrp_control_read(VRQ_GET_STATUS, - 0, - GS_RX_OVERRUN, - &overrun, sizeof(char)); - if (ret < 0) - std::cerr << "USRP: overrrun check failed" << std::endl; - if (overrun) - std::cerr << "O" << std::flush; - - recv_state.overrun_poll_samp_count = 0; +size_t usrp1_impl::send( + const std::vector<const void *> &buffs, size_t num_samps, + const tx_metadata_t &metadata, const io_type_t &io_type, + send_mode_t send_mode +){ + size_t num_samps_sent = vrt_packet_handler::send( + _io_impl->packet_handler_send_state, //last state of the send handler + buffs, num_samps, //buffer to fill + metadata, send_mode, //samples metadata + io_type, _tx_otw_type, //input and output types to convert + _clock_ctrl->get_master_clock_freq(), //master clock tick rate + &usrp1_bs_vrt_packer, + boost::bind(&usrp1_impl::io_impl::get_send_buffs, _io_impl.get(), _1), + get_max_send_samps_per_packet(), + 0, //vrt header offset + _tx_subdev_spec.size() //num channels + ); + + //Don't honor sob because it is normal to be always bursting... + //handle eob flag (commit the buffer) + if (metadata.end_of_burst) _io_impl->flush_send_buff(); + + //handle the polling for underflow conditions + _io_impl->underflow_poll_samp_count += num_samps_sent; + if (_io_impl->underflow_poll_samp_count >= _tx_samps_per_poll_interval){ + _io_impl->underflow_poll_samp_count = 0; //reset count + boost::uint8_t underflow = 0; + ssize_t ret = _ctrl_transport->usrp_control_read( + VRQ_GET_STATUS, 0, GS_TX_UNDERRUN, + &underflow, sizeof(underflow) + ); + if (ret < 0) std::cerr << "USRP: underflow check failed" << std::endl; + else if (underflow) std::cerr << "U" << std::flush; } - return (bool) overrun; + return num_samps_sent; } -size_t usrp1_impl::recv(const std::vector<void *> &buffs, - size_t num_samps, - rx_metadata_t &, - const io_type_t &io_type, - recv_mode_t, - size_t) -{ - UHD_ASSERT_THROW(buffs.size() == 1); - - size_t total_samps_recv = 0; - - while (total_samps_recv < num_samps) { +/*********************************************************************** + * Data recv + helper functions + **********************************************************************/ +static void usrp1_bs_vrt_unpacker( + const boost::uint32_t *, + vrt::if_packet_info_t &if_packet_info +){ + if_packet_info.packet_type = vrt::if_packet_info_t::PACKET_TYPE_DATA; + if_packet_info.num_payload_words32 = if_packet_info.num_packet_words32; + if_packet_info.num_header_words32 = 0; + if_packet_info.packet_count = 0; + if_packet_info.sob = false; + if_packet_info.eob = false; + if_packet_info.has_sid = false; + if_packet_info.has_cid = false; + if_packet_info.has_tsi = false; + if_packet_info.has_tsf = false; + if_packet_info.has_tlr = false; +} - if (!_io_impl->get_recv_buffer(_data_transport)) - return 0; +static bool get_recv_buffs( + zero_copy_if::sptr zc_if, + vrt_packet_handler::managed_recv_buffs_t &buffs +){ + UHD_ASSERT_THROW(buffs.size() == 1); + buffs[0] = zc_if->get_recv_buff(); + return buffs[0].get() != NULL; +} - total_samps_recv += _io_impl->copy_convert_recv_samps(buffs[0], - num_samps, - total_samps_recv, - io_type, - _rx_otw_type); - _io_impl->check_overrun(_ctrl_transport, - _rx_samps_per_poll_interval, false); +size_t usrp1_impl::recv( + const std::vector<void *> &buffs, size_t num_samps, + rx_metadata_t &metadata, const io_type_t &io_type, + recv_mode_t recv_mode, size_t /*timeout_ms TODO*/ +){ + size_t num_samps_recvd = vrt_packet_handler::recv( + _io_impl->packet_handler_recv_state, //last state of the recv handler + buffs, num_samps, //buffer to fill + metadata, recv_mode, //samples metadata + io_type, _rx_otw_type, //input and output types to convert + _clock_ctrl->get_master_clock_freq(), //master clock tick rate + &usrp1_bs_vrt_unpacker, + boost::bind(&get_recv_buffs, _data_transport, _1), + &vrt_packet_handler::handle_overflow_nop, + 0, //vrt header offset + _rx_subdev_spec.size() //num channels + ); + + //handle the polling for overflow conditions + _io_impl->overflow_poll_samp_count += num_samps_recvd; + if (_io_impl->overflow_poll_samp_count >= _rx_samps_per_poll_interval){ + _io_impl->overflow_poll_samp_count = 0; //reset count + boost::uint8_t overflow = 0; + ssize_t ret = _ctrl_transport->usrp_control_read( + VRQ_GET_STATUS, 0, GS_RX_OVERRUN, + &overflow, sizeof(overflow) + ); + if (ret < 0) std::cerr << "USRP: overflow check failed" << std::endl; + else if (overflow) std::cerr << "O" << std::flush; } - return total_samps_recv; + return num_samps_recvd; } diff --git a/host/lib/usrp/usrp1/mboard_impl.cpp b/host/lib/usrp/usrp1/mboard_impl.cpp index a90532cb8..fe3774eb4 100644 --- a/host/lib/usrp/usrp1/mboard_impl.cpp +++ b/host/lib/usrp/usrp1/mboard_impl.cpp @@ -36,6 +36,8 @@ using namespace uhd; using namespace uhd::usrp; +static const bool usrp1_mboard_verbose = false; + /*********************************************************************** * Calculate the RX mux value: * The I and Q mux values are intentionally reversed to flip I and Q @@ -146,6 +148,7 @@ static boost::uint32_t calc_tx_mux( //calculate the channel flags int channel_flags = 0, chan = 0; + uhd::dict<std::string, int> slot_to_chan_count = boost::assign::map_list_of("A", 0)("B", 0); BOOST_FOREACH(const subdev_spec_pair_t &pair, subdev_spec){ wax::obj dboard = mboard[named_prop_t(MBOARD_PROP_TX_DBOARD, pair.db_name)]; wax::obj subdev = dboard[named_prop_t(DBOARD_PROP_SUBDEV, pair.sd_name)]; @@ -155,6 +158,14 @@ static boost::uint32_t calc_tx_mux( if (pair.db_name == "A") channel_flags |= chan_to_conn_to_flag[chan][conn] << 0; if (pair.db_name == "B") channel_flags |= chan_to_conn_to_flag[chan][conn] << 8; + //sanity check, only 1 channel per slot + slot_to_chan_count[pair.db_name]++; + if (slot_to_chan_count[pair.db_name] > 1){ + throw std::runtime_error(str(boost::format( + "dboard slot %s assigned to multiple channels in subdev spec %s" + ) % pair.db_name % subdev_spec.to_string())); + } + //increment for the next channel chan++; } @@ -172,23 +183,23 @@ static boost::uint32_t calc_tx_mux( * | Reserved |T|DUCs |R|DDCs | * +-----------------------------------------------+-+-----+-+-----+ */ -static int num_ddcs(boost::uint32_t regval) -{ +size_t usrp1_impl::get_num_ddcs(void){ + boost::uint32_t regval = _iface->peek32(FR_RB_CAPS); return (regval >> 0) & 0x0007; } -static int num_ducs(boost::uint32_t regval) -{ +size_t usrp1_impl::get_num_ducs(void){ + boost::uint32_t regval = _iface->peek32(FR_RB_CAPS); return (regval >> 4) & 0x0007; } -static bool has_rx_halfband(boost::uint32_t regval) -{ +bool usrp1_impl::has_rx_halfband(void){ + boost::uint32_t regval = _iface->peek32(FR_RB_CAPS); return (regval >> 3) & 0x0001; } -static bool has_tx_halfband(boost::uint32_t regval) -{ +bool usrp1_impl::has_tx_halfband(void){ + boost::uint32_t regval = _iface->peek32(FR_RB_CAPS); return (regval >> 7) & 0x0001; } @@ -220,26 +231,25 @@ void usrp1_impl::mboard_init(void) // Set default for TX format to 16-bit I&Q _iface->poke32(FR_TX_FORMAT, 0x00000000); - // TODO TODO TODO TODO TODO TODO TODO TODO TODO TODO - // - // Do something useful with the capabilities register - // - boost::uint32_t regval = _iface->peek32(FR_RB_CAPS); - std::cout << "USRP1 Capabilities" << std::endl; - std::cout << " number of duc's: " << num_ddcs(regval) << std::endl; - std::cout << " number of ddc's: " << num_ducs(regval) << std::endl; - std::cout << " rx halfband: " << has_rx_halfband(regval) << std::endl; - std::cout << " tx halfband: " << has_tx_halfband(regval) << std::endl; + if (usrp1_mboard_verbose){ + std::cout << "USRP1 Capabilities" << std::endl; + std::cout << " number of duc's: " << get_num_ddcs() << std::endl; + std::cout << " number of ddc's: " << get_num_ducs() << std::endl; + std::cout << " rx halfband: " << has_rx_halfband() << std::endl; + std::cout << " tx halfband: " << has_tx_halfband() << std::endl; + } } void usrp1_impl::issue_stream_cmd(const stream_cmd_t &stream_cmd) { - if (stream_cmd.stream_mode == stream_cmd_t::STREAM_MODE_START_CONTINUOUS) { - _iface->write_firmware_cmd(VRQ_FPGA_SET_RX_ENABLE, true, 0, 0, 0); - } + switch(stream_cmd.stream_mode){ + case stream_cmd_t::STREAM_MODE_START_CONTINUOUS: + return _iface->write_firmware_cmd(VRQ_FPGA_SET_RX_ENABLE, true, 0, 0, 0); + + case stream_cmd_t::STREAM_MODE_STOP_CONTINUOUS: + return _iface->write_firmware_cmd(VRQ_FPGA_SET_RX_ENABLE, false, 0, 0, 0); - if (stream_cmd.stream_mode == stream_cmd_t::STREAM_MODE_STOP_CONTINUOUS) { - _iface->write_firmware_cmd(VRQ_FPGA_SET_RX_ENABLE, false, 0, 0, 0); + default: throw std::runtime_error("unsupported stream command type for USRP1"); } } @@ -269,7 +279,7 @@ void usrp1_impl::mboard_get(const wax::obj &key_, wax::obj &val) //handle the get request conditioned on the key switch(key.as<mboard_prop_t>()){ case MBOARD_PROP_NAME: - val = std::string("usrp1 mboard"); + val = std::string("usrp1 mboard - " + (*_mboard_proxy)[std::string("serial")].as<std::string>()); return; case MBOARD_PROP_OTHERS: @@ -361,18 +371,26 @@ void usrp1_impl::mboard_set(const wax::obj &key, const wax::obj &val) case MBOARD_PROP_RX_SUBDEV_SPEC: _rx_subdev_spec = val.as<subdev_spec_t>(); + if (_rx_subdev_spec.size() > this->get_num_ddcs()){ + throw std::runtime_error(str(boost::format( + "USRP1 suports up to %u RX channels.\n" + "However, this RX subdev spec requires %u channels\n" + ) % this->get_num_ddcs() % _rx_subdev_spec.size())); + } verify_rx_subdev_spec(_rx_subdev_spec, _mboard_proxy->get_link()); - //sanity check - UHD_ASSERT_THROW(_rx_subdev_spec.size() <= 2); //set the mux and set the number of rx channels _iface->poke32(FR_RX_MUX, calc_rx_mux(_rx_subdev_spec, _mboard_proxy->get_link())); return; case MBOARD_PROP_TX_SUBDEV_SPEC: _tx_subdev_spec = val.as<subdev_spec_t>(); + if (_tx_subdev_spec.size() > this->get_num_ducs()){ + throw std::runtime_error(str(boost::format( + "USRP1 suports up to %u TX channels.\n" + "However, this TX subdev spec requires %u channels\n" + ) % this->get_num_ducs() % _tx_subdev_spec.size())); + } verify_tx_subdev_spec(_tx_subdev_spec, _mboard_proxy->get_link()); - //sanity check - UHD_ASSERT_THROW(_tx_subdev_spec.size() <= 2); //set the mux and set the number of tx channels _iface->poke32(FR_TX_MUX, calc_tx_mux(_tx_subdev_spec, _mboard_proxy->get_link())); return; diff --git a/host/lib/usrp/usrp1/usrp1_ctrl.cpp b/host/lib/usrp/usrp1/usrp1_ctrl.cpp index 451129ef5..76e8ce368 100644 --- a/host/lib/usrp/usrp1/usrp1_ctrl.cpp +++ b/host/lib/usrp/usrp1/usrp1_ctrl.cpp @@ -38,6 +38,8 @@ enum firmware_code { #define FX2_FIRMWARE_LOAD 0xa0 +static const bool load_img_msg = true; + /*********************************************************************** * Helper Functions **********************************************************************/ @@ -178,6 +180,7 @@ public: unsigned char reset_n = 0; //hit the reset line + if (load_img_msg) std::cout << "Loading firmware image " << filestring << "..." << std::flush; usrp_control_write(FX2_FIRMWARE_LOAD, 0xe600, 0, &reset_y, 1); @@ -213,7 +216,7 @@ public: //wait for things to settle boost::this_thread::sleep(boost::posix_time::milliseconds(1000)); - + if (load_img_msg) std::cout << " done" << std::endl; return USRP_FIRMWARE_LOAD_SUCCESS; } //type anything else is unhandled @@ -249,45 +252,48 @@ public: unsigned char buf[ep0_size]; int ret; - FILE *fp; - if ((fp = fopen(filename, "rb")) == NULL) { + if (load_img_msg) std::cout << "Loading FPGA image: " << filestring << "..." << std::flush; + std::ifstream file; + file.open(filename, std::ios::in | std::ios::binary); + if (not file.good()) { std::cerr << "cannot open fpga input file" << std::endl; - fclose(fp); + file.close(); return -1; } if (usrp_control_write_cmd(VRQ_FPGA_LOAD, 0, FL_BEGIN) < 0) { std::cerr << "fpga load error" << std::endl; - fclose(fp); + file.close(); return -1; } ssize_t n; - while ((n = fread(buf, 1, sizeof(buf), fp)) > 0) { + while ((n = file.readsome((char *)buf, sizeof(buf))) > 0) { ret = usrp_control_write(VRQ_FPGA_LOAD, 0, FL_XFER, buf, n); if (ret != n) { std::cerr << "fpga load error " << ret << std::endl; - fclose(fp); + file.close(); return -1; } } if (usrp_control_write_cmd(VRQ_FPGA_LOAD, 0, FL_END) < 0) { std::cerr << "fpga load error" << std::endl; - fclose(fp); + file.close(); return -1; } usrp_set_fpga_hash(hash); - fclose(fp); + file.close(); + if (load_img_msg) std::cout << " done" << std::endl; return 0; } int usrp_load_eeprom(std::string filestring) { const char *filename = filestring.c_str(); - const uint16_t i2c_addr = 0x50; + const boost::uint16_t i2c_addr = 0x50; //FIXME: verify types int len; @@ -416,7 +422,7 @@ public: } - int usrp_control_write_cmd(uint8_t request, uint16_t value, uint16_t index) + int usrp_control_write_cmd(boost::uint8_t request, boost::uint16_t value, boost::uint16_t index) { return usrp_control_write(request, value, index, 0, 0); } diff --git a/host/lib/usrp/usrp1/usrp1_iface.cpp b/host/lib/usrp/usrp1/usrp1_iface.cpp index 4bc18dd16..5fd3987d5 100644 --- a/host/lib/usrp/usrp1/usrp1_iface.cpp +++ b/host/lib/usrp/usrp1/usrp1_iface.cpp @@ -80,7 +80,7 @@ public: boost::uint32_t peek32(boost::uint32_t addr) { - uint32_t value_out; + boost::uint32_t value_out; boost::uint8_t w_index_h = SPI_ENABLE_FPGA & 0xff; boost::uint8_t w_index_l = (SPI_FMT_MSB | SPI_FMT_HDR_1) & 0xff; @@ -100,7 +100,7 @@ public: boost::uint16_t peek16(boost::uint32_t addr) { - uint32_t val = peek32(addr); + boost::uint32_t val = peek32(addr); return boost::uint16_t(val & 0xff); } diff --git a/host/lib/usrp/usrp1/usrp1_impl.cpp b/host/lib/usrp/usrp1/usrp1_impl.cpp index a6806dbc3..80ea49e9d 100644 --- a/host/lib/usrp/usrp1/usrp1_impl.cpp +++ b/host/lib/usrp/usrp1/usrp1_impl.cpp @@ -62,7 +62,7 @@ static device_addrs_t usrp1_find(const device_addr_t &hint) hint.has_key("fw")? hint["fw"] : "usrp1_fw.ihx" ); } - catch(const std::exception &e){ + catch(...){ uhd::print_warning( "Could not locate USRP1 firmware.\n" "Please install the images package.\n" @@ -96,7 +96,10 @@ static device_addrs_t usrp1_find(const device_addr_t &hint) device_addr_t new_addr; new_addr["type"] = "usrp1"; new_addr["serial"] = handle->get_serial(); - usrp1_addrs.push_back(new_addr); + //this is a found usrp1 when a hint serial is not specified or it matches + if (not hint.has_key("serial") or hint["serial"] == new_addr["serial"]){ + usrp1_addrs.push_back(new_addr); + } } return usrp1_addrs; diff --git a/host/lib/usrp/usrp1/usrp1_impl.hpp b/host/lib/usrp/usrp1/usrp1_impl.hpp index c2f693eeb..20ae3c02a 100644 --- a/host/lib/usrp/usrp1/usrp1_impl.hpp +++ b/host/lib/usrp/usrp1/usrp1_impl.hpp @@ -91,8 +91,16 @@ public: recv_mode_t, size_t timeout); - size_t get_max_send_samps_per_packet(void) const { return 0; } - size_t get_max_recv_samps_per_packet(void) const { return 0; } + static const size_t BYTES_PER_PACKET = 512*4; //under the transfer size + + size_t get_max_send_samps_per_packet(void) const { + return BYTES_PER_PACKET/_tx_otw_type.get_sample_size()/_tx_subdev_spec.size(); + } + + size_t get_max_recv_samps_per_packet(void) const { + return BYTES_PER_PACKET/_rx_otw_type.get_sample_size()/_rx_subdev_spec.size(); + } + bool recv_async_msg(uhd::async_metadata_t &, size_t); private: @@ -179,19 +187,27 @@ private: void rx_dsp_init(void); void rx_dsp_get(const wax::obj &, wax::obj &); void rx_dsp_set(const wax::obj &, const wax::obj &); - double _rx_dsp_freq; size_t _rx_dsp_decim; + uhd::dict<std::string, double> _rx_dsp_freqs; + size_t _rx_dsp_decim; wax_obj_proxy::sptr _rx_dsp_proxy; //tx dsp functions and settings void tx_dsp_init(void); void tx_dsp_get(const wax::obj &, wax::obj &); void tx_dsp_set(const wax::obj &, const wax::obj &); - double _tx_dsp_freq; size_t _tx_dsp_interp; + uhd::dict<std::string, double> _tx_dsp_freqs; + size_t _tx_dsp_interp; wax_obj_proxy::sptr _tx_dsp_proxy; //transports uhd::transport::usb_zero_copy::sptr _data_transport; usrp_ctrl::sptr _ctrl_transport; + + //capabilities + size_t get_num_ducs(void); + size_t get_num_ddcs(void); + bool has_rx_halfband(void); + bool has_tx_halfband(void); }; #endif /* INCLUDED_USRP1_IMPL_HPP */ |