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-rw-r--r--host/lib/usrp/usrp1/codec_ctrl.cpp26
-rw-r--r--host/lib/usrp/usrp1/io_impl.cpp12
-rw-r--r--host/lib/usrp/usrp1/usrp1_calc_mux.hpp2
-rw-r--r--host/lib/usrp/usrp1/usrp1_iface.cpp20
-rw-r--r--host/lib/usrp/usrp1/usrp1_impl.cpp28
5 files changed, 44 insertions, 44 deletions
diff --git a/host/lib/usrp/usrp1/codec_ctrl.cpp b/host/lib/usrp/usrp1/codec_ctrl.cpp
index 4c811d5e2..73b97aa13 100644
--- a/host/lib/usrp/usrp1/codec_ctrl.cpp
+++ b/host/lib/usrp/usrp1/codec_ctrl.cpp
@@ -277,9 +277,9 @@ void usrp1_codec_ctrl_impl::send_reg(uint8_t addr)
{
uint32_t reg = _ad9862_regs.get_write_reg(addr);
- UHD_LOGV(often)
+ UHD_LOGGER_DEBUG("USRP1")
<< "codec control write reg: 0x"
- << std::setw(8) << std::hex << reg << std::endl
+ << std::setw(8) << std::hex << reg
;
_iface->write_spi(_spi_slave,
spi_config_t::EDGE_RISE, reg, 16);
@@ -289,17 +289,17 @@ void usrp1_codec_ctrl_impl::recv_reg(uint8_t addr)
{
uint32_t reg = _ad9862_regs.get_read_reg(addr);
- UHD_LOGV(often)
+ UHD_LOGGER_DEBUG("USRP1")
<< "codec control read reg: 0x"
- << std::setw(8) << std::hex << reg << std::endl
+ << std::setw(8) << std::hex << reg
;
uint32_t ret = _iface->read_spi(_spi_slave,
spi_config_t::EDGE_RISE, reg, 16);
- UHD_LOGV(often)
+ UHD_LOGGER_DEBUG("USRP1")
<< "codec control read ret: 0x"
- << std::setw(8) << std::hex << ret << std::endl
+ << std::setw(8) << std::hex << ret
;
_ad9862_regs.set_reg(addr, uint16_t(ret));
@@ -389,13 +389,13 @@ void usrp1_codec_ctrl_impl::set_duc_freq(double freq, double rate)
double coarse_freq = coarse_tune(codec_rate, freq);
double fine_freq = fine_tune(codec_rate / 4, freq - coarse_freq);
- UHD_LOG
- << "ad9862 tuning result:" << std::endl
- << " requested: " << freq << std::endl
- << " actual: " << coarse_freq + fine_freq << std::endl
- << " coarse freq: " << coarse_freq << std::endl
- << " fine freq: " << fine_freq << std::endl
- << " codec rate: " << codec_rate << std::endl
+ UHD_LOGGER_DEBUG("USRP1")
+ << "ad9862 tuning result:"
+ << " requested: " << freq
+ << " actual: " << coarse_freq + fine_freq
+ << " coarse freq: " << coarse_freq
+ << " fine freq: " << fine_freq
+ << " codec rate: " << codec_rate
;
this->send_reg(20);
diff --git a/host/lib/usrp/usrp1/io_impl.cpp b/host/lib/usrp/usrp1/io_impl.cpp
index 3e0b23973..7ed1d8671 100644
--- a/host/lib/usrp/usrp1/io_impl.cpp
+++ b/host/lib/usrp/usrp1/io_impl.cpp
@@ -22,7 +22,7 @@
#include "../../transport/super_send_packet_handler.hpp"
#include "usrp1_calc_mux.hpp"
#include "usrp1_impl.hpp"
-#include <uhd/utils/msg.hpp>
+#include <uhd/utils/log.hpp>
#include <uhd/utils/tasks.hpp>
#include <uhd/utils/safe_call.hpp>
#include <uhd/transport/bounded_buffer.hpp>
@@ -305,19 +305,19 @@ void usrp1_impl::vandal_conquest_loop(void){
if (_tx_enabled and underflow){
async_metadata.time_spec = _soft_time_ctrl->get_time();
_soft_time_ctrl->get_async_queue().push_with_pop_on_full(async_metadata);
- UHD_MSG(fastpath) << "U";
+ UHD_LOG_FASTPATH("U")
}
if (_rx_enabled and overflow){
inline_metadata.time_spec = _soft_time_ctrl->get_time();
_soft_time_ctrl->get_inline_queue().push_with_pop_on_full(inline_metadata);
- UHD_MSG(fastpath) << "O";
+ UHD_LOG_FASTPATH("O")
}
boost::this_thread::sleep(boost::posix_time::milliseconds(50));
}}
catch(const boost::thread_interrupted &){} //normal exit condition
catch(const std::exception &e){
- UHD_MSG(error) << "The vandal caught an unexpected exception " << e.what() << std::endl;
+ UHD_LOGGER_ERROR("USRP1") << "The vandal caught an unexpected exception " << e.what() ;
}
}
@@ -500,11 +500,11 @@ double usrp1_impl::update_rx_samp_rate(size_t dspno, const double samp_rate){
const size_t div = this->has_rx_halfband()? 2 : 1;
const size_t rate = boost::math::iround(_master_clock_rate/this->get_rx_dsp_host_rates().clip(samp_rate, true));
- if (rate < 8 and this->has_rx_halfband()) UHD_MSG(warning) <<
+ if (rate < 8 and this->has_rx_halfband()) UHD_LOGGER_WARNING("USRP1") <<
"USRP1 cannot achieve decimations below 8 when the half-band filter is present.\n"
"The usrp1_fpga_4rx.rbf file is a special FPGA image without RX half-band filters.\n"
"To load this image, set the device address key/value pair: fpga=usrp1_fpga_4rx.rbf\n"
- << std::endl;
+ ;
if (dspno == 0){ //only care if dsp0 is set since its homogeneous
bool s = this->disable_rx();
diff --git a/host/lib/usrp/usrp1/usrp1_calc_mux.hpp b/host/lib/usrp/usrp1/usrp1_calc_mux.hpp
index 0ae1c822f..293d9c37c 100644
--- a/host/lib/usrp/usrp1/usrp1_calc_mux.hpp
+++ b/host/lib/usrp/usrp1/usrp1_calc_mux.hpp
@@ -83,7 +83,7 @@ static uint32_t calc_rx_mux(const std::vector<mapping_pair_t> &mapping){
// for all quadrature sources: Z = 0
// for mixed sources: warning + Z = 0
int Z = (num_quads > 0)? 0 : 1;
- if (num_quads != 0 and num_reals != 0) UHD_MSG(warning) << boost::format(
+ if (num_quads != 0 and num_reals != 0) UHD_LOGGER_WARNING("USRP1") << boost::format(
"Mixing real and quadrature rx subdevices is not supported.\n"
"The Q input to the real source(s) will be non-zero.\n"
);
diff --git a/host/lib/usrp/usrp1/usrp1_iface.cpp b/host/lib/usrp/usrp1/usrp1_iface.cpp
index b65f8fa2f..2d28ad542 100644
--- a/host/lib/usrp/usrp1/usrp1_iface.cpp
+++ b/host/lib/usrp/usrp1/usrp1_iface.cpp
@@ -49,10 +49,10 @@ public:
{
uint32_t swapped = uhd::htonx(value);
- UHD_LOGV(always)
+ UHD_LOGGER_DEBUG("USRP1")
<< "poke32("
<< std::dec << std::setw(2) << addr << ", 0x"
- << std::hex << std::setw(8) << value << ")" << std::endl
+ << std::hex << std::setw(8) << value << ")"
;
uint8_t w_index_h = SPI_ENABLE_FPGA & 0xff;
@@ -70,9 +70,9 @@ public:
uint32_t peek32(const uint32_t addr)
{
- UHD_LOGV(always)
+ UHD_LOGGER_DEBUG("USRP1")
<< "peek32("
- << std::dec << std::setw(2) << addr << ")" << std::endl
+ << std::dec << std::setw(2) << addr << ")"
;
uint32_t value_out;
@@ -129,12 +129,12 @@ public:
size_t num_bits,
bool readback)
{
- UHD_LOGV(always)
- << "transact_spi: " << std::endl
- << " slave: " << which_slave << std::endl
- << " bits: " << bits << std::endl
- << " num_bits: " << num_bits << std::endl
- << " readback: " << readback << std::endl
+ UHD_LOGGER_DEBUG("USRP1")
+ << "transact_spi: "
+ << " slave: " << which_slave
+ << " bits: " << bits
+ << " num_bits: " << num_bits
+ << " readback: " << readback
;
UHD_ASSERT_THROW((num_bits <= 32) && !(num_bits % 8));
size_t num_bytes = num_bits / 8;
diff --git a/host/lib/usrp/usrp1/usrp1_impl.cpp b/host/lib/usrp/usrp1/usrp1_impl.cpp
index 8dee9b7e6..7c479a447 100644
--- a/host/lib/usrp/usrp1/usrp1_impl.cpp
+++ b/host/lib/usrp/usrp1/usrp1_impl.cpp
@@ -19,7 +19,7 @@
#include <uhd/utils/log.hpp>
#include <uhd/utils/safe_call.hpp>
#include <uhd/transport/usb_control.hpp>
-#include <uhd/utils/msg.hpp>
+#include <uhd/utils/log.hpp>
#include <uhd/utils/cast.hpp>
#include <uhd/exception.hpp>
#include <uhd/utils/static.hpp>
@@ -83,9 +83,9 @@ static device_addrs_t usrp1_find(const device_addr_t &hint)
usrp1_fw_image = find_image_path(hint.get("fw", "usrp1_fw.ihx"));
}
catch(...){
- UHD_MSG(warning) << boost::format("Could not locate USRP1 firmware. %s") % print_utility_error("uhd_images_downloader.py");
+ UHD_LOGGER_WARNING("USRP1") << boost::format("Could not locate USRP1 firmware. %s") % print_utility_error("uhd_images_downloader.py");
}
- UHD_LOG << "USRP1 firmware image: " << usrp1_fw_image << std::endl;
+ UHD_LOGGER_DEBUG("USRP1") << "USRP1 firmware image: " << usrp1_fw_image ;
usb_control::sptr control;
try{control = usb_control::make(handle, 0);}
@@ -144,14 +144,14 @@ UHD_STATIC_BLOCK(register_usrp1_device){
* Structors
**********************************************************************/
usrp1_impl::usrp1_impl(const device_addr_t &device_addr){
- UHD_MSG(status) << "Opening a USRP1 device..." << std::endl;
+ UHD_LOGGER_INFO("USRP1") << "Opening a USRP1 device...";
_type = device::USRP;
//extract the FPGA path for the USRP1
std::string usrp1_fpga_image = find_image_path(
device_addr.get("fpga", "usrp1_fpga.rbf")
);
- UHD_LOG << "USRP1 FPGA image: " << usrp1_fpga_image << std::endl;
+ UHD_LOGGER_DEBUG("USRP1") << "USRP1 FPGA image: " << usrp1_fpga_image ;
//try to match the given device address with something on the USB bus
std::vector<usb_device_handle::sptr> device_list =
@@ -190,12 +190,12 @@ usrp1_impl::usrp1_impl(const device_addr_t &device_addr){
_iface->poke32(FR_MODE, 0x00000000);
_iface->poke32(FR_DEBUG_EN, 0x00000000);
- UHD_LOG
- << "USRP1 Capabilities" << std::endl
- << " number of duc's: " << get_num_ddcs() << std::endl
- << " number of ddc's: " << get_num_ducs() << std::endl
- << " rx halfband: " << has_rx_halfband() << std::endl
- << " tx halfband: " << has_tx_halfband() << std::endl
+ UHD_LOGGER_DEBUG("USRP1")
+ << "USRP1 Capabilities"
+ << " number of duc's: " << get_num_ddcs()
+ << " number of ddc's: " << get_num_ducs()
+ << " rx halfband: " << has_rx_halfband()
+ << " tx halfband: " << has_tx_halfband()
;
////////////////////////////////////////////////////////////////////
@@ -232,7 +232,7 @@ usrp1_impl::usrp1_impl(const device_addr_t &device_addr){
_master_clock_rate = boost::lexical_cast<double>(device_addr["mcr"]);
}
catch(const std::exception &e){
- UHD_MSG(error) << "Error parsing FPGA clock rate from device address: " << e.what() << std::endl;
+ UHD_LOGGER_ERROR("USRP1") << "Error parsing FPGA clock rate from device address: " << e.what() ;
}
}
else if (not mb_eeprom["mcr"].empty()){
@@ -240,10 +240,10 @@ usrp1_impl::usrp1_impl(const device_addr_t &device_addr){
_master_clock_rate = boost::lexical_cast<double>(mb_eeprom["mcr"]);
}
catch(const std::exception &e){
- UHD_MSG(error) << "Error parsing FPGA clock rate from EEPROM: " << e.what() << std::endl;
+ UHD_LOGGER_ERROR("USRP1") << "Error parsing FPGA clock rate from EEPROM: " << e.what() ;
}
}
- UHD_MSG(status) << boost::format("Using FPGA clock rate of %fMHz...") % (_master_clock_rate/1e6) << std::endl;
+ UHD_LOGGER_INFO("USRP1") << boost::format("Using FPGA clock rate of %fMHz...") % (_master_clock_rate/1e6) ;
_tree->create<double>(mb_path / "tick_rate")
.add_coerced_subscriber(boost::bind(&usrp1_impl::update_tick_rate, this, _1))
.set(_master_clock_rate);
generated by cgit v1.2.3 (git 2.39.1) at 2024-12-27 08:42:28 +0000