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-rw-r--r--host/lib/usrp/dboard/e3xx/e3xx_radio_control_init.cpp21
-rw-r--r--host/lib/usrp/dboard/magnesium/magnesium_radio_control_init.cpp14
-rw-r--r--host/lib/usrp/dboard/rhodium/rhodium_radio_control_init.cpp14
3 files changed, 28 insertions, 21 deletions
diff --git a/host/lib/usrp/dboard/e3xx/e3xx_radio_control_init.cpp b/host/lib/usrp/dboard/e3xx/e3xx_radio_control_init.cpp
index 995133442..95f6301f2 100644
--- a/host/lib/usrp/dboard/e3xx/e3xx_radio_control_init.cpp
+++ b/host/lib/usrp/dboard/e3xx/e3xx_radio_control_init.cpp
@@ -86,9 +86,10 @@ void e3xx_radio_control_impl::_init_peripherals()
// Note: The register offset is baked into the different _wb_iface
// objects!
_db_gpio.emplace_back(
- usrp::gpio_atr::gpio_atr_3000::make_write_only(_wb_ifaces.at(radio_idx),
- e3xx_regs::SR_DB_GPIO + (radio_idx * e3xx_regs::PERIPH_REG_CHAN_OFFSET),
- e3xx_regs::PERIPH_REG_OFFSET));
+ usrp::gpio_atr::gpio_atr_3000::make(_wb_ifaces.at(radio_idx),
+ usrp::gpio_atr::gpio_atr_offsets::make_write_only(
+ e3xx_regs::SR_DB_GPIO + (radio_idx * e3xx_regs::PERIPH_REG_CHAN_OFFSET),
+ e3xx_regs::PERIPH_REG_OFFSET)));
_db_gpio[radio_idx]->set_atr_mode(
usrp::gpio_atr::MODE_ATR, usrp::gpio_atr::gpio_atr_3000::MASK_SET_ALL);
}
@@ -96,17 +97,19 @@ void e3xx_radio_control_impl::_init_peripherals()
for (size_t radio_idx = 0; radio_idx < E3XX_NUM_CHANS; radio_idx++) {
RFNOC_LOG_TRACE("Initializing LED GPIOs for channel " << radio_idx);
_leds_gpio.emplace_back(
- usrp::gpio_atr::gpio_atr_3000::make_write_only(_wb_ifaces.at(radio_idx),
- e3xx_regs::SR_LEDS + (radio_idx * e3xx_regs::PERIPH_REG_CHAN_OFFSET),
- e3xx_regs::PERIPH_REG_OFFSET));
+ usrp::gpio_atr::gpio_atr_3000::make(_wb_ifaces.at(radio_idx),
+ usrp::gpio_atr::gpio_atr_offsets::make_write_only(
+ e3xx_regs::SR_LEDS + (radio_idx * e3xx_regs::PERIPH_REG_CHAN_OFFSET),
+ e3xx_regs::PERIPH_REG_OFFSET)));
_leds_gpio[radio_idx]->set_atr_mode(
usrp::gpio_atr::MODE_ATR, usrp::gpio_atr::gpio_atr_3000::MASK_SET_ALL);
}
RFNOC_LOG_TRACE("Initializing front-panel GPIO control...")
_fp_gpio = usrp::gpio_atr::gpio_atr_3000::make(_wb_ifaces.at(0),
- e3xx_regs::SR_FP_GPIO,
- e3xx_regs::RB_FP_GPIO,
- e3xx_regs::PERIPH_REG_OFFSET);
+ usrp::gpio_atr::gpio_atr_offsets::make_default(
+ e3xx_regs::SR_FP_GPIO,
+ e3xx_regs::RB_FP_GPIO,
+ e3xx_regs::PERIPH_REG_OFFSET));
auto block_args = get_block_args();
diff --git a/host/lib/usrp/dboard/magnesium/magnesium_radio_control_init.cpp b/host/lib/usrp/dboard/magnesium/magnesium_radio_control_init.cpp
index 98c370275..95c5dcc52 100644
--- a/host/lib/usrp/dboard/magnesium/magnesium_radio_control_init.cpp
+++ b/host/lib/usrp/dboard/magnesium/magnesium_radio_control_init.cpp
@@ -120,9 +120,10 @@ void magnesium_radio_control_impl::_init_peripherals()
_wb_ifaces.push_back(RFNOC_MAKE_WB_IFACE(0, radio_idx));
RFNOC_LOG_TRACE("Initializing GPIOs for channel " << radio_idx);
_gpio.emplace_back(usrp::gpio_atr::gpio_atr_3000::make(_wb_ifaces.back(),
- n310_regs::SR_DB_GPIO + radio_idx * n310_regs::CHAN_REG_OFFSET,
- n310_regs::RB_DB_GPIO + radio_idx * n310_regs::CHAN_REG_OFFSET,
- n310_regs::PERIPH_REG_OFFSET));
+ usrp::gpio_atr::gpio_atr_offsets::make_default(
+ n310_regs::SR_DB_GPIO + radio_idx * n310_regs::CHAN_REG_OFFSET,
+ n310_regs::RB_DB_GPIO + radio_idx * n310_regs::CHAN_REG_OFFSET,
+ n310_regs::PERIPH_REG_OFFSET)));
// DSA and AD9371 gain bits do *not* toggle on ATR modes. If we ever
// connect anything else to this core, we might need to set_atr_mode()
// to MODE_ATR on those bits. For now, all bits simply do what they're
@@ -134,9 +135,10 @@ void magnesium_radio_control_impl::_init_peripherals()
}
RFNOC_LOG_TRACE("Initializing front-panel GPIO control...")
_fp_gpio = usrp::gpio_atr::gpio_atr_3000::make(_wb_ifaces.front(),
- n310_regs::SR_FP_GPIO,
- n310_regs::RB_FP_GPIO,
- n310_regs::PERIPH_REG_OFFSET);
+ usrp::gpio_atr::gpio_atr_offsets::make_default(
+ n310_regs::SR_FP_GPIO,
+ n310_regs::RB_FP_GPIO,
+ n310_regs::PERIPH_REG_OFFSET));
}
void magnesium_radio_control_impl::_init_frontend_subtree(
diff --git a/host/lib/usrp/dboard/rhodium/rhodium_radio_control_init.cpp b/host/lib/usrp/dboard/rhodium/rhodium_radio_control_init.cpp
index 844b0752b..06c1c533a 100644
--- a/host/lib/usrp/dboard/rhodium/rhodium_radio_control_init.cpp
+++ b/host/lib/usrp/dboard/rhodium/rhodium_radio_control_init.cpp
@@ -196,9 +196,10 @@ void rhodium_radio_control_impl::_init_peripherals()
RFNOC_LOG_TRACE("Initializing GPIOs...");
// DB GPIOs
_gpio = usrp::gpio_atr::gpio_atr_3000::make(_wb_iface,
- n320_regs::SR_DB_GPIO,
- n320_regs::RB_DB_GPIO,
- n320_regs::PERIPH_REG_OFFSET);
+ gpio_atr::gpio_atr_offsets::make_default(
+ n320_regs::SR_DB_GPIO,
+ n320_regs::RB_DB_GPIO,
+ n320_regs::PERIPH_REG_OFFSET));
_gpio->set_atr_mode(usrp::gpio_atr::MODE_ATR, // Enable ATR mode for Rhodium bits
RHODIUM_GPIO_MASK);
_gpio->set_atr_mode(usrp::gpio_atr::MODE_GPIO, // Disable ATR mode for unused bits
@@ -206,9 +207,10 @@ void rhodium_radio_control_impl::_init_peripherals()
_gpio->set_gpio_ddr(usrp::gpio_atr::DDR_OUTPUT, // Make all GPIOs outputs
usrp::gpio_atr::gpio_atr_3000::MASK_SET_ALL);
_fp_gpio = gpio_atr::gpio_atr_3000::make(_wb_iface,
- n320_regs::SR_FP_GPIO,
- n320_regs::RB_FP_GPIO,
- n320_regs::PERIPH_REG_OFFSET);
+ gpio_atr::gpio_atr_offsets::make_default(
+ n320_regs::SR_FP_GPIO,
+ n320_regs::RB_FP_GPIO,
+ n320_regs::PERIPH_REG_OFFSET));
RFNOC_LOG_TRACE("Set initial ATR values...");
_update_atr(RHODIUM_DEFAULT_TX_ANTENNA, TX_DIRECTION);