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-rw-r--r--host/lib/usrp/dboard/twinrx/twinrx_ctrl.cpp16
-rw-r--r--host/lib/usrp/dboard/twinrx/twinrx_ctrl.hpp6
-rw-r--r--host/lib/usrp/dboard/twinrx/twinrx_experts.hpp20
-rw-r--r--host/lib/usrp/dboard/twinrx/twinrx_gain_tables.hpp8
-rw-r--r--host/lib/usrp/dboard/twinrx/twinrx_io.hpp30
5 files changed, 40 insertions, 40 deletions
diff --git a/host/lib/usrp/dboard/twinrx/twinrx_ctrl.cpp b/host/lib/usrp/dboard/twinrx/twinrx_ctrl.cpp
index 172992f0a..dfbea9917 100644
--- a/host/lib/usrp/dboard/twinrx/twinrx_ctrl.cpp
+++ b/host/lib/usrp/dboard/twinrx/twinrx_ctrl.cpp
@@ -27,7 +27,7 @@ using namespace usrp;
using namespace dboard::twinrx;
typedef twinrx_cpld_regmap rm;
-static boost::uint32_t bool2bin(bool x) { return x ? 1 : 0; }
+static uint32_t bool2bin(bool x) { return x ? 1 : 0; }
static const double TWINRX_DESIRED_REFERENCE_FREQ = 50e6;
@@ -224,7 +224,7 @@ public:
void set_lb_preselector(channel_t ch, preselector_path_t path, bool commit = true)
{
boost::lock_guard<boost::mutex> lock(_mutex);
- boost::uint32_t sw7val = 0, sw8val = 0;
+ uint32_t sw7val = 0, sw8val = 0;
switch (path) {
case PRESEL_PATH1: sw7val = 3; sw8val = 1; break;
case PRESEL_PATH2: sw7val = 2; sw8val = 0; break;
@@ -246,7 +246,7 @@ public:
void set_hb_preselector(channel_t ch, preselector_path_t path, bool commit = true)
{
boost::lock_guard<boost::mutex> lock(_mutex);
- boost::uint32_t sw9ch1val = 0, sw10ch1val = 0, sw9ch2val = 0, sw10ch2val = 0;
+ uint32_t sw9ch1val = 0, sw10ch1val = 0, sw9ch2val = 0, sw10ch2val = 0;
switch (path) {
case PRESEL_PATH1: sw9ch1val = 3; sw10ch1val = 0; sw9ch2val = 0; sw10ch2val = 3; break;
case PRESEL_PATH2: sw9ch1val = 1; sw10ch1val = 2; sw9ch2val = 1; sw10ch2val = 1; break;
@@ -266,7 +266,7 @@ public:
}
- void set_input_atten(channel_t ch, boost::uint8_t atten, bool commit = true)
+ void set_input_atten(channel_t ch, uint8_t atten, bool commit = true)
{
boost::lock_guard<boost::mutex> lock(_mutex);
if (ch == CH1 or ch == BOTH) {
@@ -278,7 +278,7 @@ public:
if (commit) _commit();
}
- void set_lb_atten(channel_t ch, boost::uint8_t atten, bool commit = true)
+ void set_lb_atten(channel_t ch, uint8_t atten, bool commit = true)
{
boost::lock_guard<boost::mutex> lock(_mutex);
if (ch == CH1 or ch == BOTH) {
@@ -290,7 +290,7 @@ public:
if (commit) _commit();
}
- void set_hb_atten(channel_t ch, boost::uint8_t atten, bool commit = true)
+ void set_hb_atten(channel_t ch, uint8_t atten, bool commit = true)
{
boost::lock_guard<boost::mutex> lock(_mutex);
if (ch == CH1 or ch == BOTH) {
@@ -502,9 +502,9 @@ private: //Functions
_cpld_regs->if0_reg2.flush();
}
- void _write_lo_spi(dboard_iface::unit_t unit, const std::vector<boost::uint32_t> &regs)
+ void _write_lo_spi(dboard_iface::unit_t unit, const std::vector<uint32_t> &regs)
{
- BOOST_FOREACH(boost::uint32_t reg, regs) {
+ BOOST_FOREACH(uint32_t reg, regs) {
spi_config_t spi_config = spi_config_t(spi_config_t::EDGE_RISE);
spi_config.use_custom_divider = true;
spi_config.divider = 67;
diff --git a/host/lib/usrp/dboard/twinrx/twinrx_ctrl.hpp b/host/lib/usrp/dboard/twinrx/twinrx_ctrl.hpp
index 521e27ae9..5537d00ab 100644
--- a/host/lib/usrp/dboard/twinrx/twinrx_ctrl.hpp
+++ b/host/lib/usrp/dboard/twinrx/twinrx_ctrl.hpp
@@ -69,11 +69,11 @@ public:
virtual void set_hb_preselector(channel_t ch, preselector_path_t path, bool commit = true) = 0;
- virtual void set_input_atten(channel_t ch, boost::uint8_t atten, bool commit = true) = 0;
+ virtual void set_input_atten(channel_t ch, uint8_t atten, bool commit = true) = 0;
- virtual void set_lb_atten(channel_t ch, boost::uint8_t atten, bool commit = true) = 0;
+ virtual void set_lb_atten(channel_t ch, uint8_t atten, bool commit = true) = 0;
- virtual void set_hb_atten(channel_t ch, boost::uint8_t atten, bool commit = true) = 0;
+ virtual void set_hb_atten(channel_t ch, uint8_t atten, bool commit = true) = 0;
virtual void set_lo1_source(channel_t ch, lo_source_t source, bool commit = true) = 0;
diff --git a/host/lib/usrp/dboard/twinrx/twinrx_experts.hpp b/host/lib/usrp/dboard/twinrx/twinrx_experts.hpp
index 9c83dbfa8..7b85137e1 100644
--- a/host/lib/usrp/dboard/twinrx/twinrx_experts.hpp
+++ b/host/lib/usrp/dboard/twinrx/twinrx_experts.hpp
@@ -436,9 +436,9 @@ private:
experts::data_reader_t<twinrx_ctrl::preselector_path_t> _hb_presel;
experts::data_reader_t<twinrx_ctrl::antenna_mapping_t> _ant_mapping;
//Outputs
- experts::data_writer_t<boost::uint8_t> _input_atten;
- experts::data_writer_t<boost::uint8_t> _lb_atten;
- experts::data_writer_t<boost::uint8_t> _hb_atten;
+ experts::data_writer_t<uint8_t> _input_atten;
+ experts::data_writer_t<uint8_t> _lb_atten;
+ experts::data_writer_t<uint8_t> _hb_atten;
experts::data_writer_t<twinrx_ctrl::preamp_state_t> _preamp1;
experts::data_writer_t<bool> _preamp2;
};
@@ -499,21 +499,21 @@ private:
//Inputs
experts::data_reader_t<twinrx_ctrl::antenna_mapping_t> _ant_mapping;
- experts::data_reader_t<boost::uint8_t> _ch0_input_atten;
+ experts::data_reader_t<uint8_t> _ch0_input_atten;
experts::data_reader_t<twinrx_ctrl::preamp_state_t> _ch0_preamp1;
experts::data_reader_t<bool> _ch0_preamp2;
experts::data_reader_t<bool> _ch0_lb_preamp_presel;
- experts::data_reader_t<boost::uint8_t> _ch1_input_atten;
+ experts::data_reader_t<uint8_t> _ch1_input_atten;
experts::data_reader_t<twinrx_ctrl::preamp_state_t> _ch1_preamp1;
experts::data_reader_t<bool> _ch1_preamp2;
experts::data_reader_t<bool> _ch1_lb_preamp_presel;
//Outputs
- experts::data_writer_t<boost::uint8_t> _ant0_input_atten;
+ experts::data_writer_t<uint8_t> _ant0_input_atten;
experts::data_writer_t<twinrx_ctrl::preamp_state_t> _ant0_preamp1;
experts::data_writer_t<bool> _ant0_preamp2;
experts::data_writer_t<bool> _ant0_lb_preamp_presel;
- experts::data_writer_t<boost::uint8_t> _ant1_input_atten;
+ experts::data_writer_t<uint8_t> _ant1_input_atten;
experts::data_writer_t<twinrx_ctrl::preamp_state_t> _ant1_preamp1;
experts::data_writer_t<bool> _ant1_preamp2;
experts::data_writer_t<bool> _ant1_lb_preamp_presel;
@@ -623,9 +623,9 @@ private:
experts::data_reader_t<twinrx_ctrl::signal_path_t> signal_path;
experts::data_reader_t<twinrx_ctrl::preselector_path_t> lb_presel;
experts::data_reader_t<twinrx_ctrl::preselector_path_t> hb_presel;
- experts::data_reader_t<boost::uint8_t> input_atten;
- experts::data_reader_t<boost::uint8_t> lb_atten;
- experts::data_reader_t<boost::uint8_t> hb_atten;
+ experts::data_reader_t<uint8_t> input_atten;
+ experts::data_reader_t<uint8_t> lb_atten;
+ experts::data_reader_t<uint8_t> hb_atten;
experts::data_reader_t<twinrx_ctrl::lo_source_t> lo1_source;
experts::data_reader_t<twinrx_ctrl::lo_source_t> lo2_source;
experts::data_reader_t<double> lo1_freq_d;
diff --git a/host/lib/usrp/dboard/twinrx/twinrx_gain_tables.hpp b/host/lib/usrp/dboard/twinrx/twinrx_gain_tables.hpp
index 0148965da..8ebab4243 100644
--- a/host/lib/usrp/dboard/twinrx/twinrx_gain_tables.hpp
+++ b/host/lib/usrp/dboard/twinrx/twinrx_gain_tables.hpp
@@ -19,7 +19,7 @@
#define INCLUDED_DBOARD_TWINRX_GAIN_TABLES_HPP
#include <uhd/config.hpp>
-#include <boost/cstdint.hpp>
+#include <stdint.h>
#include <uhd/types/ranges.hpp>
#include "twinrx_ctrl.hpp"
@@ -29,7 +29,7 @@ class twinrx_gain_config_t {
public:
twinrx_gain_config_t(
size_t index_, double sys_gain_,
- boost::uint8_t atten1_, boost::uint8_t atten2_,
+ uint8_t atten1_, uint8_t atten2_,
bool amp1_, bool amp2_
): index(index_), sys_gain(sys_gain_), atten1(atten1_), atten2(atten2_),
amp1(amp1_), amp2(amp2_)
@@ -49,8 +49,8 @@ public:
size_t index;
double sys_gain;
- boost::uint8_t atten1;
- boost::uint8_t atten2;
+ uint8_t atten1;
+ uint8_t atten2;
bool amp1;
bool amp2;
};
diff --git a/host/lib/usrp/dboard/twinrx/twinrx_io.hpp b/host/lib/usrp/dboard/twinrx/twinrx_io.hpp
index 5d099e361..4fa5a22d5 100644
--- a/host/lib/usrp/dboard/twinrx/twinrx_io.hpp
+++ b/host/lib/usrp/dboard/twinrx/twinrx_io.hpp
@@ -26,13 +26,13 @@
namespace uhd { namespace usrp { namespace dboard { namespace twinrx {
-static const boost::uint32_t SET_ALL_BITS = 0xFFFFFFFF;
+static const uint32_t SET_ALL_BITS = 0xFFFFFFFF;
namespace cpld {
-static wb_iface::wb_addr_type addr(boost::uint8_t cpld_num, boost::uint8_t cpld_addr) {
+static wb_iface::wb_addr_type addr(uint8_t cpld_num, uint8_t cpld_addr) {
//Decode CPLD addressing for the following bitmap:
// {CPLD1_EN, CPLD2_EN, CPLD3_EN, CPLD4_EN, CPLD_ADDR[2:0]}
- boost::uint8_t addr = 0;
+ uint8_t addr = 0;
switch (cpld_num) {
case 1: addr = 0x8 << 3; break;
case 2: addr = 0x4 << 3; break;
@@ -43,8 +43,8 @@ static wb_iface::wb_addr_type addr(boost::uint8_t cpld_num, boost::uint8_t cpld_
return static_cast<wb_iface::wb_addr_type>(addr | (cpld_addr & 0x7));
}
-static boost::uint32_t get_reg(wb_iface::wb_addr_type addr) {
- return static_cast<boost::uint32_t>(addr) & 0x7;
+static uint32_t get_reg(wb_iface::wb_addr_type addr) {
+ return static_cast<uint32_t>(addr) & 0x7;
}
}
@@ -84,37 +84,37 @@ public:
_db_iface->set_gpio_ddr(dboard_iface::UNIT_BOTH, ~GPIO_OUTPUT_MASK, SET_ALL_BITS);
}
- void set_field(const uhd::soft_reg_field_t field, const boost::uint32_t value) {
+ void set_field(const uhd::soft_reg_field_t field, const uint32_t value) {
boost::lock_guard<boost::mutex> lock(_mutex);
using namespace soft_reg_field;
_db_iface->set_gpio_out(dboard_iface::UNIT_BOTH,
(value << shift(field)),
- mask<boost::uint32_t>(field));
+ mask<uint32_t>(field));
}
- boost::uint32_t get_field(const uhd::soft_reg_field_t field) {
+ uint32_t get_field(const uhd::soft_reg_field_t field) {
boost::lock_guard<boost::mutex> lock(_mutex);
using namespace soft_reg_field;
- return (_db_iface->read_gpio(dboard_iface::UNIT_BOTH) & mask<boost::uint32_t>(field)) >> shift(field);
+ return (_db_iface->read_gpio(dboard_iface::UNIT_BOTH) & mask<uint32_t>(field)) >> shift(field);
}
// CPLD register write-only interface
- void poke32(const wb_addr_type addr, const boost::uint32_t data) {
+ void poke32(const wb_addr_type addr, const uint32_t data) {
boost::lock_guard<boost::mutex> lock(_mutex);
using namespace soft_reg_field;
//Step 1: Write the reg offset and data to the GPIO bus and de-assert all enables
_db_iface->set_gpio_out(dboard_iface::UNIT_BOTH,
(cpld::get_reg(addr) << shift(CPLD_FULL_ADDR)) | (data << shift(CPLD_DATA)),
- mask<boost::uint32_t>(CPLD_FULL_ADDR)|mask<boost::uint32_t>(CPLD_DATA));
+ mask<uint32_t>(CPLD_FULL_ADDR)|mask<uint32_t>(CPLD_DATA));
//Sleep for 166ns to ensure that we don't toggle the enables too quickly
//The underlying sleep function rounds to microsecond precision.
_db_iface->sleep(boost::chrono::nanoseconds(166));
//Step 2: Write the reg offset and data, and assert the necessary enable
_db_iface->set_gpio_out(dboard_iface::UNIT_BOTH,
- (static_cast<boost::uint32_t>(addr) << shift(CPLD_FULL_ADDR)) | (data << shift(CPLD_DATA)),
- mask<boost::uint32_t>(CPLD_FULL_ADDR)|mask<boost::uint32_t>(CPLD_DATA));
+ (static_cast<uint32_t>(addr) << shift(CPLD_FULL_ADDR)) | (data << shift(CPLD_DATA)),
+ mask<uint32_t>(CPLD_FULL_ADDR)|mask<uint32_t>(CPLD_DATA));
}
// Timed command interface
@@ -128,8 +128,8 @@ public:
}
private: //Members/definitions
- static const boost::uint32_t GPIO_OUTPUT_MASK = 0xFC06FE03;
- static const boost::uint32_t GPIO_PINCTRL_MASK = 0x00000000;
+ static const uint32_t GPIO_OUTPUT_MASK = 0xFC06FE03;
+ static const uint32_t GPIO_PINCTRL_MASK = 0x00000000;
//Private GPIO fields
UHD_DEFINE_SOFT_REG_FIELD(CPLD_FULL_ADDR, /*width*/ 7, /*shift*/ 9); //GPIO[15:9]