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-rw-r--r--host/lib/usrp/cores/dma_fifo_core_3000.cpp2
-rw-r--r--host/lib/usrp/cores/gpio_atr_3000.hpp12
-rw-r--r--host/lib/usrp/cores/i2c_core_100.cpp4
-rw-r--r--host/lib/usrp/cores/i2c_core_100_wb32.cpp4
-rw-r--r--host/lib/usrp/cores/i2c_core_200.cpp4
-rw-r--r--host/lib/usrp/cores/radio_ctrl_core_3000.cpp16
-rw-r--r--host/lib/usrp/cores/rx_dsp_core_200.cpp4
-rw-r--r--host/lib/usrp/cores/rx_dsp_core_3000.cpp6
-rw-r--r--host/lib/usrp/cores/rx_vita_core_3000.cpp4
-rw-r--r--host/lib/usrp/cores/spi_core_100.cpp4
-rw-r--r--host/lib/usrp/cores/spi_core_3000.cpp2
-rw-r--r--host/lib/usrp/cores/time_core_3000.cpp10
-rw-r--r--host/lib/usrp/cores/tx_dsp_core_200.cpp4
-rw-r--r--host/lib/usrp/cores/tx_dsp_core_3000.cpp4
14 files changed, 42 insertions, 38 deletions
diff --git a/host/lib/usrp/cores/dma_fifo_core_3000.cpp b/host/lib/usrp/cores/dma_fifo_core_3000.cpp
index e1a841b96..18c79f4c5 100644
--- a/host/lib/usrp/cores/dma_fifo_core_3000.cpp
+++ b/host/lib/usrp/cores/dma_fifo_core_3000.cpp
@@ -19,7 +19,7 @@
#include <uhd/exception.hpp>
#include <boost/thread/thread.hpp> //sleep
#include <uhd/utils/soft_register.hpp>
-#include <uhd/utils/msg.hpp>
+#include <uhd/utils/log.hpp>
using namespace uhd;
diff --git a/host/lib/usrp/cores/gpio_atr_3000.hpp b/host/lib/usrp/cores/gpio_atr_3000.hpp
index 1e7c304fa..dfeff112b 100644
--- a/host/lib/usrp/cores/gpio_atr_3000.hpp
+++ b/host/lib/usrp/cores/gpio_atr_3000.hpp
@@ -39,7 +39,7 @@ public:
*
* \param iface register iface to GPIO ATR registers
* \param base base settings offset for GPIO ATR registers
- * \param base readback offset for GPIO ATR registers
+ * \param rb_addr readback offset for GPIO ATR registers
*/
static sptr make(
uhd::wb_iface::sptr iface,
@@ -119,7 +119,7 @@ public:
*
* \param iface register iface to GPIO ATR registers
* \param base base settings offset for GPIO ATR registers
- * \param base readback offset for GPIO ATR registers
+ * \param rb_addr readback offset for GPIO ATR registers
*/
static sptr make(
uhd::wb_iface::sptr iface,
@@ -131,6 +131,7 @@ public:
*
* \param unit the side of the daughterboard interface to configure (TX or RX)
* \param value if value[i] is 1, the i'th bit is in ATR mode otherwise it is in GPIO mode
+ * \param mask mask
*/
virtual void set_pin_ctrl(const db_unit_t unit, const uint32_t value, const uint32_t mask) = 0;
@@ -141,6 +142,7 @@ public:
*
* \param unit the side of the daughterboard interface to configure (TX or RX)
* \param value if value[i] is 1, the i'th bit is an output otherwise it is an input
+ * \param mask mask
*/
virtual void set_gpio_ddr(const db_unit_t unit, const uint32_t value, const uint32_t mask) = 0;
@@ -149,9 +151,10 @@ public:
/*!
* Write the specified value to the ATR register (all bits)
*
- * \param atr the type of ATR register to write to {IDLE, RX, TX, FDX}
* \param unit the side of the daughterboard interface to configure (TX or RX)
+ * \param atr the type of ATR register to write to {IDLE, RX, TX, FDX}
* \param value the value to write
+ * \param mask mask
*/
virtual void set_atr_reg(const db_unit_t unit, const gpio_atr_reg_t atr, const uint32_t value, const uint32_t mask) = 0;
@@ -160,8 +163,9 @@ public:
/*!
* Write the specified value to the GPIO register (all bits)
*
- * \param atr the type of ATR register to write to {IDLE, RX, TX, FDX}
+ * \param unit the side of the daughterboard interface to configure (TX or RX)
* \param value the value to write
+ * \param mask mask
*/
virtual void set_gpio_out(const db_unit_t unit, const uint32_t value, const uint32_t mask) = 0;
diff --git a/host/lib/usrp/cores/i2c_core_100.cpp b/host/lib/usrp/cores/i2c_core_100.cpp
index 029b6eaa7..e68dc2ea6 100644
--- a/host/lib/usrp/cores/i2c_core_100.cpp
+++ b/host/lib/usrp/cores/i2c_core_100.cpp
@@ -17,7 +17,7 @@
#include "i2c_core_100.hpp"
#include <uhd/exception.hpp>
-#include <uhd/utils/msg.hpp>
+#include <uhd/utils/log.hpp>
#include <boost/thread/thread.hpp> //sleep
#define REG_I2C_PRESCALER_LO _base + 0
@@ -127,7 +127,7 @@ private:
if ((_iface->peek16(REG_I2C_CMD_STATUS) & I2C_ST_TIP) == 0) return;
boost::this_thread::sleep(boost::posix_time::milliseconds(1));
}
- UHD_MSG(error) << "i2c_core_100: i2c_wait timeout" << std::endl;
+ UHD_LOGGER_ERROR("CORES") << "i2c_core_100: i2c_wait timeout" ;
}
bool wait_chk_ack(void){
diff --git a/host/lib/usrp/cores/i2c_core_100_wb32.cpp b/host/lib/usrp/cores/i2c_core_100_wb32.cpp
index 099b80447..8e03a8c3c 100644
--- a/host/lib/usrp/cores/i2c_core_100_wb32.cpp
+++ b/host/lib/usrp/cores/i2c_core_100_wb32.cpp
@@ -17,7 +17,7 @@
#include "i2c_core_100_wb32.hpp"
#include <uhd/exception.hpp>
-#include <uhd/utils/msg.hpp>
+#include <uhd/utils/log.hpp>
#include <boost/thread/thread.hpp> //sleep
#define REG_I2C_PRESCALER_LO _base + 0
@@ -138,7 +138,7 @@ private:
if ((_iface->peek32(REG_I2C_CMD_STATUS) & I2C_ST_TIP) == 0) return;
boost::this_thread::sleep(boost::posix_time::milliseconds(1));
}
- UHD_MSG(error) << "i2c_core_100_wb32: i2c_wait timeout" << std::endl;
+ UHD_LOGGER_ERROR("CORES") << "i2c_core_100_wb32: i2c_wait timeout" ;
}
bool wait_chk_ack(void){
diff --git a/host/lib/usrp/cores/i2c_core_200.cpp b/host/lib/usrp/cores/i2c_core_200.cpp
index eae91253c..7b28573e9 100644
--- a/host/lib/usrp/cores/i2c_core_200.cpp
+++ b/host/lib/usrp/cores/i2c_core_200.cpp
@@ -17,7 +17,7 @@
#include "i2c_core_200.hpp"
#include <uhd/exception.hpp>
-#include <uhd/utils/msg.hpp>
+#include <uhd/utils/log.hpp>
#include <boost/thread/thread.hpp> //sleep
#include <boost/thread/mutex.hpp>
@@ -130,7 +130,7 @@ private:
if ((this->peek(REG_I2C_RD_ST) & I2C_ST_TIP) == 0) return;
boost::this_thread::sleep(boost::posix_time::milliseconds(1));
}
- UHD_MSG(error) << "i2c_core_200: i2c_wait timeout" << std::endl;
+ UHD_LOGGER_ERROR("CORES") << "i2c_core_200: i2c_wait timeout" ;
}
bool wait_chk_ack(void){
diff --git a/host/lib/usrp/cores/radio_ctrl_core_3000.cpp b/host/lib/usrp/cores/radio_ctrl_core_3000.cpp
index 2e405d735..512a860e0 100644
--- a/host/lib/usrp/cores/radio_ctrl_core_3000.cpp
+++ b/host/lib/usrp/cores/radio_ctrl_core_3000.cpp
@@ -18,7 +18,7 @@
#include "radio_ctrl_core_3000.hpp"
#include "async_packet_handler.hpp"
#include <uhd/exception.hpp>
-#include <uhd/utils/msg.hpp>
+#include <uhd/utils/log.hpp>
#include <uhd/utils/byteswap.hpp>
#include <uhd/utils/safe_call.hpp>
#include <uhd/transport/bounded_buffer.hpp>
@@ -165,7 +165,7 @@ private:
//load payload
pkt[packet_info.num_header_words32+0] = (_bige)? uhd::htonx(addr) : uhd::htowx(addr);
pkt[packet_info.num_header_words32+1] = (_bige)? uhd::htonx(data) : uhd::htowx(data);
- //UHD_MSG(status) << boost::format("0x%08x, 0x%08x\n") % addr % data;
+ //UHD_LOGGER_INFO("radio_ctrl") << boost::format("0x%08x, 0x%08x\n") % addr % data;
//send the buffer over the interface
_outstanding_seqs.push(_seq_out);
buff->commit(sizeof(uint32_t)*(packet_info.num_packet_words32));
@@ -243,17 +243,17 @@ private:
}
catch(const std::exception &ex)
{
- UHD_MSG(error) << "Radio ctrl bad VITA packet: " << ex.what() << std::endl;
+ UHD_LOGGER_ERROR("radio_ctrl") << "Radio ctrl bad VITA packet: " << ex.what() ;
if (buff){
UHD_VAR(buff->size());
}
else{
- UHD_MSG(status) << "buff is NULL" << std::endl;
+ UHD_LOGGER_INFO("radio_ctrl") << "buff is NULL" ;
}
- UHD_MSG(status) << std::hex << pkt[0] << std::dec << std::endl;
- UHD_MSG(status) << std::hex << pkt[1] << std::dec << std::endl;
- UHD_MSG(status) << std::hex << pkt[2] << std::dec << std::endl;
- UHD_MSG(status) << std::hex << pkt[3] << std::dec << std::endl;
+ UHD_LOGGER_INFO("radio_ctrl") << std::hex << pkt[0] << std::dec ;
+ UHD_LOGGER_INFO("radio_ctrl") << std::hex << pkt[1] << std::dec ;
+ UHD_LOGGER_INFO("radio_ctrl") << std::hex << pkt[2] << std::dec ;
+ UHD_LOGGER_INFO("radio_ctrl") << std::hex << pkt[3] << std::dec ;
}
//check the buffer
diff --git a/host/lib/usrp/cores/rx_dsp_core_200.cpp b/host/lib/usrp/cores/rx_dsp_core_200.cpp
index e781cfc6d..465a3b913 100644
--- a/host/lib/usrp/cores/rx_dsp_core_200.cpp
+++ b/host/lib/usrp/cores/rx_dsp_core_200.cpp
@@ -20,7 +20,7 @@
#include <uhd/types/dict.hpp>
#include <uhd/exception.hpp>
#include <uhd/utils/math.hpp>
-#include <uhd/utils/msg.hpp>
+#include <uhd/utils/log.hpp>
#include <uhd/utils/safe_call.hpp>
#include <boost/assign/list_of.hpp>
#include <boost/thread/thread.hpp> //thread sleep
@@ -195,7 +195,7 @@ public:
if (decim > 1 and hb0 == 0 and hb1 == 0)
{
- UHD_MSG(warning) << boost::format(
+ UHD_LOGGER_WARNING("CORES") << boost::format(
"The requested decimation is odd; the user should expect CIC rolloff.\n"
"Select an even decimation to ensure that a halfband filter is enabled.\n"
"decimation = dsp_rate/samp_rate -> %d = (%f MHz)/(%f MHz)\n"
diff --git a/host/lib/usrp/cores/rx_dsp_core_3000.cpp b/host/lib/usrp/cores/rx_dsp_core_3000.cpp
index fdd73a7ac..45e4c6f49 100644
--- a/host/lib/usrp/cores/rx_dsp_core_3000.cpp
+++ b/host/lib/usrp/cores/rx_dsp_core_3000.cpp
@@ -20,7 +20,7 @@
#include <uhd/types/dict.hpp>
#include <uhd/exception.hpp>
#include <uhd/utils/math.hpp>
-#include <uhd/utils/msg.hpp>
+#include <uhd/utils/log.hpp>
#include <uhd/utils/safe_call.hpp>
#include <boost/assign/list_of.hpp>
#include <boost/thread/thread.hpp> //thread sleep
@@ -169,7 +169,7 @@ public:
_iface->poke32(REG_DSP_RX_DECIM, (hb0 << 9) /*small HB */ | (hb1 << 8) /*large HB*/ | (decim & 0xff));
if (decim > 1 and hb0 == 0 and hb1 == 0) {
- UHD_MSG(warning) << boost::format(
+ UHD_LOGGER_WARNING("CORES") << boost::format(
"The requested decimation is odd; the user should expect CIC rolloff.\n"
"Select an even decimation to ensure that a halfband filter is enabled.\n"
"decimation = dsp_rate/samp_rate -> %d = (%f MHz)/(%f MHz)\n"
@@ -189,7 +189,7 @@ public:
_iface->poke32(REG_DSP_RX_DECIM, (hb_enable << 8) | (decim & 0xff));
if (decim > 1 and hb0 == 0 and hb1 == 0 and hb2 == 0) {
- UHD_MSG(warning) << boost::format(
+ UHD_LOGGER_WARNING("CORES") << boost::format(
"The requested decimation is odd; the user should expect passband CIC rolloff.\n"
"Select an even decimation to ensure that a halfband filter is enabled.\n"
"Decimations factorable by 4 will enable 2 halfbands, those factorable by 8 will enable 3 halfbands.\n"
diff --git a/host/lib/usrp/cores/rx_vita_core_3000.cpp b/host/lib/usrp/cores/rx_vita_core_3000.cpp
index 57868ff54..e10913a22 100644
--- a/host/lib/usrp/cores/rx_vita_core_3000.cpp
+++ b/host/lib/usrp/cores/rx_vita_core_3000.cpp
@@ -16,7 +16,7 @@
//
#include "rx_vita_core_3000.hpp"
-#include <uhd/utils/msg.hpp>
+#include <uhd/utils/log.hpp>
#include <uhd/utils/safe_call.hpp>
#include <boost/assign/list_of.hpp>
#include <boost/tuple/tuple.hpp>
@@ -96,7 +96,7 @@ struct rx_vita_core_3000_impl : rx_vita_core_3000
{
if (not _is_setup)
{
- //UHD_MSG(warning) << "rx vita core 3000 issue stream command - not setup yet!";
+ //UHD_LOGGER_WARNING("CORES") << "rx vita core 3000 issue stream command - not setup yet!";
return;
}
UHD_ASSERT_THROW(stream_cmd.num_samps <= 0x0fffffff);
diff --git a/host/lib/usrp/cores/spi_core_100.cpp b/host/lib/usrp/cores/spi_core_100.cpp
index 22b163b14..4d61821b4 100644
--- a/host/lib/usrp/cores/spi_core_100.cpp
+++ b/host/lib/usrp/cores/spi_core_100.cpp
@@ -17,7 +17,7 @@
#include "spi_core_100.hpp"
#include <uhd/exception.hpp>
-#include <uhd/utils/msg.hpp>
+#include <uhd/utils/log.hpp>
#include <boost/thread/thread.hpp> //sleep
#define REG_SPI_TXRX0 _base + 0
@@ -80,7 +80,7 @@ private:
if ((_iface->peek16(REG_SPI_CTRL) & SPI_CTRL_GO_BSY) == 0) return;
boost::this_thread::sleep(boost::posix_time::milliseconds(1));
}
- UHD_MSG(error) << "spi_core_100: spi_wait timeout" << std::endl;
+ UHD_LOGGER_ERROR("CORES") << "spi_core_100: spi_wait timeout" ;
}
wb_iface::sptr _iface;
diff --git a/host/lib/usrp/cores/spi_core_3000.cpp b/host/lib/usrp/cores/spi_core_3000.cpp
index 78b0af1a3..2abbac317 100644
--- a/host/lib/usrp/cores/spi_core_3000.cpp
+++ b/host/lib/usrp/cores/spi_core_3000.cpp
@@ -17,7 +17,7 @@
#include "spi_core_3000.hpp"
#include <uhd/exception.hpp>
-#include <uhd/utils/msg.hpp>
+#include <uhd/utils/log.hpp>
#include <boost/thread/thread.hpp> //sleep
#define SPI_DIV _base + 0
diff --git a/host/lib/usrp/cores/time_core_3000.cpp b/host/lib/usrp/cores/time_core_3000.cpp
index 25142b9fe..296923756 100644
--- a/host/lib/usrp/cores/time_core_3000.cpp
+++ b/host/lib/usrp/cores/time_core_3000.cpp
@@ -17,7 +17,7 @@
#include "time_core_3000.hpp"
#include <uhd/utils/safe_call.hpp>
-#include <uhd/utils/msg.hpp>
+#include <uhd/utils/log.hpp>
#include <boost/thread/thread.hpp>
#define REG_TIME_HI _base + 0
@@ -63,21 +63,21 @@ struct time_core_3000_impl : time_core_3000
void self_test(void)
{
const size_t sleep_millis = 100;
- UHD_MSG(status) << "Performing timer loopback test... " << std::flush;
+ UHD_LOGGER_INFO("CORES") << "Performing timer loopback test... ";
const time_spec_t time0 = this->get_time_now();
boost::this_thread::sleep(boost::posix_time::milliseconds(sleep_millis));
const time_spec_t time1 = this->get_time_now();
const double approx_secs = (time1 - time0).get_real_secs();
const bool test_fail = (approx_secs > 0.15) or (approx_secs < 0.05);
- UHD_MSG(status) << ((test_fail)? " fail" : "pass") << std::endl;
+ UHD_LOGGER_INFO("CORES") << "Timer loopback test " << ((test_fail)? "failed" : "passed");
//useful warning for debugging actual rate
const size_t ticks_elapsed = size_t(_tick_rate*approx_secs);
const size_t approx_rate = size_t(ticks_elapsed/(sleep_millis/1e3));
- if (test_fail) UHD_MSG(warning)
+ if (test_fail) UHD_LOGGER_WARNING("CORES")
<< "Expecting clock rate: " << (_tick_rate/1e6) << " MHz\n"
<< "Approximate clock rate: " << (approx_rate/1e6) << " MHz\n"
- << std::endl;
+ ;
}
uhd::time_spec_t get_time_now(void)
diff --git a/host/lib/usrp/cores/tx_dsp_core_200.cpp b/host/lib/usrp/cores/tx_dsp_core_200.cpp
index 4e1743ee1..f1bf560dc 100644
--- a/host/lib/usrp/cores/tx_dsp_core_200.cpp
+++ b/host/lib/usrp/cores/tx_dsp_core_200.cpp
@@ -20,7 +20,7 @@
#include <uhd/types/dict.hpp>
#include <uhd/exception.hpp>
#include <uhd/utils/math.hpp>
-#include <uhd/utils/msg.hpp>
+#include <uhd/utils/log.hpp>
#include <boost/assign/list_of.hpp>
#include <boost/math/special_functions/round.hpp>
#include <boost/thread/thread.hpp> //sleep
@@ -135,7 +135,7 @@ public:
if (interp > 1 and hb0 == 0 and hb1 == 0)
{
- UHD_MSG(warning) << boost::format(
+ UHD_LOGGER_WARNING("CORES") << boost::format(
"The requested interpolation is odd; the user should expect CIC rolloff.\n"
"Select an even interpolation to ensure that a halfband filter is enabled.\n"
"interpolation = dsp_rate/samp_rate -> %d = (%f MHz)/(%f MHz)\n"
diff --git a/host/lib/usrp/cores/tx_dsp_core_3000.cpp b/host/lib/usrp/cores/tx_dsp_core_3000.cpp
index 67ff418b3..c30e8dfc1 100644
--- a/host/lib/usrp/cores/tx_dsp_core_3000.cpp
+++ b/host/lib/usrp/cores/tx_dsp_core_3000.cpp
@@ -20,7 +20,7 @@
#include <uhd/types/dict.hpp>
#include <uhd/exception.hpp>
#include <uhd/utils/math.hpp>
-#include <uhd/utils/msg.hpp>
+#include <uhd/utils/log.hpp>
#include <boost/assign/list_of.hpp>
#include <boost/math/special_functions/round.hpp>
#include <boost/thread/thread.hpp> //sleep
@@ -103,7 +103,7 @@ public:
if (interp > 1 and hb0 == 0 and hb1 == 0)
{
- UHD_MSG(warning) << boost::format(
+ UHD_LOGGER_WARNING("CORES") << boost::format(
"The requested interpolation is odd; the user should expect CIC rolloff.\n"
"Select an even interpolation to ensure that a halfband filter is enabled.\n"
"interpolation = dsp_rate/samp_rate -> %d = (%f MHz)/(%f MHz)\n"
generated by cgit v1.2.3 (git 2.39.1) at 2025-04-07 05:03:17 +0000