diff options
Diffstat (limited to 'host/lib/usrp/cores')
20 files changed, 164 insertions, 158 deletions
diff --git a/host/lib/usrp/cores/dma_fifo_core_3000.cpp b/host/lib/usrp/cores/dma_fifo_core_3000.cpp index 382006b67..405ff24d8 100644 --- a/host/lib/usrp/cores/dma_fifo_core_3000.cpp +++ b/host/lib/usrp/cores/dma_fifo_core_3000.cpp @@ -83,12 +83,12 @@ public: << dma_fifo_core_3000_impl::get_fifo_timeout() << " cycles"); } - virtual ~dma_fifo_core_3000_impl() {} + ~dma_fifo_core_3000_impl() override {} /************************************************************************** * API *************************************************************************/ - bool has_bist() const + bool has_bist() const override { return _has_bist; } @@ -101,17 +101,17 @@ public: // TODO: read suppress API // fullness in bytes - uint64_t get_fifo_fullness() + uint64_t get_fifo_fullness() override { return peek64(REG_FIFO_FULLNESS); } - uint16_t get_fifo_timeout() + uint16_t get_fifo_timeout() override { return peek32(REG_FIFO_TIMEOUT) & 0xFFF; } - void set_fifo_timeout(const uint16_t timeout_cycles) + void set_fifo_timeout(const uint16_t timeout_cycles) override { UHD_ASSERT_THROW(timeout_cycles <= 0xFFF); poke32(timeout_cycles, REG_FIFO_TIMEOUT); @@ -138,7 +138,7 @@ public: poke64(REG_FIFO_ADDR_BASE, base_addr); } - uint32_t get_packet_count() + uint32_t get_packet_count() override { return peek32(REG_FIFO_PACKET_CNT); } @@ -197,7 +197,7 @@ public: poke32(REG_BIST_CTRL, 1 << 2); } - double run_bist(const uint64_t num_bytes, const double timeout_s) + double run_bist(const uint64_t num_bytes, const double timeout_s) override { // The number of cycles it will take to transfer all the BIST data if // there is a transfer on every clock cycle (this is the minimum time it diff --git a/host/lib/usrp/cores/gpio_atr_3000.cpp b/host/lib/usrp/cores/gpio_atr_3000.cpp index 14996f659..875752ee2 100644 --- a/host/lib/usrp/cores/gpio_atr_3000.cpp +++ b/host/lib/usrp/cores/gpio_atr_3000.cpp @@ -64,7 +64,7 @@ public: } } - virtual void set_atr_mode(const gpio_atr_mode_t mode, const uint32_t mask) + void set_atr_mode(const gpio_atr_mode_t mode, const uint32_t mask) override { // Each bit in the "ATR Disable" register determines whether the respective bit in // the GPIO output bus is driven by the ATR engine or a static register. For each @@ -79,7 +79,7 @@ public: _update_attr_state(GPIO_CTRL, ~value, mask); } - virtual void set_gpio_ddr(const gpio_ddr_t dir, const uint32_t mask) + void set_gpio_ddr(const gpio_ddr_t dir, const uint32_t mask) override { // Each bit in the "DDR" register determines whether the respective bit in the // GPIO bus is an input or an output. For each bit position, a 1 means that the @@ -92,9 +92,9 @@ public: _update_attr_state(GPIO_DDR, value, mask); } - virtual void set_atr_reg(const gpio_atr_reg_t atr, + void set_atr_reg(const gpio_atr_reg_t atr, const uint32_t value, - const uint32_t mask = MASK_SET_ALL) + const uint32_t mask = MASK_SET_ALL) override { // Set the value of the specified ATR register. For bits with ATR Disable set to // 1, the IDLE register will hold the output state This setting will only get @@ -135,7 +135,7 @@ public: _update_attr_state(attr, value, mask); } - virtual void set_gpio_out(const uint32_t value, const uint32_t mask = MASK_SET_ALL) + void set_gpio_out(const uint32_t value, const uint32_t mask = MASK_SET_ALL) override { // Set the value of the specified GPIO output register. // This setting will only get applied to all bits in the "mask" that are 1. All @@ -148,7 +148,7 @@ public: _update_attr_state(GPIO_OUT, value, mask); } - virtual uint32_t read_gpio() + uint32_t read_gpio() override { // Read the state of the GPIO pins // If a pin is configured as an input, reads the actual value of the pin @@ -160,7 +160,7 @@ public: } } - virtual uint32_t get_attr_reg(const gpio_attr_t attr) + uint32_t get_attr_reg(const gpio_attr_t attr) override { if (attr == GPIO_SRC) { throw uhd::runtime_error("Can't get GPIO source by GPIO ATR interface."); @@ -175,7 +175,7 @@ public: return _attr_reg_state.at(attr); } - inline virtual void set_gpio_attr(const gpio_attr_t attr, const uint32_t value) + inline void set_gpio_attr(const gpio_attr_t attr, const uint32_t value) override { // An attribute based API to configure all settings for the GPIO bus in one // function call. This API does not have a mask so it configures all bits at the @@ -243,7 +243,7 @@ protected: return uhd::soft_reg32_wo_t::get(uhd::soft_reg32_wo_t::REGISTER); } - virtual void flush() + void flush() override { uhd::soft_reg32_wo_t::flush(); } @@ -260,12 +260,12 @@ protected: { } - virtual void set_with_mask(const uint32_t value, const uint32_t mask) + void set_with_mask(const uint32_t value, const uint32_t mask) override { _atr_idle_cache = (value & mask) | (_atr_idle_cache & (~mask)); } - virtual uint32_t get() + uint32_t get() override { return _atr_idle_cache; } @@ -280,7 +280,7 @@ protected: return _gpio_out_cache; } - virtual void flush() + void flush() override { set(REGISTER, (_atr_idle_cache & (~_atr_disable_reg.get())) @@ -344,26 +344,26 @@ public: } inline void set_pin_ctrl( - const db_unit_t unit, const uint32_t value, const uint32_t mask) + const db_unit_t unit, const uint32_t value, const uint32_t mask) override { gpio_atr_3000_impl::set_atr_mode(MODE_ATR, compute_mask(unit, value & mask)); gpio_atr_3000_impl::set_atr_mode(MODE_GPIO, compute_mask(unit, (~value) & mask)); } - inline uint32_t get_pin_ctrl(const db_unit_t unit) + inline uint32_t get_pin_ctrl(const db_unit_t unit) override { return (~_atr_disable_reg.get()) >> compute_shift(unit); } using gpio_atr_3000_impl::set_gpio_ddr; inline void set_gpio_ddr( - const db_unit_t unit, const uint32_t value, const uint32_t mask) + const db_unit_t unit, const uint32_t value, const uint32_t mask) override { gpio_atr_3000_impl::set_gpio_ddr(DDR_OUTPUT, compute_mask(unit, value & mask)); gpio_atr_3000_impl::set_gpio_ddr(DDR_INPUT, compute_mask(unit, (~value) & mask)); } - inline uint32_t get_gpio_ddr(const db_unit_t unit) + inline uint32_t get_gpio_ddr(const db_unit_t unit) override { return _ddr_reg.get() >> compute_shift(unit); } @@ -372,13 +372,13 @@ public: inline void set_atr_reg(const db_unit_t unit, const gpio_atr_reg_t atr, const uint32_t value, - const uint32_t mask) + const uint32_t mask) override { gpio_atr_3000_impl::set_atr_reg( atr, value << compute_shift(unit), compute_mask(unit, mask)); } - inline uint32_t get_atr_reg(const db_unit_t unit, const gpio_atr_reg_t atr) + inline uint32_t get_atr_reg(const db_unit_t unit, const gpio_atr_reg_t atr) override { masked_reg_t* reg = NULL; switch (atr) { @@ -403,21 +403,21 @@ public: using gpio_atr_3000_impl::set_gpio_out; inline void set_gpio_out( - const db_unit_t unit, const uint32_t value, const uint32_t mask) + const db_unit_t unit, const uint32_t value, const uint32_t mask) override { gpio_atr_3000_impl::set_gpio_out( static_cast<uint32_t>(value) << compute_shift(unit), compute_mask(unit, mask)); } - inline uint32_t get_gpio_out(const db_unit_t unit) + inline uint32_t get_gpio_out(const db_unit_t unit) override { return (_atr_idle_reg.get_gpio_out() & compute_mask(unit, MASK_SET_ALL)) >> compute_shift(unit); } using gpio_atr_3000_impl::read_gpio; - inline uint32_t read_gpio(const db_unit_t unit) + inline uint32_t read_gpio(const db_unit_t unit) override { return (gpio_atr_3000_impl::read_gpio() & compute_mask(unit, MASK_SET_ALL)) >> compute_shift(unit); diff --git a/host/lib/usrp/cores/gpio_core_200.cpp b/host/lib/usrp/cores/gpio_core_200.cpp index 7ee0daf70..b39cd0b75 100644 --- a/host/lib/usrp/cores/gpio_core_200.cpp +++ b/host/lib/usrp/cores/gpio_core_200.cpp @@ -36,7 +36,8 @@ public: { /* NOP */ } - void set_pin_ctrl(const unit_t unit, const uint16_t value, const uint16_t mask) + void set_pin_ctrl( + const unit_t unit, const uint16_t value, const uint16_t mask) override { if (unit == dboard_iface::UNIT_BOTH) throw uhd::runtime_error("UNIT_BOTH not supported in gpio_core_200"); @@ -44,15 +45,17 @@ public: update(); // full update } - uint16_t get_pin_ctrl(unit_t unit) + uint16_t get_pin_ctrl(unit_t unit) override { if (unit == dboard_iface::UNIT_BOTH) throw uhd::runtime_error("UNIT_BOTH not supported in gpio_core_200"); return _pin_ctrl[unit]; } - void set_atr_reg( - const unit_t unit, const atr_reg_t atr, const uint16_t value, const uint16_t mask) + void set_atr_reg(const unit_t unit, + const atr_reg_t atr, + const uint16_t value, + const uint16_t mask) override { if (unit == dboard_iface::UNIT_BOTH) throw uhd::runtime_error("UNIT_BOTH not supported in gpio_core_200"); @@ -65,14 +68,15 @@ public: update(atr); } - uint16_t get_atr_reg(unit_t unit, atr_reg_t reg) + uint16_t get_atr_reg(unit_t unit, atr_reg_t reg) override { if (unit == dboard_iface::UNIT_BOTH) throw uhd::runtime_error("UNIT_BOTH not supported in gpio_core_200"); return _atr_regs[unit][reg]; } - void set_gpio_ddr(const unit_t unit, const uint16_t value, const uint16_t mask) + void set_gpio_ddr( + const unit_t unit, const uint16_t value, const uint16_t mask) override { if (unit == dboard_iface::UNIT_BOTH) throw uhd::runtime_error("UNIT_BOTH not supported in gpio_core_200"); @@ -84,14 +88,15 @@ public: << shift_by_unit(dboard_iface::UNIT_TX))); } - uint16_t get_gpio_ddr(unit_t unit) + uint16_t get_gpio_ddr(unit_t unit) override { if (unit == dboard_iface::UNIT_BOTH) throw uhd::runtime_error("UNIT_BOTH not supported in gpio_core_200"); return _gpio_ddr[unit]; } - void set_gpio_out(const unit_t unit, const uint16_t value, const uint16_t mask) + void set_gpio_out( + const unit_t unit, const uint16_t value, const uint16_t mask) override { if (unit == dboard_iface::UNIT_BOTH) throw uhd::runtime_error("UNIT_BOTH not supported in gpio_core_200"); @@ -99,14 +104,14 @@ public: this->update(); // full update } - uint16_t get_gpio_out(unit_t unit) + uint16_t get_gpio_out(unit_t unit) override { if (unit == dboard_iface::UNIT_BOTH) throw uhd::runtime_error("UNIT_BOTH not supported in gpio_core_200"); return _gpio_out[unit]; } - uint16_t read_gpio(const unit_t unit) + uint16_t read_gpio(const unit_t unit) override { if (unit == dboard_iface::UNIT_BOTH) throw uhd::runtime_error("UNIT_BOTH not supported in gpio_core_200"); @@ -197,13 +202,13 @@ public: set_ddr_reg(); } - void set_ddr_reg() + void set_ddr_reg() override { _iface->poke32(REG_GPIO_DDR, 0xffffffff); } - void set_atr_reg(const atr_reg_t atr, const uint32_t value) + void set_atr_reg(const atr_reg_t atr, const uint32_t value) override { if (atr == gpio_atr::ATR_REG_IDLE) _iface->poke32(REG_GPIO_IDLE, value); @@ -217,7 +222,7 @@ public: UHD_THROW_INVALID_CODE_PATH(); } - void set_all_regs(const uint32_t value) + void set_all_regs(const uint32_t value) override { set_atr_reg(gpio_atr::ATR_REG_IDLE, value); set_atr_reg(gpio_atr::ATR_REG_TX_ONLY, value); diff --git a/host/lib/usrp/cores/i2c_core_100_wb32.cpp b/host/lib/usrp/cores/i2c_core_100_wb32.cpp index d3d0a135a..d1f1f9fe0 100644 --- a/host/lib/usrp/cores/i2c_core_100_wb32.cpp +++ b/host/lib/usrp/cores/i2c_core_100_wb32.cpp @@ -61,7 +61,7 @@ public: _iface->poke32(REG_I2C_CTRL, I2C_CTRL_EN); // enable I2C core } - void set_clock_rate(const double rate) + void set_clock_rate(const double rate) override { static const uint32_t i2c_datarate = 400000; uint16_t prescaler = uint16_t(rate / (i2c_datarate * 5) - 1); @@ -69,11 +69,11 @@ public: _iface->poke32(REG_I2C_PRESCALER_HI, (prescaler >> 8) & 0xFF); } - void write_i2c(uint16_t addr, const byte_vector_t& bytes) + void write_i2c(uint16_t addr, const byte_vector_t& bytes) override { _iface->poke32(REG_I2C_DATA, (addr << 1) | 0); // addr and read bit (0) _iface->poke32(REG_I2C_CMD_STATUS, - I2C_CMD_WR | I2C_CMD_START | (bytes.size() == 0 ? I2C_CMD_STOP : 0)); + I2C_CMD_WR | I2C_CMD_START | (bytes.empty() ? I2C_CMD_STOP : 0)); // wait for previous transfer to complete if (not wait_chk_ack()) { @@ -92,7 +92,7 @@ public: } } - byte_vector_t read_i2c(uint16_t addr, size_t num_bytes) + byte_vector_t read_i2c(uint16_t addr, size_t num_bytes) override { byte_vector_t bytes; if (num_bytes == 0) @@ -119,7 +119,7 @@ public: // override read_eeprom so we can write once, read all N bytes // the default implementation calls read i2c once per byte - byte_vector_t read_eeprom(uint16_t addr, uint16_t offset, size_t num_bytes) + byte_vector_t read_eeprom(uint16_t addr, uint16_t offset, size_t num_bytes) override { this->write_i2c(addr, byte_vector_t(1, uint8_t(offset))); return this->read_i2c(addr, num_bytes); diff --git a/host/lib/usrp/cores/i2c_core_200.cpp b/host/lib/usrp/cores/i2c_core_200.cpp index 431ba194c..93e3fedf8 100644 --- a/host/lib/usrp/cores/i2c_core_200.cpp +++ b/host/lib/usrp/cores/i2c_core_200.cpp @@ -70,11 +70,11 @@ public: this->poke(REG_I2C_WR_CTRL, I2C_CTRL_EN); // enable I2C core } - void write_i2c(uint16_t addr, const byte_vector_t& bytes) + void write_i2c(uint16_t addr, const byte_vector_t& bytes) override { this->poke(REG_I2C_WR_DATA, (addr << 1) | 0); // addr and read bit (0) this->poke(REG_I2C_WR_CMD, - I2C_CMD_WR | I2C_CMD_START | (bytes.size() == 0 ? I2C_CMD_STOP : 0)); + I2C_CMD_WR | I2C_CMD_START | (bytes.empty() ? I2C_CMD_STOP : 0)); // wait for previous transfer to complete if (not wait_chk_ack()) { @@ -93,7 +93,7 @@ public: } } - byte_vector_t read_i2c(uint16_t addr, size_t num_bytes) + byte_vector_t read_i2c(uint16_t addr, size_t num_bytes) override { byte_vector_t bytes; if (num_bytes == 0) diff --git a/host/lib/usrp/cores/radio_ctrl_core_3000.cpp b/host/lib/usrp/cores/radio_ctrl_core_3000.cpp index 7518bfe6f..6947da3f1 100644 --- a/host/lib/usrp/cores/radio_ctrl_core_3000.cpp +++ b/host/lib/usrp/cores/radio_ctrl_core_3000.cpp @@ -60,7 +60,7 @@ public: this->set_tick_rate(1.0); // something possible but bogus } - ~radio_ctrl_core_3000_impl(void) + ~radio_ctrl_core_3000_impl(void) override { _timeout = ACK_TIMEOUT; // reset timeout to something small UHD_SAFE_CALL( @@ -72,14 +72,14 @@ public: /******************************************************************* * Peek and poke 32 bit implementation ******************************************************************/ - void poke32(const wb_addr_type addr, const uint32_t data) + void poke32(const wb_addr_type addr, const uint32_t data) override { boost::mutex::scoped_lock lock(_mutex); this->send_pkt(addr / 4, data); this->wait_for_ack(false); } - uint32_t peek32(const wb_addr_type addr) + uint32_t peek32(const wb_addr_type addr) override { boost::mutex::scoped_lock lock(_mutex); this->send_pkt(SR_READBACK, addr / 8); @@ -89,7 +89,7 @@ public: return ((addr / 4) & 0x1) ? hi : lo; } - uint64_t peek64(const wb_addr_type addr) + uint64_t peek64(const wb_addr_type addr) override { boost::mutex::scoped_lock lock(_mutex); this->send_pkt(SR_READBACK, addr / 8); @@ -99,7 +99,7 @@ public: /******************************************************************* * Update methods for time ******************************************************************/ - void set_time(const uhd::time_spec_t& time) + void set_time(const uhd::time_spec_t& time) override { boost::mutex::scoped_lock lock(_mutex); _time = time; @@ -108,13 +108,13 @@ public: _timeout = MASSIVE_TIMEOUT; // permanently sets larger timeout } - uhd::time_spec_t get_time(void) + uhd::time_spec_t get_time(void) override { boost::mutex::scoped_lock lock(_mutex); return _time; } - void set_tick_rate(const double rate) + void set_tick_rate(const double rate) override { boost::mutex::scoped_lock lock(_mutex); _tick_rate = rate; @@ -298,7 +298,7 @@ private: uhd::msg_task::msg_payload_t msg; do { msg = _async_task->get_msg_from_dump_queue(recv_sid); - } while (msg.size() < min_buff_size && msg.size() != 0); + } while (msg.size() < min_buff_size && !msg.empty()); if (msg.size() >= min_buff_size) { memcpy(b.data, &msg.front(), std::min(msg.size(), sizeof(b.data))); @@ -307,14 +307,14 @@ private: return false; } - void push_response(const uint32_t* buff) + void push_response(const uint32_t* buff) override { resp_buff_type resp_buff; std::memcpy(resp_buff.data, buff, sizeof(resp_buff)); _resp_queue.push_with_haste(resp_buff); } - void hold_task(uhd::msg_task::sptr task) + void hold_task(uhd::msg_task::sptr task) override { _async_task = task; } diff --git a/host/lib/usrp/cores/rx_dsp_core_200.cpp b/host/lib/usrp/cores/rx_dsp_core_200.cpp index 89b44290f..5e2c3804f 100644 --- a/host/lib/usrp/cores/rx_dsp_core_200.cpp +++ b/host/lib/usrp/cores/rx_dsp_core_200.cpp @@ -82,14 +82,14 @@ public: this->clear(); } - ~rx_dsp_core_200_impl(void) + ~rx_dsp_core_200_impl(void) override { UHD_SAFE_CALL( // shutdown any possible streaming this->clear();) } - void clear(void) + void clear(void) override { _iface->poke32(REG_RX_CTRL_NCHANNELS, 0); // also reset _iface->poke32(REG_RX_CTRL_VRT_HDR, @@ -101,12 +101,12 @@ public: _iface->poke32(REG_RX_CTRL_VRT_TLR, 0); } - void set_nsamps_per_packet(const size_t nsamps) + void set_nsamps_per_packet(const size_t nsamps) override { _iface->poke32(REG_RX_CTRL_NSAMPS_PP, nsamps); } - void issue_stream_command(const stream_cmd_t& stream_cmd) + void issue_stream_command(const stream_cmd_t& stream_cmd) override { UHD_ASSERT_THROW(stream_cmd.num_samps <= 0x0fffffff); _continuous_streaming = stream_cmd.stream_mode @@ -147,7 +147,7 @@ public: _iface->poke32(REG_RX_CTRL_TIME_LO, uint32_t(ticks >> 0)); // latches the command } - void set_mux(const std::string& mode, const bool fe_swapped) + void set_mux(const std::string& mode, const bool fe_swapped) override { static const uhd::dict<std::string, uint32_t> mode_to_mux = boost::assign::map_list_of("IQ", 0)("QI", FLAG_DSP_RX_MUX_SWAP_IQ)( @@ -157,18 +157,18 @@ public: mode_to_mux[mode] ^ (fe_swapped ? FLAG_DSP_RX_MUX_SWAP_IQ : 0)); } - void set_tick_rate(const double rate) + void set_tick_rate(const double rate) override { _tick_rate = rate; } - void set_link_rate(const double rate) + void set_link_rate(const double rate) override { //_link_rate = rate/sizeof(uint32_t); //in samps/s _link_rate = rate / sizeof(uint16_t); // in samps/s (allows for 8sc) } - uhd::meta_range_t get_host_rates(void) + uhd::meta_range_t get_host_rates(void) override { meta_range_t range; for (int rate = 512; rate > 256; rate -= 4) { @@ -183,7 +183,7 @@ public: return range; } - double set_host_rate(const double rate) + double set_host_rate(const double rate) override { const size_t decim_rate = boost::math::iround(_tick_rate / this->get_host_rates().clip(rate, true)); @@ -235,12 +235,12 @@ public: _iface->poke32(REG_DSP_RX_SCALE_IQ, actual_scalar); } - double get_scaling_adjustment(void) + double get_scaling_adjustment(void) override { return _fxpt_scalar_correction * _host_extra_scaling / 32767.; } - double set_freq(const double requested_freq) + double set_freq(const double requested_freq) override { double actual_freq; int32_t freq_word; @@ -249,19 +249,19 @@ public: return actual_freq; } - uhd::meta_range_t get_freq_range(void) + uhd::meta_range_t get_freq_range(void) override { return uhd::meta_range_t( -_tick_rate / 2, +_tick_rate / 2, _tick_rate / std::pow(2.0, 32)); } - void handle_overflow(void) + void handle_overflow(void) override { if (_continuous_streaming) issue_stream_command(stream_cmd_t::STREAM_MODE_START_CONTINUOUS); } - void setup(const uhd::stream_args_t& stream_args) + void setup(const uhd::stream_args_t& stream_args) override { if (not stream_args.args.has_key("noclear")) this->clear(); diff --git a/host/lib/usrp/cores/rx_dsp_core_3000.cpp b/host/lib/usrp/cores/rx_dsp_core_3000.cpp index 3724ca827..ff431fd41 100644 --- a/host/lib/usrp/cores/rx_dsp_core_3000.cpp +++ b/host/lib/usrp/cores/rx_dsp_core_3000.cpp @@ -54,13 +54,13 @@ public: { } - ~rx_dsp_core_3000_impl(void) + ~rx_dsp_core_3000_impl(void) override { UHD_SAFE_CALL(; // NOP ) } - void set_mux(const uhd::usrp::fe_connection_t& fe_conn) + void set_mux(const uhd::usrp::fe_connection_t& fe_conn) override { uint32_t reg_val = 0; switch (fe_conn.get_sampling_mode()) { @@ -101,19 +101,19 @@ public: } } - void set_tick_rate(const double rate) + void set_tick_rate(const double rate) override { _tick_rate = rate; set_freq(_current_freq); } - void set_link_rate(const double rate) + void set_link_rate(const double rate) override { //_link_rate = rate/sizeof(uint32_t); //in samps/s _link_rate = rate / sizeof(uint16_t); // in samps/s (allows for 8sc) } - uhd::meta_range_t get_host_rates(void) + uhd::meta_range_t get_host_rates(void) override { meta_range_t range; if (!_is_b200) { @@ -133,7 +133,7 @@ public: return range; } - double set_host_rate(const double rate) + double set_host_rate(const double rate) override { const size_t decim_rate = boost::math::iround(_tick_rate / this->get_host_rates().clip(rate, true)); @@ -237,12 +237,12 @@ public: _iface->poke32(REG_DSP_RX_SCALE_IQ, actual_scalar); } - double get_scaling_adjustment(void) + double get_scaling_adjustment(void) override { return _fxpt_scalar_correction * _host_extra_scaling / 32767.; } - double set_freq(const double requested_freq) + double set_freq(const double requested_freq) override { double actual_freq; int32_t freq_word; @@ -253,12 +253,12 @@ public: return actual_freq; } - double get_freq(void) + double get_freq(void) override { return _current_freq; } - uhd::meta_range_t get_freq_range(void) + uhd::meta_range_t get_freq_range(void) override { // Too keep the DSP range symmetric about 0, we use abs(_dsp_freq_offset) const double offset = std::abs<double>(_dsp_freq_offset); @@ -267,7 +267,7 @@ public: _tick_rate / std::pow(2.0, 32)); } - void setup(const uhd::stream_args_t& stream_args) + void setup(const uhd::stream_args_t& stream_args) override { if (stream_args.otw_format == "sc16") { _dsp_extra_scaling = 1.0; @@ -294,7 +294,7 @@ public: this->update_scalar(); } - void populate_subtree(property_tree::sptr subtree) + void populate_subtree(property_tree::sptr subtree) override { subtree->create<meta_range_t>("rate/range") .set_publisher(std::bind(&rx_dsp_core_3000::get_host_rates, this)); diff --git a/host/lib/usrp/cores/rx_frontend_core_200.cpp b/host/lib/usrp/cores/rx_frontend_core_200.cpp index b16de0d9e..d96672da4 100644 --- a/host/lib/usrp/cores/rx_frontend_core_200.cpp +++ b/host/lib/usrp/cores/rx_frontend_core_200.cpp @@ -52,17 +52,17 @@ public: // NOP } - void set_mux(const bool swap) + void set_mux(const bool swap) override { _iface->poke32(REG_RX_FE_SWAP_IQ, swap ? 1 : 0); } - void set_dc_offset_auto(const bool enb) + void set_dc_offset_auto(const bool enb) override { this->set_dc_offset(enb ? 0 : OFFSET_FIXED); } - std::complex<double> set_dc_offset(const std::complex<double>& off) + std::complex<double> set_dc_offset(const std::complex<double>& off) override { static const double scaler = double(1ul << 29); _i_dc_off = boost::math::iround(off.real() * scaler); @@ -79,13 +79,13 @@ public: _iface->poke32(REG_RX_FE_OFFSET_Q, flags | (_q_dc_off & ~FLAG_MASK)); } - void set_iq_balance(const std::complex<double>& cor) + void set_iq_balance(const std::complex<double>& cor) override { _iface->poke32(REG_RX_FE_MAG_CORRECTION, fs_to_bits(cor.real(), 18)); _iface->poke32(REG_RX_FE_PHASE_CORRECTION, fs_to_bits(cor.imag(), 18)); } - void populate_subtree(uhd::property_tree::sptr subtree) + void populate_subtree(uhd::property_tree::sptr subtree) override { subtree->create<uhd::meta_range_t>("dc_offset/range") .set(meta_range_t(DC_OFFSET_MIN, DC_OFFSET_MAX)); diff --git a/host/lib/usrp/cores/rx_frontend_core_3000.cpp b/host/lib/usrp/cores/rx_frontend_core_3000.cpp index 756f0995d..abbe64b13 100644 --- a/host/lib/usrp/cores/rx_frontend_core_3000.cpp +++ b/host/lib/usrp/cores/rx_frontend_core_3000.cpp @@ -79,12 +79,12 @@ public: // NOP } - void set_adc_rate(const double rate) + void set_adc_rate(const double rate) override { _adc_rate = rate; } - void bypass_all(bool bypass_en) + void bypass_all(bool bypass_en) override { if (bypass_en) { _iface->poke32(_rx_fe_mapping_reg, FLAG_DSP_RX_MAPPING_BYPASS_ALL); @@ -93,7 +93,7 @@ public: } } - void set_fe_connection(const fe_connection_t& fe_conn) + void set_fe_connection(const fe_connection_t& fe_conn) override { uint32_t mapping_reg_val = 0; switch (fe_conn.get_sampling_mode()) { @@ -143,12 +143,12 @@ public: _fe_conn = fe_conn; } - void set_dc_offset_auto(const bool enb) + void set_dc_offset_auto(const bool enb) override { _set_dc_offset(enb ? 0 : OFFSET_FIXED); } - std::complex<double> set_dc_offset(const std::complex<double>& off) + std::complex<double> set_dc_offset(const std::complex<double>& off) override { static const double scaler = double(1ul << 29); _i_dc_off = boost::math::iround(off.real() * scaler); @@ -165,13 +165,13 @@ public: _iface->poke32(_rx_fe_offset_q_reg, flags | (_q_dc_off & ~FLAG_MASK)); } - void set_iq_balance(const std::complex<double>& cor) + void set_iq_balance(const std::complex<double>& cor) override { _iface->poke32(_rx_fe_mag_corr_reg, fs_to_bits(cor.real(), 18)); _iface->poke32(_rx_fe_phase_corr_reg, fs_to_bits(cor.imag(), 18)); } - void populate_subtree(uhd::property_tree::sptr subtree) + void populate_subtree(uhd::property_tree::sptr subtree) override { subtree->create<uhd::meta_range_t>("dc_offset/range") .set(meta_range_t(DC_OFFSET_MIN, DC_OFFSET_MAX)); diff --git a/host/lib/usrp/cores/rx_vita_core_3000.cpp b/host/lib/usrp/cores/rx_vita_core_3000.cpp index fb3305ce8..622120d90 100644 --- a/host/lib/usrp/cores/rx_vita_core_3000.cpp +++ b/host/lib/usrp/cores/rx_vita_core_3000.cpp @@ -41,12 +41,12 @@ struct rx_vita_core_3000_impl : rx_vita_core_3000 this->clear(); } - ~rx_vita_core_3000_impl(void) + ~rx_vita_core_3000_impl(void) override { UHD_SAFE_CALL(this->clear();) } - void configure_flow_control(const size_t window_size) + void configure_flow_control(const size_t window_size) override { // The window needs to be disabled in the case where this object is // uncleanly destroyed and the FC window is left enabled @@ -63,19 +63,19 @@ struct rx_vita_core_3000_impl : rx_vita_core_3000 _iface->poke32(REG_FC_ENABLE, window_size ? 1 : 0); } - void clear(void) + void clear(void) override { // FC should never be disabled, this will actually become // impossible in the future // this->configure_flow_control(0); //disable fc } - void set_nsamps_per_packet(const size_t nsamps) + void set_nsamps_per_packet(const size_t nsamps) override { _iface->poke32(REG_FRAMER_MAXLEN, nsamps); } - void issue_stream_command(const uhd::stream_cmd_t& stream_cmd) + void issue_stream_command(const uhd::stream_cmd_t& stream_cmd) override { if (not _is_setup) { // UHD_LOGGER_WARNING("CORES") << "rx vita core 3000 issue stream command - @@ -134,28 +134,28 @@ struct rx_vita_core_3000_impl : rx_vita_core_3000 _iface->poke32(REG_CTRL_TIME_LO, uint32_t(ticks >> 0)); // latches the command } - void set_tick_rate(const double rate) + void set_tick_rate(const double rate) override { _tick_rate = rate; } - void set_sid(const uint32_t sid) + void set_sid(const uint32_t sid) override { _iface->poke32(REG_FRAMER_SID, sid); } - void handle_overflow(void) + void handle_overflow(void) override { if (_continuous_streaming) this->issue_stream_command(stream_cmd_t::STREAM_MODE_START_CONTINUOUS); } - void setup(const uhd::stream_args_t&) + void setup(const uhd::stream_args_t&) override { _is_setup = true; } - bool in_continuous_streaming_mode(void) + bool in_continuous_streaming_mode(void) override { return _continuous_streaming; } diff --git a/host/lib/usrp/cores/spi_core_3000.cpp b/host/lib/usrp/cores/spi_core_3000.cpp index e279ffa66..28a8782d5 100644 --- a/host/lib/usrp/cores/spi_core_3000.cpp +++ b/host/lib/usrp/cores/spi_core_3000.cpp @@ -46,7 +46,7 @@ public: const spi_config_t& config, uint32_t data, size_t num_bits, - bool readback) + bool readback) override { std::lock_guard<std::mutex> lock(_mutex); @@ -93,7 +93,7 @@ public: return 0; } - void set_divider(const double div) + void set_divider(const double div) override { _div = size_t((div / 2) - 0.5); } diff --git a/host/lib/usrp/cores/time64_core_200.cpp b/host/lib/usrp/cores/time64_core_200.cpp index a7d5427c1..f5cd7158f 100644 --- a/host/lib/usrp/cores/time64_core_200.cpp +++ b/host/lib/usrp/cores/time64_core_200.cpp @@ -54,17 +54,17 @@ public: _sources.push_back("mimo"); } - void enable_gpsdo(void) + void enable_gpsdo(void) override { _sources.push_back("gpsdo"); } - void set_tick_rate(const double rate) + void set_tick_rate(const double rate) override { _tick_rate = rate; } - uhd::time_spec_t get_time_now(void) + uhd::time_spec_t get_time_now(void) override { for (size_t i = 0; i < 3; i++) { // special algorithm because we cant read 64 bits synchronously @@ -78,7 +78,7 @@ public: throw uhd::runtime_error("time64_core_200: get time now timeout"); } - uhd::time_spec_t get_time_last_pps(void) + uhd::time_spec_t get_time_last_pps(void) override { for (size_t i = 0; i < 3; i++) { // special algorithm because we cant read 64 bits synchronously @@ -92,7 +92,7 @@ public: throw uhd::runtime_error("time64_core_200: get time last pps timeout"); } - void set_time_now(const uhd::time_spec_t& time) + void set_time_now(const uhd::time_spec_t& time) override { const uint64_t ticks = time.to_ticks(_tick_rate); _iface->poke32(REG_TIME64_TICKS_LO, uint32_t(ticks >> 0)); @@ -100,7 +100,7 @@ public: _iface->poke32(REG_TIME64_TICKS_HI, uint32_t(ticks >> 32)); // latches all 3 } - void set_time_next_pps(const uhd::time_spec_t& time) + void set_time_next_pps(const uhd::time_spec_t& time) override { const uint64_t ticks = time.to_ticks(_tick_rate); _iface->poke32(REG_TIME64_TICKS_LO, uint32_t(ticks >> 0)); @@ -108,7 +108,7 @@ public: _iface->poke32(REG_TIME64_TICKS_HI, uint32_t(ticks >> 32)); // latches all 3 } - void set_time_source(const std::string& source) + void set_time_source(const std::string& source) override { assert_has(_sources, source, "time source"); @@ -130,7 +130,7 @@ public: } } - std::vector<std::string> get_time_sources(void) + std::vector<std::string> get_time_sources(void) override { return _sources; } diff --git a/host/lib/usrp/cores/time_core_3000.cpp b/host/lib/usrp/cores/time_core_3000.cpp index 852c3882e..8e32cf4b8 100644 --- a/host/lib/usrp/cores/time_core_3000.cpp +++ b/host/lib/usrp/cores/time_core_3000.cpp @@ -36,18 +36,18 @@ struct time_core_3000_impl : time_core_3000 this->set_tick_rate(1); // init to non zero } - ~time_core_3000_impl(void) + ~time_core_3000_impl(void) override { UHD_SAFE_CALL(; // NOP ) } - void set_tick_rate(const double rate) + void set_tick_rate(const double rate) override { _tick_rate = rate; } - void self_test(void) + void self_test(void) override { const size_t sleep_millis = 100; UHD_LOGGER_DEBUG("CORES") << "Performing timer loopback test... "; @@ -71,19 +71,19 @@ struct time_core_3000_impl : time_core_3000 << "Approximate clock rate: " << (approx_rate / 1e6) << " MHz\n"; } - uhd::time_spec_t get_time_now(void) + uhd::time_spec_t get_time_now(void) override { const uint64_t ticks = _iface->peek64(_readback_bases.rb_now); return time_spec_t::from_ticks(ticks, _tick_rate); } - uhd::time_spec_t get_time_last_pps(void) + uhd::time_spec_t get_time_last_pps(void) override { const uint64_t ticks = _iface->peek64(_readback_bases.rb_pps); return time_spec_t::from_ticks(ticks, _tick_rate); } - void set_time_now(const uhd::time_spec_t& time) + void set_time_now(const uhd::time_spec_t& time) override { const uint64_t ticks = time.to_ticks(_tick_rate); _iface->poke32(REG_TIME_HI, uint32_t(ticks >> 32)); @@ -91,7 +91,7 @@ struct time_core_3000_impl : time_core_3000 _iface->poke32(REG_TIME_CTRL, CTRL_LATCH_TIME_NOW); } - void set_time_sync(const uhd::time_spec_t& time) + void set_time_sync(const uhd::time_spec_t& time) override { const uint64_t ticks = time.to_ticks(_tick_rate); _iface->poke32(REG_TIME_HI, uint32_t(ticks >> 32)); @@ -99,7 +99,7 @@ struct time_core_3000_impl : time_core_3000 _iface->poke32(REG_TIME_CTRL, CTRL_LATCH_TIME_SYNC); } - void set_time_next_pps(const uhd::time_spec_t& time) + void set_time_next_pps(const uhd::time_spec_t& time) override { const uint64_t ticks = time.to_ticks(_tick_rate); _iface->poke32(REG_TIME_HI, uint32_t(ticks >> 32)); diff --git a/host/lib/usrp/cores/tx_dsp_core_200.cpp b/host/lib/usrp/cores/tx_dsp_core_200.cpp index 8dd48181c..1c743b0b0 100644 --- a/host/lib/usrp/cores/tx_dsp_core_200.cpp +++ b/host/lib/usrp/cores/tx_dsp_core_200.cpp @@ -70,7 +70,7 @@ public: this->set_underflow_policy("next_packet"); } - void clear(void) + void clear(void) override { _iface->poke32(REG_TX_CTRL_CLEAR, 1); // reset and flush technique std::this_thread::sleep_for(std::chrono::milliseconds(10)); @@ -89,18 +89,18 @@ public: "USRP TX cannot handle requested underflow policy: " + policy); } - void set_tick_rate(const double rate) + void set_tick_rate(const double rate) override { _tick_rate = rate; } - void set_link_rate(const double rate) + void set_link_rate(const double rate) override { //_link_rate = rate/sizeof(uint32_t); //in samps/s _link_rate = rate / sizeof(uint16_t); // in samps/s (allows for 8sc) } - uhd::meta_range_t get_host_rates(void) + uhd::meta_range_t get_host_rates(void) override { meta_range_t range; for (int rate = 512; rate > 256; rate -= 4) { @@ -115,7 +115,7 @@ public: return range; } - double set_host_rate(const double rate) + double set_host_rate(const double rate) override { const size_t interp_rate = boost::math::iround(_tick_rate / this->get_host_rates().clip(rate, true)); @@ -165,12 +165,12 @@ public: _iface->poke32(REG_DSP_TX_SCALE_IQ, actual_scalar); } - double get_scaling_adjustment(void) + double get_scaling_adjustment(void) override { return _fxpt_scalar_correction * _host_extra_scaling * 32767.; } - double set_freq(const double requested_freq) + double set_freq(const double requested_freq) override { double actual_freq; int32_t freq_word; @@ -179,13 +179,13 @@ public: return actual_freq; } - uhd::meta_range_t get_freq_range(void) + uhd::meta_range_t get_freq_range(void) override { return uhd::meta_range_t( -_tick_rate / 2, +_tick_rate / 2, _tick_rate / std::pow(2.0, 32)); } - void set_updates(const size_t cycles_per_up, const size_t packets_per_up) + void set_updates(const size_t cycles_per_up, const size_t packets_per_up) override { _iface->poke32(REG_TX_CTRL_CYCLES_PER_UP, (cycles_per_up == 0) ? 0 : (FLAG_TX_CTRL_UP_ENB | cycles_per_up)); @@ -193,7 +193,7 @@ public: (packets_per_up == 0) ? 0 : (FLAG_TX_CTRL_UP_ENB | packets_per_up)); } - void setup(const uhd::stream_args_t& stream_args) + void setup(const uhd::stream_args_t& stream_args) override { if (not stream_args.args.has_key("noclear")) this->clear(); diff --git a/host/lib/usrp/cores/tx_dsp_core_3000.cpp b/host/lib/usrp/cores/tx_dsp_core_3000.cpp index 3b0d85c00..f46938de3 100644 --- a/host/lib/usrp/cores/tx_dsp_core_3000.cpp +++ b/host/lib/usrp/cores/tx_dsp_core_3000.cpp @@ -46,19 +46,19 @@ public: this->set_tick_rate(1.0); } - void set_tick_rate(const double rate) + void set_tick_rate(const double rate) override { _tick_rate = rate; set_freq(_current_freq); } - void set_link_rate(const double rate) + void set_link_rate(const double rate) override { //_link_rate = rate/sizeof(uint32_t); //in samps/s _link_rate = rate / sizeof(uint16_t); // in samps/s (allows for 8sc) } - uhd::meta_range_t get_host_rates(void) + uhd::meta_range_t get_host_rates(void) override { meta_range_t range; for (int rate = 512; rate > 256; rate -= 4) { @@ -73,7 +73,7 @@ public: return range; } - double set_host_rate(const double rate) + double set_host_rate(const double rate) override { const size_t interp_rate = boost::math::iround(_tick_rate / this->get_host_rates().clip(rate, true)); @@ -128,12 +128,12 @@ public: _iface->poke32(REG_DSP_TX_SCALE_IQ, actual_scalar); } - double get_scaling_adjustment(void) + double get_scaling_adjustment(void) override { return _fxpt_scalar_correction * _host_extra_scaling * 32767.; } - double set_freq(const double requested_freq) + double set_freq(const double requested_freq) override { double actual_freq; int32_t freq_word; @@ -143,18 +143,18 @@ public: return actual_freq; } - double get_freq(void) + double get_freq(void) override { return _current_freq; } - uhd::meta_range_t get_freq_range(void) + uhd::meta_range_t get_freq_range(void) override { return uhd::meta_range_t( -_tick_rate / 2, +_tick_rate / 2, _tick_rate / std::pow(2.0, 32)); } - void setup(const uhd::stream_args_t& stream_args) + void setup(const uhd::stream_args_t& stream_args) override { if (stream_args.otw_format == "sc16") { _dsp_extra_scaling = 1.0; @@ -181,7 +181,7 @@ public: this->update_scalar(); } - void populate_subtree(property_tree::sptr subtree) + void populate_subtree(property_tree::sptr subtree) override { subtree->create<meta_range_t>("rate/range") .set_publisher(std::bind(&tx_dsp_core_3000::get_host_rates, this)); diff --git a/host/lib/usrp/cores/tx_frontend_core_200.cpp b/host/lib/usrp/cores/tx_frontend_core_200.cpp index 46a79c497..45b2045dd 100644 --- a/host/lib/usrp/cores/tx_frontend_core_200.cpp +++ b/host/lib/usrp/cores/tx_frontend_core_200.cpp @@ -51,7 +51,7 @@ public: // NOP } - void set_mux(const std::string& mode) + void set_mux(const std::string& mode) override { static const uhd::dict<std::string, uint32_t> mode_to_mux = boost::assign::map_list_of( @@ -63,7 +63,7 @@ public: _iface->poke32(REG_TX_FE_MUX, mode_to_mux[mode]); } - std::complex<double> set_dc_offset(const std::complex<double>& off) + std::complex<double> set_dc_offset(const std::complex<double>& off) override { static const double scaler = double(1ul << 23); const int32_t i_dc_off = boost::math::iround(off.real() * scaler); @@ -75,13 +75,13 @@ public: return std::complex<double>(i_dc_off / scaler, q_dc_off / scaler); } - void set_iq_balance(const std::complex<double>& cor) + void set_iq_balance(const std::complex<double>& cor) override { _iface->poke32(REG_TX_FE_MAG_CORRECTION, fs_to_bits(cor.real(), 18)); _iface->poke32(REG_TX_FE_PHASE_CORRECTION, fs_to_bits(cor.imag(), 18)); } - void populate_subtree(uhd::property_tree::sptr subtree) + void populate_subtree(uhd::property_tree::sptr subtree) override { subtree->create<uhd::meta_range_t>("dc_offset/range") .set(meta_range_t(DC_OFFSET_MIN, DC_OFFSET_MAX)); diff --git a/host/lib/usrp/cores/tx_vita_core_3000.cpp b/host/lib/usrp/cores/tx_vita_core_3000.cpp index c89301464..d586e2cfc 100644 --- a/host/lib/usrp/cores/tx_vita_core_3000.cpp +++ b/host/lib/usrp/cores/tx_vita_core_3000.cpp @@ -44,12 +44,12 @@ struct tx_vita_core_3000_impl : tx_vita_core_3000 this->clear(); } - ~tx_vita_core_3000_impl(void) + ~tx_vita_core_3000_impl(void) override { UHD_SAFE_CALL(this->clear();) } - void clear(void) + void clear(void) override { this->configure_flow_control(0, 0); this->set_underflow_policy(_policy); // clears the seq @@ -69,14 +69,15 @@ struct tx_vita_core_3000_impl : tx_vita_core_3000 _policy = policy; } - void setup(const uhd::stream_args_t& stream_args) + void setup(const uhd::stream_args_t& stream_args) override { if (stream_args.args.has_key("underflow_policy")) { this->set_underflow_policy(stream_args.args["underflow_policy"]); } } - void configure_flow_control(const size_t cycs_per_up, const size_t pkts_per_up) + void configure_flow_control( + const size_t cycs_per_up, const size_t pkts_per_up) override { if (cycs_per_up == 0) _iface->poke32(_fc_base + REG_CTRL_FC_CYCLE_OFFSET, 0); diff --git a/host/lib/usrp/cores/user_settings_core_200.cpp b/host/lib/usrp/cores/user_settings_core_200.cpp index c3606738a..abe1bee5f 100644 --- a/host/lib/usrp/cores/user_settings_core_200.cpp +++ b/host/lib/usrp/cores/user_settings_core_200.cpp @@ -26,7 +26,7 @@ public: // NOP } - void set_reg(const user_reg_t& reg) + void set_reg(const user_reg_t& reg) override { _iface->poke32(REG_USER_ADDR, reg.first); _iface->poke32(REG_USER_DATA, reg.second); diff --git a/host/lib/usrp/cores/user_settings_core_3000.cpp b/host/lib/usrp/cores/user_settings_core_3000.cpp index 7518756f7..9e04175c2 100644 --- a/host/lib/usrp/cores/user_settings_core_3000.cpp +++ b/host/lib/usrp/cores/user_settings_core_3000.cpp @@ -25,7 +25,7 @@ public: { } - void poke64(const wb_addr_type offset, const uint64_t value) + void poke64(const wb_addr_type offset, const uint64_t value) override { if (offset % sizeof(uint64_t) != 0) throw uhd::value_error("poke64: Incorrect address alignment"); @@ -33,7 +33,7 @@ public: poke32(offset + 4, static_cast<uint32_t>(value >> 32)); } - uint64_t peek64(const wb_addr_type offset) + uint64_t peek64(const wb_addr_type offset) override { if (offset % sizeof(uint64_t) != 0) throw uhd::value_error("peek64: Incorrect address alignment"); @@ -44,7 +44,7 @@ public: return _iface->peek64(_rb_reg_addr); } - void poke32(const wb_addr_type offset, const uint32_t value) + void poke32(const wb_addr_type offset, const uint32_t value) override { if (offset % sizeof(uint32_t) != 0) throw uhd::value_error("poke32: Incorrect address alignment"); @@ -55,7 +55,7 @@ public: _iface->poke32(REG_USER_SR_DATA, value); } - uint32_t peek32(const wb_addr_type offset) + uint32_t peek32(const wb_addr_type offset) override { if (offset % sizeof(uint32_t) != 0) throw uhd::value_error("peek32: Incorrect address alignment"); |