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-rw-r--r--host/lib/usrp/b200/b200_iface.cpp80
-rw-r--r--host/lib/usrp/b200/b200_iface.hpp4
-rw-r--r--host/lib/usrp/b200/b200_impl.cpp33
-rw-r--r--host/lib/usrp/b200/b200_impl.hpp4
4 files changed, 32 insertions, 89 deletions
diff --git a/host/lib/usrp/b200/b200_iface.cpp b/host/lib/usrp/b200/b200_iface.cpp
index efb9b3a35..820090959 100644
--- a/host/lib/usrp/b200/b200_iface.cpp
+++ b/host/lib/usrp/b200/b200_iface.cpp
@@ -57,15 +57,11 @@ const static boost::uint8_t B200_VREQ_GET_FPGA_HASH = 0x1D;
const static boost::uint8_t B200_VREQ_SET_FW_HASH = 0x1E;
const static boost::uint8_t B200_VREQ_GET_FW_HASH = 0x1F;
const static boost::uint8_t B200_VREQ_LOOP = 0x22;
-const static boost::uint8_t B200_VREQ_SPI_WRITE = 0x32;
-const static boost::uint8_t B200_VREQ_SPI_READ = 0x42;
const static boost::uint8_t B200_VREQ_FPGA_CONFIG = 0x55;
const static boost::uint8_t B200_VREQ_FPGA_RESET = 0x62;
const static boost::uint8_t B200_VREQ_GPIF_RESET = 0x72;
const static boost::uint8_t B200_VREQ_GET_USB = 0x80;
const static boost::uint8_t B200_VREQ_GET_STATUS = 0x83;
-const static boost::uint8_t B200_VREQ_AD9361_CTRL_WRITE = 0x90;
-const static boost::uint8_t B200_VREQ_AD9361_CTRL_READ = 0x91;
const static boost::uint8_t B200_VREQ_FX3_RESET = 0x99;
const static boost::uint8_t B200_VREQ_EEPROM_WRITE = 0xBA;
const static boost::uint8_t B200_VREQ_EEPROM_READ = 0xBB;
@@ -270,82 +266,6 @@ public:
return recv_bytes;
}
- void transact_spi(
- unsigned char *tx_data,
- size_t num_tx_bits,
- unsigned char *rx_data,
- size_t num_rx_bits) {
- int ret = 0;
- boost::uint16_t tx_length = num_tx_bits / 8;
-
- if(tx_data[0] & 0x80) {
- ret = fx3_control_write(B200_VREQ_SPI_WRITE, 0x00, \
- 0x00, tx_data, tx_length);
- } else {
- ret = fx3_control_write(B200_VREQ_SPI_READ, 0x00, \
- 0x00, tx_data, tx_length);
- }
-
- if (ret < 0)
- throw uhd::io_error((boost::format("Failed to write SPI (%d: %s)") % ret % libusb_error_name(ret)).str());
- else if (ret != tx_length)
- throw uhd::io_error((boost::format("Short write on write SPI (expecting: %d, returned: %d)") % tx_length % ret).str());
-
-
- if(num_rx_bits) {
- boost::uint16_t total_length = num_rx_bits / 8;
-
- ret = fx3_control_read(B200_VREQ_LOOP, 0x00, \
- 0x00, rx_data, total_length);
-
- if (ret < 0)
- throw uhd::io_error((boost::format("Failed to readback (%d: %s)") % ret % libusb_error_name(ret)).str());
- else if (ret != total_length)
- throw uhd::io_error((boost::format("Short read on readback (expecting: %d, returned: %d)") % total_length % ret).str());
- }
- }
-
- void ad9361_transact(const unsigned char in_buff[AD9361_DISPATCH_PACKET_SIZE], unsigned char out_buff[AD9361_DISPATCH_PACKET_SIZE]) {
- const int bytes_to_write = AD9361_DISPATCH_PACKET_SIZE;
- const int bytes_to_read = AD9361_DISPATCH_PACKET_SIZE;
- const size_t read_retries = 5;
-
- int ret = fx3_control_write(B200_VREQ_AD9361_CTRL_WRITE, 0x00, 0x00, (unsigned char *)in_buff, bytes_to_write);
- if (ret < 0)
- throw uhd::io_error((boost::format("Failed to write AD9361 (%d: %s)") % ret % libusb_error_name(ret)).str());
- else if (ret != bytes_to_write)
- throw uhd::io_error((boost::format("Short write on write AD9361 (expecting: %d, returned: %d)") % bytes_to_write % ret).str());
-
- for (size_t i = 0; i < read_retries; i++)
- {
- ret = fx3_control_read(B200_VREQ_AD9361_CTRL_READ, 0x00, 0x00, out_buff, bytes_to_read, 3000);
- if (ret < 0)
- {
- if (ret == LIBUSB_ERROR_TIMEOUT)
- {
- UHD_LOG << (boost::format("Failed to read AD9361 (%d: %s). Retrying (%d of %d)...")
- % ret
- % libusb_error_name(ret)
- % (i+1)
- % read_retries
- ) << std::endl;
- }
- else
- {
- throw uhd::io_error((boost::format("Failed to read AD9361 (%d: %s)")
- % ret
- % libusb_error_name(ret)
- ).str());
- }
- }
-
- if (ret == bytes_to_read)
- return;
- }
-
- throw uhd::io_error(str(boost::format("Failed to read complete AD9361 (expecting: %d, last read: %d)") % bytes_to_read % ret));
- }
-
void load_firmware(const std::string filestring, UHD_UNUSED(bool force) = false)
{
const char *filename = filestring.c_str();
diff --git a/host/lib/usrp/b200/b200_iface.hpp b/host/lib/usrp/b200/b200_iface.hpp
index 18d058386..83adfdd64 100644
--- a/host/lib/usrp/b200/b200_iface.hpp
+++ b/host/lib/usrp/b200/b200_iface.hpp
@@ -70,10 +70,6 @@ public:
//! load an FPGA image
virtual boost::uint32_t load_fpga(const std::string filestring) = 0;
- //! send SPI through the FX3
- virtual void transact_spi( unsigned char *tx_data, size_t num_tx_bits, \
- unsigned char *rx_data, size_t num_rx_bits) = 0;
-
virtual void write_eeprom(boost::uint16_t addr, boost::uint16_t offset, const uhd::byte_vector_t &bytes) = 0;
virtual uhd::byte_vector_t read_eeprom(boost::uint16_t addr, boost::uint16_t offset, size_t num_bytes) = 0;
diff --git a/host/lib/usrp/b200/b200_impl.cpp b/host/lib/usrp/b200/b200_impl.cpp
index 7c85176ef..5c9324cb9 100644
--- a/host/lib/usrp/b200/b200_impl.cpp
+++ b/host/lib/usrp/b200/b200_impl.cpp
@@ -46,6 +46,33 @@ static const boost::posix_time::milliseconds REENUMERATION_TIMEOUT_MS(3000);
static const size_t FE1 = 1;
static const size_t FE2 = 0;
+class b200_ad9361_client_t : public ad9361_params {
+public:
+ ~b200_ad9361_client_t() {}
+ double get_band_edge(frequency_band_t band) {
+ switch (band) {
+ case AD9361_RX_BAND0: return 2.2e9;
+ case AD9361_RX_BAND1: return 4.0e9;
+ case AD9361_TX_BAND0: return 2.5e9;
+ default: return 0;
+ }
+ }
+ clocking_mode_t get_clocking_mode() {
+ return AD9361_XTAL_N_CLK_PATH;
+ }
+ digital_interface_mode_t get_digital_interface_mode() {
+ return AD9361_DDR_FDD_LVCMOS;
+ }
+ digital_interface_delays_t get_digital_interface_timing() {
+ digital_interface_delays_t delays;
+ delays.rx_clk_delay = 0;
+ delays.rx_data_delay = 0xF;
+ delays.tx_clk_delay = 0;
+ delays.tx_data_delay = 0xF;
+ return delays;
+ }
+};
+
/***********************************************************************
* Discovery
**********************************************************************/
@@ -349,8 +376,8 @@ b200_impl::b200_impl(const device_addr_t &device_addr)
// Init codec - turns on clocks
////////////////////////////////////////////////////////////////////
UHD_MSG(status) << "Initialize CODEC control..." << std::endl;
- _codec_ctrl = ad9361_ctrl::make(
- ad9361_ctrl_transport::make_software_spi(AD9361_B200, _spi_iface, AD9361_SLAVENO));
+ ad9361_params::sptr client_settings = boost::make_shared<b200_ad9361_client_t>();
+ _codec_ctrl = ad9361_ctrl::make_spi(client_settings, _spi_iface, AD9361_SLAVENO);
this->reset_codec_dcm();
////////////////////////////////////////////////////////////////////
@@ -682,7 +709,7 @@ void b200_impl::enforce_tick_rate_limits(size_t chan_count, double tick_rate, co
}
else
{
- const double max_tick_rate = ((chan_count <= 1) ? AD9361_1_CHAN_CLOCK_RATE_MAX : AD9361_2_CHAN_CLOCK_RATE_MAX);
+ const double max_tick_rate = ad9361_device_t::AD9361_MAX_CLOCK_RATE / ((chan_count <= 1) ? 1 : 2);
if (tick_rate - max_tick_rate >= 1.0)
{
throw uhd::value_error(boost::str(
diff --git a/host/lib/usrp/b200/b200_impl.hpp b/host/lib/usrp/b200/b200_impl.hpp
index 5177e295f..155ff699c 100644
--- a/host/lib/usrp/b200/b200_impl.hpp
+++ b/host/lib/usrp/b200/b200_impl.hpp
@@ -45,7 +45,7 @@
#include <uhd/transport/bounded_buffer.hpp>
#include <boost/weak_ptr.hpp>
#include "recv_packet_demuxer_3000.hpp"
-static const boost::uint8_t B200_FW_COMPAT_NUM_MAJOR = 0x05;
+static const boost::uint8_t B200_FW_COMPAT_NUM_MAJOR = 0x06;
static const boost::uint8_t B200_FW_COMPAT_NUM_MINOR = 0x00;
static const boost::uint16_t B200_FPGA_COMPAT_NUM = 0x04;
static const double B200_BUS_CLOCK_RATE = 100e6;
@@ -100,7 +100,7 @@ private:
//controllers
b200_iface::sptr _iface;
radio_ctrl_core_3000::sptr _local_ctrl;
- ad9361_ctrl::sptr _codec_ctrl;
+ uhd::usrp::ad9361_ctrl::sptr _codec_ctrl;
b200_local_spi_core::sptr _spi_iface;
boost::shared_ptr<uhd::usrp::adf4001_ctrl> _adf4001_iface;
uhd::gps_ctrl::sptr _gps;
generated by cgit v1.2.3 (git 2.39.1) at 2025-03-09 15:22:00 +0000