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-rw-r--r--host/lib/usrp/b100/b100_impl.hpp202
1 files changed, 66 insertions, 136 deletions
diff --git a/host/lib/usrp/b100/b100_impl.hpp b/host/lib/usrp/b100/b100_impl.hpp
index daec70bca..62a22674e 100644
--- a/host/lib/usrp/b100/b100_impl.hpp
+++ b/host/lib/usrp/b100/b100_impl.hpp
@@ -1,5 +1,5 @@
//
-// Copyright 2010 Ettus Research LLC
+// Copyright 2011 Ettus Research LLC
//
// This program is free software: you can redistribute it and/or modify
// it under the terms of the GNU General Public License as published by
@@ -15,74 +15,56 @@
// along with this program. If not, see <http://www.gnu.org/licenses/>.
//
-#include "b100_iface.hpp"
+#ifndef INCLUDED_B100_IMPL_HPP
+#define INCLUDED_B100_IMPL_HPP
+
+#include "fx2_ctrl.hpp"
#include "b100_ctrl.hpp"
#include "clock_ctrl.hpp"
#include "codec_ctrl.hpp"
+#include "spi_core_100.hpp"
+#include "i2c_core_100.hpp"
+#include "rx_frontend_core_200.hpp"
+#include "tx_frontend_core_200.hpp"
+#include "rx_dsp_core_200.hpp"
+#include "tx_dsp_core_200.hpp"
+#include "time64_core_200.hpp"
#include <uhd/device.hpp>
+#include <uhd/property_tree.hpp>
#include <uhd/utils/pimpl.hpp>
#include <uhd/types/dict.hpp>
#include <uhd/types/otw_type.hpp>
#include <uhd/types/clock_config.hpp>
#include <uhd/types/stream_cmd.hpp>
-#include <uhd/usrp/dboard_id.hpp>
+#include <uhd/usrp/mboard_eeprom.hpp>
#include <uhd/usrp/subdev_spec.hpp>
#include <uhd/usrp/dboard_eeprom.hpp>
#include <uhd/usrp/dboard_manager.hpp>
#include <uhd/transport/usb_zero_copy.hpp>
-#ifndef INCLUDED_B100_IMPL_HPP
-#define INCLUDED_B100_IMPL_HPP
+static const double B100_LINK_RATE_BPS = 256e6/8; //pratical link rate (< 480 Mbps)
+static const std::string B100_FW_FILE_NAME = "usrp_b100_fw.ihx";
+static const std::string B100_FPGA_FILE_NAME = "usrp_b100_fpga.bin";
+static const boost::uint16_t B100_FW_COMPAT_NUM = 0x02;
+static const boost::uint16_t B100_FPGA_COMPAT_NUM = 0x05;
+static const boost::uint32_t B100_RX_SID_BASE = 2;
+static const boost::uint32_t B100_TX_ASYNC_SID = 1;
+static const double B100_DEFAULT_TICK_RATE = 64e6;
-/*!
- * Make a b100 dboard interface.
- * \param iface the b100 interface object
- * \param clock the clock control interface
- * \param codec the codec control interface
- * \return a sptr to a new dboard interface
- */
+//! Make a b100 dboard interface
uhd::usrp::dboard_iface::sptr make_b100_dboard_iface(
- b100_iface::sptr iface,
+ wb_iface::sptr wb_iface,
+ uhd::i2c_iface::sptr i2c_iface,
+ uhd::spi_iface::sptr spi_iface,
b100_clock_ctrl::sptr clock,
b100_codec_ctrl::sptr codec
);
-/*!
- * Simple wax obj proxy class:
- * Provides a wax obj interface for a set and a get function.
- * This allows us to create nested properties structures
- * while maintaining flattened code within the implementation.
- */
-class wax_obj_proxy : public wax::obj {
-public:
- typedef boost::function<void(const wax::obj &, wax::obj &)> get_t;
- typedef boost::function<void(const wax::obj &, const wax::obj &)> set_t;
- typedef boost::shared_ptr<wax_obj_proxy> sptr;
-
- static sptr make(const get_t &get, const set_t &set){
- return sptr(new wax_obj_proxy(get, set));
- }
-
-private:
- get_t _get; set_t _set;
- wax_obj_proxy(const get_t &get, const set_t &set): _get(get), _set(set) {};
- void get(const wax::obj &key, wax::obj &val) {return _get(key, val);}
- void set(const wax::obj &key, const wax::obj &val) {return _set(key, val);}
-};
-
-/*!
- * USRP1 implementation guts:
- * The implementation details are encapsulated here.
- * Handles properties on the mboard, dboard, dsps...
- */
+//! Implementation guts
class b100_impl : public uhd::device {
public:
//structors
- b100_impl(uhd::transport::usb_zero_copy::sptr data_transport,
- uhd::transport::usb_zero_copy::sptr ctrl_transport,
- uhd::usrp::fx2_ctrl::sptr fx2_ctrl,
- double master_clock_rate);
-
+ b100_impl(const uhd::device_addr_t &);
~b100_impl(void);
//the io interface
@@ -91,114 +73,62 @@ public:
const uhd::tx_metadata_t &,
const uhd::io_type_t &,
send_mode_t, double);
-
size_t recv(const recv_buffs_type &,
size_t, uhd::rx_metadata_t &,
const uhd::io_type_t &,
recv_mode_t, double);
-
size_t get_max_send_samps_per_packet(void) const;
-
size_t get_max_recv_samps_per_packet(void) const;
-
bool recv_async_msg(uhd::async_metadata_t &, double);
private:
- //clock control
+ uhd::property_tree::sptr _tree;
+
+ //controllers
+ spi_core_100::sptr _fpga_spi_ctrl;
+ i2c_core_100::sptr _fpga_i2c_ctrl;
+ rx_frontend_core_200::sptr _rx_fe;
+ tx_frontend_core_200::sptr _tx_fe;
+ std::vector<rx_dsp_core_200::sptr> _rx_dsps;
+ tx_dsp_core_200::sptr _tx_dsp;
+ time64_core_200::sptr _time64;
b100_clock_ctrl::sptr _clock_ctrl;
-
- //interface to ioctls and file descriptor
- b100_iface::sptr _iface;
-
- //handle io stuff
- uhd::transport::zero_copy_if::sptr _data_transport;
- UHD_PIMPL_DECL(io_impl) _io_impl;
- void update_transport_channel_mapping(void);
- void io_init(void);
- void issue_stream_cmd(const uhd::stream_cmd_t &stream_cmd);
- void handle_overrun(size_t);
-
- //otw types
- uhd::otw_type_t _recv_otw_type;
- uhd::otw_type_t _send_otw_type;
-
- //configuration shadows
- uhd::clock_config_t _clock_config;
- uhd::usrp::subdev_spec_t _rx_subdev_spec, _tx_subdev_spec;
-
- //ad9862 codec control interface
b100_codec_ctrl::sptr _codec_ctrl;
+ b100_ctrl::sptr _fpga_ctrl;
+ uhd::usrp::fx2_ctrl::sptr _fx2_ctrl;
- //codec properties interfaces
- void codec_init(void);
- void rx_codec_get(const wax::obj &, wax::obj &);
- void rx_codec_set(const wax::obj &, const wax::obj &);
- void tx_codec_get(const wax::obj &, wax::obj &);
- void tx_codec_set(const wax::obj &, const wax::obj &);
- wax_obj_proxy::sptr _rx_codec_proxy, _tx_codec_proxy;
-
- //device functions and settings
- void get(const wax::obj &, wax::obj &);
- void set(const wax::obj &, const wax::obj &);
-
- //mboard functions and settings
- void mboard_init(void);
- void mboard_get(const wax::obj &, wax::obj &);
- void mboard_set(const wax::obj &, const wax::obj &);
- void update_clock_config(void);
- wax_obj_proxy::sptr _mboard_proxy;
-
- /*!
- * Make a usrp1 dboard interface.
- * \param iface the usrp1 interface object
- * \param clock the clock control interface
- * \param codec the codec control interface
- * \param dboard_slot the slot identifier
- * \param rx_dboard_id the db id for the rx board (used for evil dbsrx purposes)
- * \return a sptr to a new dboard interface
- */
- static uhd::usrp::dboard_iface::sptr make_dboard_iface(
- b100_iface::sptr iface,
- b100_clock_ctrl::sptr clock,
- b100_codec_ctrl::sptr codec,
- const uhd::usrp::dboard_id_t &rx_dboard_id
- );
+ //transports
+ uhd::transport::zero_copy_if::sptr _data_transport, _ctrl_transport;
- //xx dboard functions and settings
- void dboard_init(void);
+ //dboard stuff
uhd::usrp::dboard_manager::sptr _dboard_manager;
uhd::usrp::dboard_iface::sptr _dboard_iface;
- //rx dboard functions and settings
- uhd::usrp::dboard_eeprom_t _rx_db_eeprom;
- void rx_dboard_get(const wax::obj &, wax::obj &);
- void rx_dboard_set(const wax::obj &, const wax::obj &);
- wax_obj_proxy::sptr _rx_dboard_proxy;
-
- //tx dboard functions and settings
- uhd::usrp::dboard_eeprom_t _tx_db_eeprom, _gdb_eeprom;
- void tx_dboard_get(const wax::obj &, wax::obj &);
- void tx_dboard_set(const wax::obj &, const wax::obj &);
- wax_obj_proxy::sptr _tx_dboard_proxy;
-
- //rx ddc functions and settings
- void rx_ddc_init(void);
- void rx_ddc_get(const wax::obj &, wax::obj &);
- void rx_ddc_set(const wax::obj &, const wax::obj &);
- double _ddc_freq; size_t _ddc_decim;
- wax_obj_proxy::sptr _rx_ddc_proxy;
-
- //tx duc functions and settings
- void tx_duc_init(void);
- void tx_duc_get(const wax::obj &, wax::obj &);
- void tx_duc_set(const wax::obj &, const wax::obj &);
- double _duc_freq; size_t _duc_interp;
- wax_obj_proxy::sptr _tx_duc_proxy;
+ //handle io stuff
+ uhd::otw_type_t _rx_otw_type, _tx_otw_type;
+ UHD_PIMPL_DECL(io_impl) _io_impl;
+ void io_init(void);
- //transports
- b100_ctrl::sptr _fpga_ctrl;
- uhd::usrp::fx2_ctrl::sptr _fx2_ctrl;
+ //device properties interface
+ void get(const wax::obj &, wax::obj &val){
+ val = _tree; //entry point into property tree
+ }
+ void check_fw_compat(void);
+ void check_fpga_compat(void);
+ double update_rx_codec_gain(const double); //sets A and B at once
+ void set_mb_eeprom(const uhd::usrp::mboard_eeprom_t &);
+ void set_db_eeprom(const std::string &, const uhd::usrp::dboard_eeprom_t &);
+ void update_tick_rate(const double rate);
+ void update_rx_samp_rate(const double rate);
+ void update_tx_samp_rate(const double rate);
+ void update_rx_subdev_spec(const uhd::usrp::subdev_spec_t &);
+ void update_tx_subdev_spec(const uhd::usrp::subdev_spec_t &);
+ void update_clock_source(const std::string &);
+ void reset_gpif(const boost::uint16_t);
+ void enable_gpif(const bool);
+ void clear_fpga_fifo(void);
+ void handle_async_message(uhd::transport::managed_recv_buffer::sptr);
};
#endif /* INCLUDED_b100_IMPL_HPP */