diff options
Diffstat (limited to 'host/lib/include/uhdlib/usrp/common')
| -rw-r--r-- | host/lib/include/uhdlib/usrp/common/adf535x.hpp | 26 | 
1 files changed, 9 insertions, 17 deletions
| diff --git a/host/lib/include/uhdlib/usrp/common/adf535x.hpp b/host/lib/include/uhdlib/usrp/common/adf535x.hpp index 5ae92c3ef..3c05890f1 100644 --- a/host/lib/include/uhdlib/usrp/common/adf535x.hpp +++ b/host/lib/include/uhdlib/usrp/common/adf535x.hpp @@ -91,7 +91,7 @@ public:            _wait_time_us(0),            _ref_freq(0.0),            _pfd_freq(0.0), -          _fb_after_divider(false) +          _fb_after_divider(true)    {      _regs.vco_band_div = 3; @@ -103,14 +103,10 @@ public:      _regs.adc_conversion = adf535x_regs_t::ADC_CONVERSION_ENABLED;      _regs.adc_enable = adf535x_regs_t::ADC_ENABLE_ENABLED; -    // TODO Needs to be enabled for phase resync +    // Start with phase resync disabled and enable when reference clock is set      _regs.phase_resync = adf535x_regs_t::PHASE_RESYNC_DISABLED; -    // TODO Default should be divided, but there seems to be a bug preventing that. Needs rechecking -    _regs.feedback_select = adf535x_regs_t::FEEDBACK_SELECT_FUNDAMENTAL; - -    // TODO 0 is an invalid value for this field. Setting to 1 seemed to break phase sync, needs retesting. -    _regs.phase_resync_clk_div = 0; +    set_feedback_select(FB_SEL_DIVIDED);    }    ~adf535x_impl() override @@ -163,7 +159,7 @@ public:      }      //Reference divide-by-2 for 50% duty cycle -    // if R even, move one divide by 2 to to regs.reference_divide_by_2 +    // if R even, move one divide by 2 to regs.reference_divide_by_2      const bool div2_en = (ref_div_factor % 2 == 0);      if (div2_en) {        ref_div_factor /= 2; @@ -205,8 +201,7 @@ public:      //-----------------------------------------------------------      //Phase resync -    // TODO Renable here, in initialization, or through separate set_phase_resync(bool enable) function -    _regs.phase_resync = adf535x_regs_t::PHASE_RESYNC_DISABLED; +    _regs.phase_resync = adf535x_regs_t::PHASE_RESYNC_ENABLED;      _regs.phase_adjust = adf535x_regs_t::PHASE_ADJUST_DISABLED;      _regs.sd_load_reset = adf535x_regs_t::SD_LOAD_RESET_ON_REG0_UPDATE; @@ -427,13 +422,10 @@ inline double adf535x_impl<adf5356_regs_t>::_set_frequency(double target_freq, d    const auto MOD2 = static_cast<uint16_t>(std::min(floor(_pfd_freq / gcd), static_cast<double>(ADF535X_MAX_MOD2)));    const auto FRAC2 = static_cast<uint16_t>(std::min(round(residue * MOD2), static_cast<double>(ADF535X_MAX_FRAC2))); -  const double coerced_vco_freq = _pfd_freq * ( -    double(INT) + ( -      (double(FRAC1) + -      (double(FRAC2) / double(MOD2))) -      / double(ADF535X_MOD1) -    ) -  ); +  const double coerced_vco_freq = _pfd_freq * +    (_fb_after_divider ? rf_divider : 1) * +    (double(INT) + ((double(FRAC1) + (double(FRAC2) / double(MOD2))) +    / double(ADF535X_MOD1)));    const double coerced_out_freq = coerced_vco_freq / rf_divider; | 
