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-rw-r--r--host/docs/usrp_x3x0.dox53
1 files changed, 43 insertions, 10 deletions
diff --git a/host/docs/usrp_x3x0.dox b/host/docs/usrp_x3x0.dox
index a37cc6ff4..db19ca551 100644
--- a/host/docs/usrp_x3x0.dox
+++ b/host/docs/usrp_x3x0.dox
@@ -91,11 +91,11 @@ number, you will have to update the FPGA image before you can start using your U
with UHD (see also \ref page_images).
2. Use the `uhd_image_loader` utility to update the FPGA image. On the command line, run:
- uhd_image_loader --args="type=x300,addr=192.168.10.2,fpga=HGS"
+ uhd_image_loader --args="type=x300,addr=192.168.10.2,fpga=HG"
If you have installed the images to a non-standard location, you might need to run (change the filename according to your device):
- uhd_image_loader --args="type=x300,addr=192.168.10.2" --fpga-path="<path_to_images>/usrp_x310_fpga_HGS.bit"
+ uhd_image_loader --args="type=x300,addr=192.168.10.2" --fpga-path="<path_to_images>/usrp_x310_fpga_HG.bit"
The process of updating the FPGA image will take several minutes. Make sure the process of flashing the image does not get interrupted.
@@ -131,6 +131,23 @@ Installation instructions for this interface are available on the official Intel
The LEDs on the front panel can be useful in debugging hardware and software issues (see \ref x3x0_hw_fpanel)
+### Dual 10 Gigabit Ethernet
+
+In order to utilize the X-series USRP over dual 10 Gigabit Ethernet interfaces, ensure
+either the XG image is installed (see \ref x3x0_load_fpga_imgs_fpga_flavours).
+In addition to burning the prerequisite FPGA image, it may also be necessary
+to tune the network interface card (NIC) to eliminate drops (Ds) and reduce overflows (Os).
+This is done by increasing the number of RX descriptors (see \ref transport_udp_linux).
+
+The benchmark_rate tool can be used to test this capability.
+Run the following commands to test the X-series USRP over both 10 Gigabit
+Ethernet interfaces with the maximum rate of 200 Msps per channel:
+
+ cd <install-path>/lib/uhd/examples
+ ./benchmark_rate --args="type=x300,addr=<Primary IP>,second_addr=<secondary IP>" --channels="0,1" --rx_rate 200e6
+
+The second interface is specified by the extra argument <b>second_addr</b>.
+
\subsection x3x0_hw_pcie PCI Express (Desktop)
<b>Important Note: The USRP X-Series provides PCIe connectivity over MXI cable.
@@ -249,8 +266,12 @@ behavior of the above interfaces.
|  FPGA Image Flavor  |  SFP+ Port 0 Interface |  SFP+ Port 1 Interface |
|---------------------|------------------------|------------------------|
-|  HGS (Default)  |  1 Gigabit Ethernet |  10 Gigabit Ethernet   |
-|  XGS   |  10 Gigabit Ethernet |  10 Gigabit Ethernet   |
+|  HG (Default)   |  1 Gigabit Ethernet |  10 Gigabit Ethernet   |
+|  XG   |  10 Gigabit Ethernet |  10 Gigabit Ethernet   |
+|  HA   |  1 Gigabit Ethernet |  Aurora    |
+|  XA   |  10 Gigabit Ethernet |  Aurora    |
+
+Note: The Aurora images need to be built manually from the FPGA source code.
FPGA images are shipped in 2 formats:
@@ -259,7 +280,7 @@ FPGA images are shipped in 2 formats:
To get the latest images, simply use the uhd_images_downloader script. On Unix systems, use this command:
- sudo uhd_images_downloader
+ $ [sudo] uhd_images_downloader
On Windows, use:
@@ -313,7 +334,7 @@ images.
uhd_image_loader --args="type=x300,addr=<IP address>"
Automatic FPGA path, select image type:
- uhd_image_loader --args="type=x300,addr=<IP address>,fpga=<HGS or XGS>"
+ uhd_image_loader --args="type=x300,addr=<IP address>,fpga=<HG or XG>"
Manual FPGA path:
uhd_image_loader --args="type=x300,addr=<IP address>" --fpga-path="<path to FPGA image>"
@@ -324,7 +345,7 @@ images.
uhd_image_loader --args="type=x300,resource=<NI-RIO resource>"
Automatic FPGA path, select image type:
- uhd_image_loader --args="type=x300,resource=<NI-RIO resource>,fpga=<HGS or XGS>"
+ uhd_image_loader --args="type=x300,resource=<NI-RIO resource>,fpga=<HG or XG>"
Manual FPGA path:
uhd_image_loader --args="type=x300,resource=<NI-RIO resource>" --fpga-path="<path to FPGA image>"
@@ -354,9 +375,9 @@ device to enable communication, as shown in the following table:
 Ethernet Interface | USRP Ethernet Port |  Default USRP IP Address |  Host Static IP Address | Host Static Subnet Mask | Address EEPROM key
---------------------|-------------------------|--------------------------|-------------------------|-------------------------|-------------------
-  Gigabit  |  Port 0 (HGS Image) |  192.168.10.2 | 192.168.10.1 | 255.255.255.0 | `ip-addr0`
-  Ten Gigabit  |  Port 0 (XGS Image) |  192.168.30.2 | 192.168.30.1 | 255.255.255.0 | `ip-addr2`
-  Ten Gigabit  |  Port 1 (HGS/XGS Image) |  192.168.40.2 | 192.168.40.1 | 255.255.255.0 | `ip-addr3`
+  Gigabit  |  Port 0 (HG Image) |  192.168.10.2 | 192.168.10.1 | 255.255.255.0 | `ip-addr0`
+  Ten Gigabit  |  Port 0 (XG Image) |  192.168.30.2 | 192.168.30.1 | 255.255.255.0 | `ip-addr2`
+  Ten Gigabit  |  Port 1 (HG/XG Image) |  192.168.40.2 | 192.168.40.1 | 255.255.255.0 | `ip-addr3`
As you can see, the X300/X310 actually stores different IP addresses, which all address the device differently: Each combination of Ethernet port and interface type (i.e., Gigabit or Ten Gigabit) has its own IP address. As an example, when addressing the device through 1 Gigabit Ethernet on its first port (Port 0), the relevant IP address is the one stored in the EEPROM with key `ip-addr0`, or 192.168.10.2 by default.
@@ -530,6 +551,18 @@ When there is network traffic arriving at the Ethernet port, LEDs will light up.
You can use this to make sure the network connection is correctly set up, e.g.
by pinging the USRP and making sure the LEDs start to blink.
+\section x3x0_usage_problems Usage Problems
+
+\subsection x3x0_corrupt_eeprom Corrupt EEPROM
+
+This is a rare bug in which the X-Series device's on-board EEPROM becomes corrupt and reports an incorrect
+firmware and FPGA version. In this situation, UHD cannot properly use the device. To fix this bug, use
+the **usrp_burn_mb_eeprom** utility as follows:
+
+ usrp_burn_mb_eeprom --args="type=x300,recover_mb_eeprom,disable_adc_self_test" --values="revision=(NUM HERE)"
+
+Afterward, power-cycle your X-Series device for the changes to take effect.
+
\section x3x0_hw_notes Hardware Notes
\subsection x3x0_hw_fpanel Front Panel