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-rw-r--r--host/docs/usrp1.rst27
1 files changed, 19 insertions, 8 deletions
diff --git a/host/docs/usrp1.rst b/host/docs/usrp1.rst
index 597b5b17f..c1fdec146 100644
--- a/host/docs/usrp1.rst
+++ b/host/docs/usrp1.rst
@@ -5,7 +5,18 @@ UHD - USRP1 Application Notes
.. contents:: Table of Contents
------------------------------------------------------------------------
-Specify a non-standard image
+Comparative features list
+------------------------------------------------------------------------
+
+* 2 transceiver card slots
+* 2 RX DDC chains in FPGA
+* 2 TX DUC chains in FPGA (no TX CORDIC -> uses DAC)
+* 64 MHz fixed clock rate
+* sc16 sample modes
+* sc8 sample mode - RX only
+
+------------------------------------------------------------------------
+Specify a Non-standard Image
------------------------------------------------------------------------
The standard USRP1 images installer comes with two FPGA images:
* **usrp1_fpga.rbf:** 2 DDCs + 2 DUCs
@@ -31,7 +42,7 @@ Example device address string representations to specify non-standard firmware a
fpga=usrp1_fpga_4rx.rbf, fw=usrp1_fw_custom.ihx
------------------------------------------------------------------------
-Missing and emulated features
+Missing and Emulated Features
------------------------------------------------------------------------
The USRP1 FPGA does not have the necessary space to support the advanced
streaming capabilities that are possible with the newer USRP devices.
@@ -53,7 +64,7 @@ List of emulated features
* Notification on broken chain error
**Note:**
-These emulated features rely on the host system's clock for timed operations,
+These emulated features rely on the host system's clock for timed operations
and therefore may not have sufficient precision for the application.
^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^
@@ -62,17 +73,17 @@ List of missing features
* Start of burst flags for transmit/receive
------------------------------------------------------------------------
-Hardware setup notes
+Hardware Setup Notes
------------------------------------------------------------------------
^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^
External clock modification
^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^
The USRP can be modified to accept an external clock reference instead of the 64MHz onboard reference.
- * Solder SMA (LTI-SASF54GT) connector to J2001
- * Move 0 ohm 0603 resistor R2029 to R2030
- * Move 0.01uF 0603 capacitor C925 to C926
- * Remove 0.01uF 0603 capacitor C924
+ * Solder SMA (**LTI-SASF54GT**) connector to **J2001**.
+ * Move 0 ohm 0603 resistor **R2029** to **R2030**.
+ * Move 0.01uF 0603 capacitor **C925** to **C926**.
+ * Remove 0.01uF 0603 capacitor **C924**.
The new external clock needs to be a square wave between +7dBm and +15dBm