diff options
Diffstat (limited to 'host/cmake/debian')
-rw-r--r-- | host/cmake/debian/changelog | 734 | ||||
-rw-r--r-- | host/cmake/debian/control | 34 | ||||
-rw-r--r-- | host/cmake/debian/copyright | 1465 |
3 files changed, 1464 insertions, 769 deletions
diff --git a/host/cmake/debian/changelog b/host/cmake/debian/changelog index 5dea31b00..af91fe4d1 100644 --- a/host/cmake/debian/changelog +++ b/host/cmake/debian/changelog @@ -1,3 +1,71 @@ +uhd (3.10.3.0-0ubuntu1) trusty; urgency=low + + * X300 + ** Fix max rate calculation for 1 GbE + ** Fix for DAC synchronization errors (unexpected FIFO depth) + ** Reduced CPU usage during TX + * N230 + ** Properly initialize request structure before discovery + * B200 + ** FX3 firmware performance opitimizations + ** Fixed sequence error on second TX burst + * TwinRX + ** Added ADF5356 synth and Rev C support + * UBX + ** Add implementation of TDD xcvr_mode and for TX PA on in TDD mode (to reduce transient on older revs) + ** Add support for UBX-TDD + * C API + ** Fixed dboard EEPROM revision error handling + ** Make uhd_rx_streamer_last_error use SAFE_C + ** Better error handling in uhd_usrp_get_[t/r]x_stream + * RFNoC + ** Fix ctrl_iface to pop sequence numbers only after success + ** Fix sequence number error message in ctrl_iface + ** FPGA fix for sr_read() failure to ack errors + ** FPGA fix for repeated sequence number for RX packets with 1 sample + ** FPGA fix for axi_serializer edge case + * Docs + ** Fixed B200 power LED description + ** Update README application links + * UHD + ** Utilize poll() instead of select() for UDP transports where possible to avoid descirptor limits + ** Fix build with Boost 1.66 + ** Add EEPROM info to dboard_base class so daughterboard code can access all EEPROM info + + -- Ettus Research <packages@ettus.com> Tue, 30 Jan 2018 11:40:09 -0800 + +uhd (3.10.2.0-0ubuntu1) trusty; urgency=low + + * multi_usrp: Fixed get_normalized_tx_gain. + * E300: Fix for streamer recreation issue. Reduced minimum timeout, fixed + potential race condition. + * X300: Fix for network discovery, will now return early when correct serial is + found. Fixed issue with DAC sync. All async messages now go through + single DMA channel on PCIe. Improved TX performance. Fixed page size + acquisition for PCIe. Fixed some FW communication errors. Improved flow + control. Removed MTU throttling. Legacy compat falls back to min spp + for mixed transport types. + * CBX: Fixed LO LPF behaviour in 1.5-2 GHz range. + * UBX: Fixed dtor SIGABRT issue. Better error handling for various dboard clock + rates. + * TwinRX: Added LO reimport feature. + * GPSDO: Improved detection. Improved query_gpsdo sensor. + * RFNoC: Fixed issue with DDC and DUC command tick rate. + * UHD: Fixed potential memory leak in tasks. Fixed get_normalized_tx_gain(). + Fixed default socket buffer size to honor MTU. + * Examples: Added channel param to samps to/from file. sync_to_gps exits + instead of uncaught throw. latency_test improved output. Use + next_pps in test_clock_synch. Added TwinRX FHSS example. + * Utils: Modified behaviour of uhd_images_downloader so it won't delete dirs + when using -i + * Tools: Updates to CHDR dissector. Added set_time_source_out(). Fixed LO API. + * C API: Fixed some missing fields in USRP info. + * Docs: Many minor fixes. Fixed Doxygen warnings related to /* in files. + * CMake: Fixed GCC 4.4 compilation issue. Added ability to specify package + names. + + -- Ettus Research <packages@ettus.com> Tue, 30 Jan 2018 11:40:09 -0800 + uhd (3.10.1.1-0ubuntu1) trusty; urgency=low - Docs: The protocol for Gen-3 devices is now consistently referred to as CHDR. @@ -11,15 +79,15 @@ uhd (3.10.1.1-0ubuntu1) trusty; urgency=low - C API: Added UHD_VERSION macro. Fixed online rate change. - Utils: Minor fixes to uhd_images_downloader. - Build/CMake: Fixed some Py3k build issues. Fixed many compiler warnings. Allow - to specify package names. + to specify package names. - RFNoC: Fixed sampling rate mismatch error. Noc-Shell uses a non-cascaded 2-clk FIFO. Increase default FIFO sizes on DUC and DDC blocks. - - UBX: Force on RX driver to eliminate transient. + - UBX: Force on RX driver to eliminate transient. - Transport code: Fixed memory leak. - FPGA repository: Merged usrp3_rfnoc and usrp3 directories again. Cleaned up superfluous files. Clean separation between Gen-3 and other devices in usrp3. - -- Ettus Research <packages@ettus.com> Thu, 26 Jan 2017 04:15:56 -0800 + -- Ettus Research <packages@ettus.com> Tue, 30 Jan 2018 11:40:09 -0800 uhd (3.10.1.0-0ubuntu1) trusty; urgency=low @@ -47,7 +115,7 @@ uhd (3.10.1.0-0ubuntu1) trusty; urgency=low - Tools: Merged dissectors into common directory. - CMake: -Og is the default now for gcc-based Debug builds. - -- Ettus Research <packages@ettus.com> Wed, 02 Nov 2016 01:20:07 -0800 + -- Ettus Research <packages@ettus.com> Tue, 30 Jan 2018 11:40:09 -0800 uhd (3.10.0.0-0ubuntu1) trusty; urgency=low @@ -71,7 +139,7 @@ uhd (3.10.0.0-0ubuntu1) trusty; urgency=low - Added more aggressive optimization strategies for FPGA builds - Xilinx IP tool upgrade scripts cleaned up - -- Ettus Research <packages@ettus.com> Thu, 11 Aug 2016 04:48:49 -0800 + -- Ettus Research <packages@ettus.com> Tue, 30 Jan 2018 11:40:09 -0800 uhd (3.9.5-0ubuntu1) trusty; urgency=low @@ -89,7 +157,7 @@ uhd (3.9.5-0ubuntu1) trusty; urgency=low fixes (off-by-one errors). uhd_usrp_probe will pick up an OC now, added Wireshark dissector for OC packets - -- Ettus Research <packages@ettus.com> Mon, 22 Aug 2016 02:36:40 -0800 + -- Ettus Research <packages@ettus.com> Tue, 30 Jan 2018 11:40:09 -0800 uhd (3.9.4-0ubuntu1) trusty; urgency=low @@ -104,7 +172,7 @@ uhd (3.9.4-0ubuntu1) trusty; urgency=low - Windows: Include registry file in installation - Converters: Improve NEON converters - -- Ettus Research <packages@ettus.com> Thu, 05 May 2016 12:56:28 -0800 + -- Ettus Research <packages@ettus.com> Tue, 30 Jan 2018 11:40:09 -0800 uhd (3.9.3-0ubuntu1) trusty; urgency=low @@ -120,7 +188,7 @@ uhd (3.9.3-0ubuntu1) trusty; urgency=low * Fixed several compiler warnings and minor bugs * Examples: Updated benchmark_rate for improved thread safety - -- Ettus Research <packages@ettus.com> Mon, 21 Mar 2016 11:40:26 -0800 + -- Ettus Research <packages@ettus.com> Tue, 30 Jan 2018 11:40:09 -0800 uhd (3.9.2-0ubuntu1) trusty; urgency=low @@ -136,7 +204,7 @@ uhd (3.9.2-0ubuntu1) trusty; urgency=low * E310: DRAM testbenching * Docs/Manual: Many updates and fixes - -- Martin Braun <martin.braun@ettus.com> Wed, 30 Dec 2015 11:48:37 -0800 + -- Ettus Research <packages@ettus.com> Tue, 30 Jan 2018 11:40:09 -0800 uhd (3.9.1-0ubuntu1) trusty; urgency=low @@ -148,5 +216,651 @@ uhd (3.9.1-0ubuntu1) trusty; urgency=low * Examples: Added PPS source option * Docs: Multiple manual updates - -- Nicholas Corgan <nick.corgan@ettus.com> Tue, 29 Dec 2015 03:06:31 -0800 + -- Ettus Research <packages@ettus.com> Tue, 30 Jan 2018 11:40:09 -0800 + +uhd (3.9.0-0ubuntu1) trusty; urgency=low + + * X300: Updated DAC ctrl, FPGA toolchain is now entirely Vivado, + improved master clock controls, added ADC self-cal capability, + prepared for revisions 7 and 8, fixed flow control issue which + could cause device to hang when receiving too many overruns + * B2XX: Auto clock rate setting, added PID/VID pairs to support + all B2XX- and derivatives, added temperature sensor, improved + DC offset and IQ imbalance correction, added AGC support, + support for FPGPIO connector on Rev6+ boards, full clock range support, + updated FX3 firmware (side-channel logging capabilities, updated + tx voltage swing, better configurability), default tick rate now + 16 MHz, added B200mini support + * E3XX: Added temperature sensor, FPGA toolchain is now entirely Vivado, + improved DC offset and IQ imbalance correction, added AGC support, + improved FPGA capture interface robustness for RFIC, make frame + sizes configurable, replaced GPS control code with gpsd interfacing + capabilities + * Octoclock: Fixed bootloader + ethernet capabilities + * Compilers: Supported MSVC versions are now 2012, 2013, 2015 + (dropped 2010 support), added MinGW capabilities + * Documentation: Many minor fixes and updates, merged all the + info from code.ettus.com + * UHD: Added sid_t, CHDR-specific transports now get their own + (un)packer codes, fixed a lot of compiler warnings, added + filter API (currently available for AD9361 frontend), added + soft-register API, replaced Cheetah with Mako, full Py3k + compliance, updated images downloader tool (now is one tool + for all devices), CMake minimum version is now 2.8, refactored + general AD9361 peripheral management, refactored most core + control management, added usb_error type (used by B2xx devices), + better exception handling at runtime, added C wrapper API, + new dependency: python-requests + * C API: Added to UHD (wraps C++ calls in C) + * multi_usrp: Added normalized gain setters/getters, IQ imbalance + + DC offset correction API, filter API + * Converters: Converter symbols now exported, better logging, + removed ORC dependency, added u8 converters + * Examples: Whitespace- and other cleanup, multi-channel fixes for + some examples + * Utils: Read more property tree types from the command line + * Tools: kitchen sink updated, added mega_fft + + -- Ettus Research <packages@ettus.com> Tue, 30 Jan 2018 11:40:09 -0800 + +uhd (3.8.5-0ubuntu1) trusty; urgency=low + + * E3xx: Added support for battery-based E3xx device (E312), + get_freq() for network mode, fixed GPS time initialization bug + * AD9361-based devices: Fixed frequency readback bug + * B200: Fixed DCM issues, better loopback failure handling, + fix erroneous warning for custom clock rates + * X3x0: Better warnings for clock reate / ref freq + * multi_usrp: Added define for GPIO capabilities (enables + exposure in GNU Radio) + * UHD: sc16->sc16 SSE converter + * Manual: Multiple minor updates, FPGA manual improvements, + * Build System: Fixed builds on some Windows platforms, removed + stray prints + + -- Ettus Research <packages@ettus.com> Tue, 30 Jan 2018 11:40:09 -0800 + +uhd (3.8.4-0ubuntu1) trusty; urgency=low + + * B200: Fixed EEPROM writing bug, updated images for B200 Rev5/6 + * E300: GPS antenna power defaults to staying on, GPS time used as + default if available + * UBX: PDF frequency fix on X300 + * USRP2: Bugfix that allows latest UHD to work with USRP2 + * Documentation: Many fixes for E300 section, added FPGA manual + + -- Ettus Research <packages@ettus.com> Tue, 30 Jan 2018 11:40:09 -0800 + +uhd (3.8.3-0ubuntu1) trusty; urgency=low + + * UBX: Fixed phase synchronization issues + (Related changes: Change X300 daughterboard frequency, increase + N210 FIFO depth) + * Fixed many compiler warnings + * B200: Fixed timing issues, fixed tick rate issue, stabilized + operations at high clock rates + * X300: Improved phase alignment across devices + * CMake: Build fixes + * E300: Flow control fix + + -- Ettus Research <packages@ettus.com> Tue, 30 Jan 2018 11:40:09 -0800 + +uhd (3.8.2-0ubuntu1) trusty; urgency=low + + * CMake: Introducing named versions for dev branches, enable static libs, + * E300: Docs updates, compat number bump, VCTCXO updates, + more status bits for ref locking, fixed serial number length fix, + RSSI Sensor + * B200: RSSI sensor + * AD9361: Better handling of different interpolation rates in FIR, + fix for gain value truncation, removed gain value offset + * UBX: Added drivers + * Manual/Docs: Numerous updates, minimum compiler versions now specified, + * Converters: Multiple fixes for sc12 + * Examples: Fixes to txrx_loopback_to_file + * Path handling vastly improved, made more consistent + * Minor UHD fixes + + -- Ettus Research <packages@ettus.com> Tue, 30 Jan 2018 11:40:09 -0800 + +uhd (3.8.1-0ubuntu1) trusty; urgency=low + + * B2x0: Fixed PLL settings, Fixed external ref selection, serialized + streamer setup (thread-safety) + * X3x0: Fixed flow control issue, improved DAC ctrl + init logic, + Fixed I/Q alignment issue + * Generation-3 devices: Fixed LED registers + * UHD: Improved tuning logic for manual tunes + * Tools: Multiple kitchen sink fixes, coloured output + * Examples: Multiple bugfixes (multi-channel ops) + * Docs/Manual: Multiple fixes, E310 panel images + + -- Ettus Research <packages@ettus.com> Tue, 30 Jan 2018 11:40:09 -0800 + +uhd (3.8.0-0ubuntu1) trusty; urgency=low + + * Added E310 support + * B200/B210: Moved AD9361 controls from firmware to host + * Added several tools: ZPU dissector, improved CHDR dissector, + kitchen sink, B200/B210 USB debugging utility, latency + measurement tool. + * Reorganized firmware/ directory structure. Refactored some + firmware. + * Removed FPGA sources, is now in own repository (submoduled). + * Cleaned up command line arguments for some tools + * Added math namespace, plus a unified float comparison infrastructure + * Fixed tuning-related bugs + * Moved manual over to Doxygen, also several manual bug fixes and + amendments + * Added many missing virtual destructors (less build warnings) + * Added support for NI-RIO 14.0 + * X300 fixes: Not found over PCIe with no eth interfaces + * CMake improvements: Now comes with own UHDConfig.cmake and example + to build standalone UHD apps, build fixes on Apple, interoperability + with GNU Radio + * OctoClock fixes and improvements: Ethernet initialization, external + ref detection, stability fixes, host driver (UHD can now talk to + OctoClock) + * Examples: Improved GPIO example, rx_samples_to_file + * Bumped minimum Boost version to 1.46 + + -- Ettus Research <packages@ettus.com> Tue, 30 Jan 2018 11:40:09 -0800 + +uhd (3.7.3-0ubuntu1) trusty; urgency=low + + * Fixed examples + * Removed compiler warnings + * Fixed CBX LO settings (FRAC truncation) + * Fixed build issues for out-of-tree tools for some distros + * Fixed some logging strings (SBX, GPSDO) + * Improved logging (speedups, removed unnecessary cycles) + * Added output sync for DAC reference clocks on X300 + * Multiple FPGA improvements, as well as upgrade of build env + * Added support for B200 vs B210 discovery + + -- Ettus Research <packages@ettus.com> Tue, 30 Jan 2018 11:40:09 -0800 + +uhd (3.7.2-0ubuntu1) trusty; urgency=low + + * Fixed X300 phase alignment issues + * Fixed CMake 2.6 incompatibility issues + * EEPROM burner improvements + * Properly flushing PCIe chain on device to prevent stale data. + * Adjusted bus clock rate in FPGA to improve timing. + * Fixed issue where FPGA would fail to load FPGA image over PCIe. + * Fixed incompatibility issue with USRP2 FPGA burner utility. + * Fixed issue where ZPU would report empty NMEA strings from GPSDO. + * Updated some functions to no longer use deprecated Boost calls. + * Fixed issue where libusb would declare 'connection refused'. + * Fixed Windows library package naming. + * Updated documentation. + * Fixed reversed TX / RX colors in X300 LED indicators. + * DBSRX2 now works properly with X300 / X310. + * Updated include files to build on older distros of Linux. + * Fixed issue with 'item32' type converter from GNU Radio. + * Fixed issue where channels on B210 would occasionally not be phase-aligned. + * Fixed problem causing channels on B210 to swap between runs. + * Fixed issue in N-Series devices causing scaling error @ 50 MSps. + * The B200 / B210 now generates an internal PPS if none is provided. + * Improved performance on PCIe for X300. + * B200 / B210 properly reports clock rate (issue with float comparison). + * Fixed issue with filter selection in B200 that caused loss of RX power. + * Removed ref lock check from X300 where it wasn't necessary. + + -- Ettus Research <packages@ettus.com> Tue, 30 Jan 2018 11:40:09 -0800 + +uhd (3.7.1-0ubuntu1) trusty; urgency=low + + * Fixed issue with TVRX2 divider calculation. + * Fixed issue using calibration utilities on B-Side daughterboard in an X3xx. + * Replaced unsafe `sscanf` call in utilities. + * Properly initializing N-Series clock, fixing short transient on device boot-up. + * Improved `--help` output for a number of utilities & examples. + * Improved READMEs for directories. + * Fixed X3xx documentation with some clarifications. + * UHD will now tell you if you have requested a sample rate higher than the transport can deliver. + * Removed work-around necessary in RIO kernel module for zero-copy in PCIe for X3xx devices. + * Fixed issue where X3xx devices would lock-up when on networks with lots of traffic. + * The B2xx FX3 and AD9361 source code is now in UHD. + * Numerous B2xx stability improvements. + * Fixed includes for older OSes (e.g., Fedora 14). + * Fixed includes for older versions of Boost. + * Fixed PPS detection in X3xx with multiple time sources. + * Fixed overflow reporting for X3xx utilities. + * Fixed MTU / frame size detection for X3xx devices. + * Fixed B2xx filter chain causing wrong sample rate in some circumstances. + + -- Ettus Research <packages@ettus.com> Tue, 30 Jan 2018 11:40:09 -0800 + +uhd (3.7.0-0ubuntu1) trusty; urgency=low + + * Introduced USRP X300 and X310 support! + * Releasing a CHDR Dissector for Wireshark analysis + * Improved USRP B200 and B210 stability + * Introducing Integer-N tuning for WBX, SBX, CBX daughterboards + * Introducing support for 120 MHz versions of WBX, SBX, CBX + * Lots of new documentation + * New GPIO example for USRP X300 + * Fixed threading bug in USRP B2xx code causing GQRX issue + * General UHD bug fixes & improvements + + -- Ettus Research <packages@ettus.com> Tue, 30 Jan 2018 11:40:09 -0800 + +uhd (3.6.2-0ubuntu1) trusty; urgency=low + + * Fixed bug in timed commands example. + * Improved compatibility for older versions of Boost. + * Fixed segmentation fault issue in converter code. + * Fixed binary-stripping for ARM builds. + * B2xx: Further improvements to code and images. + * Documentation links now installed to Start Menu in Windows. + * B2xx: More robust error checking in host code. + * B2xx: Improved error reporting. + * B2xx: Increase FPGA loading speed on USB 3 + * B2xx: Re-programming FPGA without cycle now supported. + * B2xx: Larger RX SPP ceiling to support 16K transfers with larger RX FIFO in new FPGA image + * Updated internal READMEs and documentation. + * N-Series: netburner now accepts relative paths with '~' + * Completely re-written UHD Images Downloader, with numerous bug fixes and new features. + + -- Ettus Research <packages@ettus.com> Tue, 30 Jan 2018 11:40:09 -0800 + +uhd (3.6.1-0ubuntu1) trusty; urgency=low + + * B2xx: Fixed critical bug in 003.006.000 regarding USRP B2xx operation + + -- Ettus Research <packages@ettus.com> Tue, 30 Jan 2018 11:40:09 -0800 + +uhd (3.6.0-0ubuntu1) trusty; urgency=low + + * Many small fixes for bugs revealed by static analysis. + * Introduced support for the USRP B200 / B210 + + -- Ettus Research <packages@ettus.com> Tue, 30 Jan 2018 11:40:09 -0800 + +uhd (3.5.3-0ubuntu1) trusty; urgency=low + + * E110: + ** Fix FPGA Makefile build typo + * UHD: + ** Fixed timespec irrational rate rounding + ** Multichan streamer CPU utilization + + -- Ettus Research <packages@ettus.com> Tue, 30 Jan 2018 11:40:09 -0800 + +uhd (3.5.2-0ubuntu1) trusty; urgency=low + + * B100: + ** Fix get send buffer timeout + * E1x0: + ** Changes to bus timings for S issue + * USRP1: + ** Restore broken EEPROM writing + + -- Ettus Research <packages@ettus.com> Tue, 30 Jan 2018 11:40:09 -0800 + +uhd (3.5.1-0ubuntu1) trusty; urgency=low + + * Misc: + ** Fixes to images downloader + ** Fixes to C++ net burner + ** Added sleep(1) to query_gpsdo_sensors + * OSX: + ** Fix for socket send code newer OS versions + * Changes from 3.4.5 + + -- Ettus Research <packages@ettus.com> Tue, 30 Jan 2018 11:40:09 -0800 + +uhd (3.5.0-0ubuntu1) trusty; urgency=low + + * B100: + ** Added timed commands feature + ** Incremented FPGA compat number to 11.1 + ** Incremented firmware compat number to 3 + * E1x0: + ** Added timed commands feature + ** Incremented FPGA compat number to 11.1 + * USRP2/N2x0: + ** Alternative stream destination on TX + ** Incremented FPGA compat number to 10 + * N2x0: + ** Implemented timed-commands feature + ** Implemented fast-commands feature + * SBX/WBX + ** Tune with phase sync using timed-commands + * RFX series + ** Added calibration utilities support + * General: + ** SSE2 conversions for sc8 RX samples + ** Added multi-threading to packet converters + ** Added automatic images fetcher application + + -- Ettus Research <packages@ettus.com> Tue, 30 Jan 2018 11:40:09 -0800 + +uhd (3.4.5-0ubuntu1) trusty; urgency=low + + * XCVR2450: + ** Added XCVR2450 rev2 support + * WBX: + ** Added WBX rev4 support + * Misc: + ** Fix to rx_samples_to_udp byte count + ** stream command enums easy on SWIG + + -- Ettus Research <packages@ettus.com> Tue, 30 Jan 2018 11:40:09 -0800 + +uhd (3.4.4-0ubuntu1) trusty; urgency=low + + * Gen2 + ** Fix RX and TX DSP scalar adjustments + * B100/E1x0 + ** Fixed RX ADC IQ inversion swap + ** Incremented FPGA compat number to 9.4 + + -- Ettus Research <packages@ettus.com> Tue, 30 Jan 2018 11:40:09 -0800 + +uhd (3.4.3-0ubuntu1) trusty; urgency=low + + * USRP2/N2x0: + ** Net burner parser fix (windows) + * XCVR2450: + ** Fix to disable automatic LO offset on TX + * N2x0: + ** Deal with misc exceptions in net burner + * E1x0: + ** Changes to add reliability to bus state machine + * USRP1: + ** Shutoff the DAC on transmit EOB flags + ** Revert 1st nyquist zone DAC calculation + + -- Ettus Research <packages@ettus.com> Tue, 30 Jan 2018 11:40:09 -0800 + +uhd (3.4.2-0ubuntu1) trusty; urgency=low + + * USRP2/N2x0: + ** Card and net burner language fixes + ** Net burner python v3 code fix + ** Net burner IPv6 interface fix + * E1x0: + ** Fix for FPGA timing issue with GPMC input + ** Incremented FPGA compat number to 9.2 + * B100: + ** Fix USB wrapper/buffer release race condition + * USRP1: + ** Fix DAC calculation for tune out of 1st nyquist zone + * General: + ** Fix for recv packet handler time error check + ** SIMD conversion routines priority over table look-up + ** Fix undefined GCC float conversion behaviour for sc8 + + -- Ettus Research <packages@ettus.com> Tue, 30 Jan 2018 11:40:09 -0800 + +uhd (3.4.1-0ubuntu1) trusty; urgency=low + + * USRP2/N2x0: + ** Filter out invalid broadcast replies + ** Incremented FPGA compat number to 9.1 + * E1x0: + ** Incremented FPGA compat number to 9.1 + * B100: + ** FPGA fixes for USB slave FIFO interface + ** Incremented FPGA compat number to 9.3 + * USRP1: + ** Stop thread in deconstructor for race condition + ** Fixed DBSRX + USRP1 i2c lockup condition + * Gen2: + ** Fix for unintentional clear in deprecated recv() call + ** Fix RX DC offset call to handle negative values + * FreeBSD: + ** Fixed network relay example compilation + + -- Ettus Research <packages@ettus.com> Tue, 30 Jan 2018 11:40:09 -0800 + +uhd (3.4.0-0ubuntu1) trusty; urgency=low + + * USRP2/N2x0: + ** 50 Msps RX/TX with sc8 mode over the wire + * B100: + ** 16 Msps RX/TX with sc8 mode over the wire + * SBX/WBX: + ** Added self-calibration utilities + * Gen2: + ** Control RX/TX DC offset correction via API + ** Control RX/TX IQ balance correction via API + ** Incremented FPGA compat number to 9 + * USRP1: + ** Support 16Msps RX with sc8 mode over the wire + ** Control RX DC offset correction via API + * Misc: + ** Multiple streamers/heterogeneous rates + ** Alternative host and wire data types + ** Added API calls for DC offset correction + ** Added API calls for IQ balance correction + + -- Ettus Research <packages@ettus.com> Tue, 30 Jan 2018 11:40:09 -0800 + +uhd (3.3.2-0ubuntu1) trusty; urgency=low + + * N2x0: + ** Fixed TX daughterboard clocking mode + * B100: + ** Tweaks for ordering of FPGA resets + * Misc: + ** Device adder can parse empty values + ** Updated syntax in udev rules file + ** Corrections to images documentation + ** Performance tweak for tx_waveforms example + ** Handle EINTR on select() w/ udp transport + ** Minor fixes for compiling on FreeBSD + + -- Ettus Research <packages@ettus.com> Tue, 30 Jan 2018 11:40:09 -0800 + +uhd (3.3.1-0ubuntu1) trusty; urgency=low + + * B100/E1x0: + ** Fixed VCO bounds checking on flexible clocking + * B100: + ** Fixed discovery throwing when device claimed + + -- Ettus Research <packages@ettus.com> Tue, 30 Jan 2018 11:40:09 -0800 + +uhd (3.3.0-0ubuntu1) trusty; urgency=low + + * USRP2/N2x0: + ** Incremented firmware image compat number to 11.0 + ** Re-implement internal GPSDO UART control + * E1x0: + ** New GPMC/FPGA bus implementation + ** Incremented FPGA compat number to 6 + ** Incremented module compat number to 3 + ** Added support for E110 + ** Added support for E100r4 + * B100: + ** Added support for B100 + * USRP1: + ** Re-implement LibUSB data transport + * Misc: + ** Normalise time_spec for negative fractional seconds + * Gen2: + ** Fix DSP rate selection clipping for very low rates + + -- Ettus Research <packages@ettus.com> Tue, 30 Jan 2018 11:40:09 -0800 + +uhd (3.2.4-0ubuntu1) trusty; urgency=low + + * USRP2/N2x0: + ** Resize all socket buffers (multi-channel) + * N2x0: + ** Gracefully handle missing GPSDO + * USRP1: + ** Fix bug with order of deconstructors + ** Fix zero length send padding on commit + * XCVR2450: + ** Fix LO locking at marginal frequencies + * WBX: + ** Fix TX gain readback value on v3 board + * Gen2: + ** Fix bounds checking on stream num samps + ** Fix error using PPS_NEG in clock config + + -- Ettus Research <packages@ettus.com> Tue, 30 Jan 2018 11:40:09 -0800 + +uhd (3.2.3-0ubuntu1) trusty; urgency=low + + * USRP2/N2x0: + ** Fix uninitialized variable for multi-board case + ** Fix deconstructor throwing on device disconnect + ** Incremented FPGA image compat number to 7.3 + * TVRX: + ** Populated sensors property (fixed error in init) + * FPGA (gen2): + ** Adjust RX DC offset correction time constant + ** Restore calibration path in RX/TX frontend + * Misc: + ** MB EEPROM burner workaround for compiler bugs + ** Clip the reported tune range to the dboard bandwidth + ** Preserve bands when calculating overall tune range + + -- Ettus Research <packages@ettus.com> Tue, 30 Jan 2018 11:40:09 -0800 + +uhd (3.2.2-0ubuntu1) trusty; urgency=low + + * USRP2/N2x0: + ** Always resize socket send buffer to SRAM size + ** Incremented FPGA image compat number to 7.2 + ** Incremented firmware image compat number to 10.4 + * N2x0: + ** GPSDO control tweak for some devices + ** Fix for erasure logic in rare bricking cases + * E100: + ** Fix RX run state for GPIOs controlled by ATR + * USRP1: + ** Fix for multi-channel streaming + ** Fix to support 0 RX or 0 TX DSPs + * SBX: + ** Corrected lower limit on frequency range + * FPGA (gen2): + ** Reset CIC decimator on start of burst + * Misc: + ** Fix send to return zero on empty packets + ** Perform version check on liborc + + -- Ettus Research <packages@ettus.com> Tue, 30 Jan 2018 11:40:09 -0800 + +uhd (3.2.1-0ubuntu1) trusty; urgency=low + + * USRP2/N-Series: + ** Firmware fix to shutoff streaming when socket unreachable + ** Incremented firmware image compat number to 10.3 + + -- Ettus Research <packages@ettus.com> Tue, 30 Jan 2018 11:40:09 -0800 + +uhd (3.2.0-0ubuntu1) trusty; urgency=low + + * USRP2/N-Series: + ** Incremented FPGA image compat number to 7.1 + ** Incremented firmware image compat number to 10.2 + ** Removed mimo_mode device addr argument + ** Support for rev4 N2XX motherboards + * USRP-E100: + ** Removed the need for clock recovery + ** Incremented FPGA image compat number to 5 + ** Incremented kernel module compat number to 2 + ** Added support for dual receive DSPs + ** Async messages independent from RX path + * WBX: + ** Support for rev3 daughterboards + * DBSRX2: + ** Rounding fix for LO tuning error + * Packet handler: + ** Overall performance improvements + ** Timestamps for packet fragments + ** Overflow message on dropped packets + * Conversion: + ** Optional liborc conversion support + ** SSE2 conversion alignment performance + ** SSE2 conversion for complex doubles + * Windows: + ** Performance improvements for UDP send + * Misc: + ** Code reorganization with property tree + ** Calibration support in gen2 FPGAs + + -- Ettus Research <packages@ettus.com> Tue, 30 Jan 2018 11:40:09 -0800 + +uhd (3.1.2-0ubuntu1) trusty; urgency=low + + * N-Series: + ** Fix UART communication for GPSDO + * XCVR2450: + ** Fix for descontructor throwing on hardware disconnect + + -- Ettus Research <packages@ettus.com> Tue, 30 Jan 2018 11:40:09 -0800 + +uhd (3.1.1-0ubuntu1) trusty; urgency=low + + * USRP1: + ** Fixed lock up in logging facility under MSVC + * USRP2/N-Series: + ** Handle exceptions thrown in device locker loop + ** Connected internal GPSDO PPS signal in FPGA + * WBX + ** Keep mixers on between bursts to maintain phase offsets + + -- Ettus Research <packages@ettus.com> Tue, 30 Jan 2018 11:40:09 -0800 + +uhd (3.1.0-0ubuntu1) trusty; urgency=low + + * USRP2/N-Series: + ** Incremented FPGA compat number to 6 + ** Incremented firmware compat number to 10 + ** Created all-in-one bootloader for N-series + ** Lock open devices per process + ** USRP N-Series internal GPSDO Support + ** Discovery works with out-of-date images + ** Net and card burner: python 3.0 support + ** Net burner: tkinter + windows thread fix + ** Card burner: device selection validation + * USRP-E100: + ** Incremented FPGA compat number to 4 + ** FPGA VRT packet framer correct length + ** Fix auxiliary ADC read back for AD9862 + ** Sync TX and RX daughterbord clocks + ** Fix daughterboard clock rates after re-clock event + * USRP1: + ** Fix TX under remainder conditions + ** Fixed RX multi-channel mapping + * Daughterboards: + ** Added support for TVRX2 daughterboard + ** Added support for SBX daughterboard + ** Added support for WBX granddaughterboards + ** Application notes for sensors and IF + * Windows: + ** MinGW and Cygwin support (thanks Don) + ** Fix calling convention on libusb callbacks + * Misc: + ** Added logging and messaging facilities + ** Deprecated API in utils/warning.hpp + ** Fixed race condition in device discovery/factory + + -- Ettus Research <packages@ettus.com> Tue, 30 Jan 2018 11:40:09 -0800 + +uhd (3.0.1-0ubuntu1) trusty; urgency=low + + * RFX400: fix for transmit capability + * USRP1: fix for axillary ADC read + * Windows: statically link libusb + * Windows: install dll into runtime path + * Linux: automatically set LIB_SUFFIX on rh-64 systems + * USRP-E100: fix - set FPGA tick rate on re-clock event + * build: various work on build system + * build: include FPGA and firmware images in installers + + -- Ettus Research <packages@ettus.com> Tue, 30 Jan 2018 11:40:09 -0800 + +uhd (3.0.0-0ubuntu1) trusty; urgency=low + + Initial (formal) release, no changes to mention. + + -- Ettus Research <packages@ettus.com> Tue, 30 Jan 2018 11:40:09 -0800 diff --git a/host/cmake/debian/control b/host/cmake/debian/control index 4e41c779e..c0bcb3620 100644 --- a/host/cmake/debian/control +++ b/host/cmake/debian/control @@ -2,18 +2,26 @@ Source: uhd Section: science Priority: optional Maintainer: Ettus Research <packages@ettus.com> -Uploaders: Martin Braun <martin.braun@ettus.com>, Nicholas Corgan <nick.corgan@ettus.com> -Build-Depends: debhelper (>= 9), cmake (>= 2.8.4+dfsg.1-3), python-dev, python-mako, doxygen, libusb-1.0-0-dev [linux-any], libusb2-dev [kfreebsd-any], libncurses5-dev, pkg-config, - libboost-dev, - libboost-date-time-dev, - libboost-filesystem-dev, - libboost-program-options-dev, - libboost-regex-dev, - libboost-system-dev, - libboost-thread-dev, - libboost-test-dev, - libboost-serialization-dev -Standards-Version: 3.9.5 +Uploaders: Martin Braun <martin.braun@ettus.com> +Build-Depends: debhelper (>= 9), + cmake (>= 2.8.4+dfsg.1-3), + python-dev, + python-mako, + doxygen, + libusb-1.0-0-dev [linux-any], + libusb2-dev [kfreebsd-any], + libncurses5-dev, + pkg-config, + libboost-dev, + libboost-date-time-dev, + libboost-filesystem-dev, + libboost-program-options-dev, + libboost-regex-dev, + libboost-system-dev, + libboost-thread-dev, + libboost-test-dev, + libboost-serialization-dev +Standards-Version: 3.9.7 Homepage: https://www.ettus.com Vcs-Git: git://github.com/EttusResearch/uhd.git @@ -36,7 +44,7 @@ Description: hardware driver for Ettus Research products Package: libuhd003 Architecture: any Section: libs -Pre-Depends: multiarch-support, ${misc:Pre-Depends} +Pre-Depends: ${misc:Pre-Depends} Depends: python, adduser, ${shlibs:Depends}, ${misc:Depends} Suggests: gnuradio Multi-Arch: same diff --git a/host/cmake/debian/copyright b/host/cmake/debian/copyright index ba763f6f3..071f6337f 100644 --- a/host/cmake/debian/copyright +++ b/host/cmake/debian/copyright @@ -5,11 +5,699 @@ Source: https://github.com/EttusResearch/uhd X-Note: The upstream package source tarball was generated from the tag: git archive --format=tar --prefix=uhd-3.7.3/ release_003_007_003 | xz > ../uhd_3.7.3.orig.tar.gz Comment: Only the host directory of the distributed source is used to build the uhd-host package for Debian main. -Copyright: Copyright 2010-2011 Ettus Research LLC +Copyright: Copyright 2010-2018 Ettus Research, A National Instruments Company License: GPL-3+ + +Files: * +Copyright: Copyright 2010-2018 Ettus Research, A National Instruments Company +License: GPL-3+ + +Files: images/* + firmware/fx2/b100/CMakeLists.txt + firmware/fx2/CMakeLists.txt + firmware/fx2/config/CMakeASM_SDCCInformation.cmake + firmware/fx2/config/Rename.cmake + firmware/fx2/config/Toolchain-sdcc.cmake + firmware/fx2/usrp1/CMakeLists.txt + firmware/fx3/* + firmware/octoclock/* + firmware/x300/* + firmware/README.txt +Copyright: Copyright 2010-2018 Ettus Research, A National Instruments Company +License: GPL-3+ +Comment: Not used for uhd-host package + +Files: debian/* +Copyright: © 2011-2012 A. Maitland Bottoms <bottoms@debian.org> +License: GPL-3+ + +Files: host/cmake/Modules/FindGit.cmake +Copyright: Copyright 2010 Kitware, Inc. +License: Kitware-BSD + +Files: host/cmake/Modules/FindUSB1.cmake +Copyright: Copyright (c) 2006, 2008 Laurent Montel, <montel@kde.org> +License: Kitware-BSD + +Files: firmware/fx2/* +Copyright: 2003,2004,2006,2007 Free Software Foundation, Inc. +License: GPL-3+ + +Files: firmware/fx2/config/CMakeTestASM_SDCCCompiler.cmake + firmware/fx2/config/CMakeDetermineASM_SDCCCompiler.cmake +Copyright: 2008-2009 Kitware, Inc. +License: Kitware-BSD +Comment: Not used for uhd-host package + +Files: firmware/zpu/apps* firmware/zpu/bin/* firmware/zpu/lib/* + firmware/zpu/lwip/*.h firmware/zpu/usrp2/* +Copyright: Copyright 2007-2009 Free Software Foundation, Inc. +License: GPL-3+ +Comment: Not used for uhd-host package + +Files: firmware/zpu/lwip/lwip-1.3.1 +Copyright: (c) 2001-2004 Swedish Institute of Computer Science. +License: lwip-BSD +Comment: liIP Author Adam Dunkels <adam@sics.se> + http://savannah.nongnu.org/projects/lwip/ + Also includes other BSD licensed code from additional copyright + holders outlined in detail below... + +Files: firmware/zpu/lwip/lwip-1.3.1/src/core/dns.c + firmware/zpu/lwip/lwip-1.3.1/src/include/lwip/dns.h +Copyright: (c) 2002-2003, Adam Dunkels. +License: lwip-BSD +Comment: Not used for uhd-host package + * Port to lwIP from uIP + * by Jim Pettinato April 2007 + * ported from uIP resolv.c + +Files: firmware/zpu/lwip/lwip-1.3.1/src/core/ipv4/autoip.c + firmware/zpu/lwip/lwip-1.3.1/src/include/ipv4/lwip/autoip.h +Copyright: (c) 2007 Dominik Spies <kontakt@dspies.de> + * All rights reserved. +License: lwip-BSD +Comment: Not used for uhd-host package + +Files: firmware/zpu/lwip/lwip-1.3.1/src/core/dhcp.c + firmware/zpu/lwip/lwip-1.3.1/src/netif/etharp.c + firmware/zpu/lwip/lwip-1.3.1/src/include/netif/etharp.h + firmware/zpu/lwip/lwip-1.3.1/src/include/lwip/snmp.h +Copyright: (c) 2001-2004 Leon Woestenberg <leon.woestenberg@gmx.net> +License: lwip-BSD +Comment: Not used for uhd-host package + +Files: firmware/zpu/lwip/lwip-1.3.1/src/include/netif/etharp.h + firmware/zpu/lwip/lwip-1.3.1/src/include/lwip/snmp.h + firmware/zpu/lwip/lwip-1.3.1/src/include/lwip/snmp_asn1.h + firmware/zpu/lwip/lwip-1.3.1/src/include/lwip/snmp_msg.h + firmware/zpu/lwip/lwip-1.3.1/src/include/lwip/snmp_structs.h + firmware/zpu/lwip/lwip-1.3.1/src/core/dhcp.c + firmware/zpu/lwip/lwip-1.3.1/src/core/snmp/mib2.c + firmware/zpu/lwip/lwip-1.3.1/src/core/snmp/msg_out.c + firmware/zpu/lwip/lwip-1.3.1/src/core/snmp/msg_in.c + firmware/zpu/lwip/lwip-1.3.1/src/core/snmp/asn1_dec.c + firmware/zpu/lwip/lwip-1.3.1/src/core/snmp/asn1_enc.c + firmware/zpu/lwip/lwip-1.3.1/src/core/snmp/mib_structs.c + firmware/zpu/lwip/lwip-1.3.1/src/netif/etharp.c +Copyright: (c) 2001-2004,2006 Axon Digital Design B.V., The Netherlands. +License: lwip-BSD +Comment: Not used for uhd-host package + Christiaan Simons <christiaan.simons@axon.tv> + +Files: firmware/zpu/lwip/lwip-1.3.1/src/netif/ppp/pppdebug.h: +Copyright: (c) 2003 by Marc Boucher, Services Informatiques (MBSI) inc. + portions Copyright (c) 1998 Global Election Systems Inc. + portions Copyright (c) 2001 by Cognizant Pty Ltd. +License: MBSI-BSD +Comment: Not used for uhd-host package + +Files: firmware/zpu/lwip/lwip-1.3.1/src/netif/ppp/randm.c + firmware/zpu/lwip/lwip-1.3.1/src/netif/ppp/randm.h +Copyright: (c) 2003 by Marc Boucher, Services Informatiques (MBSI) inc. + Copyright (c) 1998 Global Election Systems Inc. +License: MBSI-BSD +Comment: Not used for uhd-host package + * 03-01-01 Marc Boucher <marc@mbsi.ca> + * Ported to lwIP. + * 98-06-03 Guy Lancaster <lancasterg@acm.org>, Global Election Systems Inc. + * Extracted from avos. + +Files: firmware/zpu/lwip/lwip-1.3.1/src/netif/ppp/chpms.c + firmware/zpu/lwip/lwip-1.3.1/src/netif/ppp/chpms.h + firmware/zpu/lwip/lwip-1.3.1/src/netif/ppp/chap.c + firmware/zpu/lwip/lwip-1.3.1/src/netif/ppp/chap.h +Copyright: (c) 2003 by Marc Boucher, Services Informatiques (MBSI) inc. + portions Copyright (c) 1998 Global Election Systems Inc. +License: MBSI-BSD +Comment: Not used for uhd-host package + +Files: firmware/zpu/lwip/lwip-1.3.1/src/netif/ppp/auth.c + firmware/zpu/lwip/lwip-1.3.1/src/netif/ppp/auth.h + firmware/zpu/lwip/lwip-1.3.1/src/netif/ppp/magic.c + firmware/zpu/lwip/lwip-1.3.1/src/netif/ppp/magic.h + firmware/zpu/lwip/lwip-1.3.1/src/netif/ppp/fsm.c + firmware/zpu/lwip/lwip-1.3.1/src/netif/ppp/fsm.h + firmware/zpu/lwip/lwip-1.3.1/src/netif/ppp/ppp.c + firmware/zpu/lwip/lwip-1.3.1/src/netif/ppp/ppp.h + firmware/zpu/lwip/lwip-1.3.1/src/netif/ppp/pap.c + firmware/zpu/lwip/lwip-1.3.1/src/netif/ppp/pap.h + firmware/zpu/lwip/lwip-1.3.1/src/netif/ppp/lcp.c + firmware/zpu/lwip/lwip-1.3.1/src/netif/ppp/lcp.h + firmware/zpu/lwip/lwip-1.3.1/src/netif/ppp/ipcp.c + firmware/zpu/lwip/lwip-1.3.1/src/netif/ppp/ipcp.h +Copyright: (c) 2003 by Marc Boucher, Services Informatiques (MBSI) inc. + portions Copyright (c) 1997,1998 by Global Election Systems Inc. +License: MBSI-BSD +Comment: Not used for uhd-host package + +Files: firmware/zpu/lwip/lwip-1.3.1/src/netif/ppp/chpms.c + firmware/zpu/lwip/lwip-1.3.1/src/netif/ppp/chpms.h +Copyright: (c) 1995 Eric Rosenquist, Strata Software Limited. + * All rights reserved. +License: Rosenquist +Comment: Not used for uhd-host package + http://www.strataware.com/ + +Files: firmware/zpu/lwip/lwip-1.3.1/src/netif/ppp/chap.c + firmware/zpu/lwip/lwip-1.3.1/src/netif/ppp/chap.h +Copyright: (c) 1991 Gregory M. Christy + * All rights reserved. +License: Christy + +Files: firmware/zpu/lwip/lwip-1.3.1/src/netif/ppp/ppp.c + firmware/zpu/lwip/lwip-1.3.1/src/netif/ppp/ppp.h + firmware/zpu/lwip/lwip-1.3.1/src/netif/ppp/auth.c + firmware/zpu/lwip/lwip-1.3.1/src/netif/ppp/chap.c + firmware/zpu/lwip/lwip-1.3.1/src/netif/ppp/chap.h +Copyright: (c) 1993,1994 The Australian National University. + * All rights reserved. +License: Australian-National-University +Comment: Not used for uhd-host package + +Files: firmware/zpu/lwip/lwip-1.3.1/src/netif/ppp/ppp.c + firmware/zpu/lwip/lwip-1.3.1/src/netif/ppp/ppp.h + firmware/zpu/lwip/lwip-1.3.1/src/netif/ppp/auth.c + firmware/zpu/lwip/lwip-1.3.1/src/netif/ppp/auth.h + firmware/zpu/lwip/lwip-1.3.1/src/netif/ppp/pap.c + firmware/zpu/lwip/lwip-1.3.1/src/netif/ppp/pap.h + firmware/zpu/lwip/lwip-1.3.1/src/netif/ppp/lcp.c + firmware/zpu/lwip/lwip-1.3.1/src/netif/ppp/lcp.h + firmware/zpu/lwip/lwip-1.3.1/src/netif/ppp/ipcp.c + firmware/zpu/lwip/lwip-1.3.1/src/netif/ppp/ipcp.h + firmware/zpu/lwip/lwip-1.3.1/src/netif/ppp/fsm.c + firmware/zpu/lwip/lwip-1.3.1/src/netif/ppp/fsm.h + firmware/zpu/lwip/lwip-1.3.1/src/netif/ppp/magic.c + firmware/zpu/lwip/lwip-1.3.1/src/netif/ppp/magic.h +Copyright: (c) 1989 Carnegie Mellon University. + * All rights reserved. +License: Carnegie-Mellon-University +Comment: Not used for uhd-host package + +Files: firmware/zpu/lwip/lwip-1.3.1/src/netif/ppp/ppp_oe.c + firmware/zpu/lwip/lwip-1.3.1/src/include/netif/ppp_oe.h +Copyright: (c) 2006 by Marc Boucher, Services Informatiques (MBSI) inc. +License: MBSI-BSD +Comment: Not used for uhd-host package + +Files: firmware/zpu/lwip/lwip-1.3.1/src/core/ipv4/igmp.c + firmware/zpu/lwip/lwip-1.3.1/src/include/ipv4/lwip/igmp.h +Copyright: (c) 2002 CITEL Technologies Ltd. + * All rights reserved. +License: CITEL-BSD +Comment: Not used for uhd-host package + +Files: firmware/zpu/lwip/lwip-1.3.1/src/netif/ppp/ppp_oe.c + firmware/zpu/lwip/lwip-1.3.1/src/include/netif/ppp_oe.h +Copyright: (c) 2002 The NetBSD Foundation, Inc. +License: NetBSD +Comment: Not used for uhd-host package + /* based on NetBSD: if_pppoe.c,v 1.64 2006/01/31 23:50:15 martin Exp */ + * This code is derived from software contributed to The NetBSD Foundation + * by Martin Husemann <martin@NetBSD.org>. + +Files: firmware/zpu/lwip/lwip-1.3.1/src/netif/ppp/vj.c + firmware/zpu/lwip/lwip-1.3.1/src/netif/ppp/vj.h +Copyright: (c) 1989 Regents of the University of California. + * All rights reserved. +License: VJ-BSD +Comment: Not used for uhd-host package + * Van Jacobson (van@helios.ee.lbl.gov), Dec 31, 1989: + * Initial distribution. + * + * Modified June 1993 by Paul Mackerras, paulus@cs.anu.edu.au, + * so that the entire packet being decompressed doesn't have + * to be in contiguous memory (just the compressed header). + * + * Modified March 1998 by Guy Lancaster, glanca@gesn.com, + * for a 16 bit processor. + +Files: firmware/zpu/lwip/lwip-1.3.1/src/netif/ppp/md5.c + firmware/zpu/lwip/lwip-1.3.1/src/netif/ppp/md5.h +Copyright: (C) 1990, RSA Data Security, Inc. All rights reserved. +License: RSA-BSD +Comment: Not used for uhd-host package ** + +Files: fpga-src/* +Copyright: 2008-2018 Ettus Research, A National Instruments Company +License: GPL-3+ +Comment: Not used for uhd-host package + +Files: fpga-src/usrp2/opencores/spi_boot/COPYING + fpga-src/usrp1/rbf/rev2/Makefile.am + fpga-src/usrp1/rbf/Makefile.am + fpga-src/usrp1/rbf/rev4/Makefile.am + fpga-src/usrp1/Makefile.am + fpga-src/usrp1/gen_makefile_extra.py + fpga-src/usrp1/toplevel/mrfm/mrfm_fft.py + fpga-src/usrp1/toplevel/mrfm/mrfm.py + fpga-src/usrp1/toplevel/usrp_inband_usb/usrp_inband_usb.v +Copyright: Copyright (C) 1989,1991,2004-2007,2009 Free Software Foundation, Inc. +License: GPL-3+ +Comment: Not used for uhd-host package + +Files: fpga-src/usrp1/sdr_lib/master_control.v fpga-src/usrp1/sdr_lib/atr_delay.v +Copyright: (C) 2007 Corgan Enterprises LLC +License: GPL-2+ +Comment: Not used for uhd-host package + +Files: fpga-src/usrp1/sdr_lib/master_control_multi.v + fpga-src/usrp1/toplevel/include/common_config_2rx_0tx.vh + fpga-src/usrp1/toplevel/include/common_config_2rxhb_0tx.vh + fpga-src/usrp1/toplevel/usrp_multi/config.vh + fpga-src/usrp1/toplevel/usrp_multi/usrp_multi.v +Copyright: (C) 2006 Martin Dudok van Heel +License: GPL-2+ +Comment: Not used for uhd-host package + +Files: fpga-src/usrp2/sdr_lib/round_reg.v + fpga-src/usrp2/sdr_lib/ddc.v + fpga-src/usrp2/sdr_lib/cordic_z24.v + fpga-src/usrp2/sdr_lib/duc.v + fpga-src/usrp2/sdr_lib/cordic_stage.v + fpga-src/usrp2/sdr_lib/cic_interp.v + fpga-src/usrp2/sdr_lib/clip.v + fpga-src/usrp2/sdr_lib/clip_reg.v + fpga-src/usrp2/sdr_lib/round.v + fpga-src/usrp2/sdr_lib/cordic.v + fpga-src/usrp2/sdr_lib/cic_dec_shifter.v + fpga-src/usrp2/sdr_lib/hb/halfband_decim.v + fpga-src/usrp2/sdr_lib/clip_and_round.v + fpga-src/usrp2/sdr_lib/round_tb.v + fpga-src/usrp2/sdr_lib/cic_decim.v + fpga-src/usrp2/sdr_lib/cic_int_shifter.v + fpga-src/usrp2/sdr_lib/clip_and_round_reg.v + fpga-src/usrp2/sdr_lib/cic_strober.v + fpga-src/usrp2/sdr_lib/sign_extend.v + fpga-src/usrp1/sdr_lib/ddc.v + fpga-src/usrp1/sdr_lib/master_control.v + fpga-src/usrp1/sdr_lib/clk_divider.v + fpga-src/usrp1/sdr_lib/tx_chain_hb.v + fpga-src/usrp1/sdr_lib/duc.v + fpga-src/usrp1/sdr_lib/tx_buffer.v + fpga-src/usrp1/sdr_lib/cordic_stage.v + fpga-src/usrp1/sdr_lib/cic_interp.v + fpga-src/usrp1/sdr_lib/rx_chain_dual.v + fpga-src/usrp1/sdr_lib/cordic.v + fpga-src/usrp1/sdr_lib/rx_chain.v + fpga-src/usrp1/sdr_lib/cic_dec_shifter.v + fpga-src/usrp1/sdr_lib/hb/halfband_decim.v + fpga-src/usrp1/sdr_lib/dpram.v + fpga-src/usrp1/sdr_lib/ext_fifo.v + fpga-src/usrp1/sdr_lib/cic_decim.v + fpga-src/usrp1/sdr_lib/rx_buffer.v + fpga-src/usrp1/sdr_lib/strobe_gen.v + fpga-src/usrp1/sdr_lib/serial_io.v + fpga-src/usrp1/sdr_lib/cic_int_shifter.v + fpga-src/usrp1/sdr_lib/gen_sync.v + fpga-src/usrp1/sdr_lib/tx_chain.v + fpga-src/usrp1/sdr_lib/sign_extend.v + fpga-src/usrp1/sdr_lib/io_pins.v + fpga-src/usrp1/sdr_lib/phase_acc.v + fpga-src/usrp1/tb/interp_tb.v + fpga-src/usrp1/tb/decim_tb.v + fpga-src/usrp1/tb/justinterp_tb.v + fpga-src/usrp1/tb/usrp_tasks.v + fpga-src/usrp1/tb/cordic_tb.v + fpga-src/usrp1/tb/fullchip_tb.v + fpga-src/usrp1/models/pll.v + fpga-src/usrp1/toplevel/usrp_std/usrp_std.v + fpga-src/usrp1/toplevel/usrp_std/config.vh + fpga-src/usrp1/toplevel/include/common_config_bottom.vh + fpga-src/usrp1/toplevel/include/common_config_2rx_0tx.vh + fpga-src/usrp1/toplevel/include/common_config_2rxhb_0tx.vh + fpga-src/usrp1/toplevel/include/common_config_4rx_0tx.vh + fpga-src/usrp1/toplevel/include/common_config_1rxhb_1tx.vh + fpga-src/usrp1/toplevel/include/common_config_2rxhb_2tx.vh + fpga-src/usrp1/toplevel/mrfm/shifter.v + fpga-src/usrp1/toplevel/mrfm/mrfm.v + fpga-src/usrp1/toplevel/sizetest/sizetest.v + fpga-src/usrp1/toplevel/usrp_inband_usb/usrp_inband_usb.v + fpga-src/usrp1/toplevel/usrp_inband_usb/config.vh + fpga-src/usrp1/toplevel/usrp_multi/config.vh + fpga-src/usrp1/toplevel/usrp_multi/usrp_multi.v +Copyright: (C) 2003-2008 Matt Ettus +License: GPL-3+ +Comment: Not used for uhd-host package + +Files: fpga-src/usrp2/sdr_lib/integrate.v + fpga-src/usrp2/sdr_lib/hb_interp.v + fpga-src/usrp2/sdr_lib/Makefile.srcs + fpga-src/usrp2/sdr_lib/small_hb_int_tb.v + fpga-src/usrp2/sdr_lib/dspengine_8to16.v + fpga-src/usrp2/sdr_lib/pipectrl.v + fpga-src/usrp2/sdr_lib/add2.v + fpga-src/usrp2/sdr_lib/add2_and_round.v + fpga-src/usrp2/sdr_lib/hb_dec.v + fpga-src/usrp2/sdr_lib/med_hb_int.v + fpga-src/usrp2/sdr_lib/small_hb_dec_tb.v + fpga-src/usrp2/sdr_lib/halfband_tb.v + fpga-src/usrp2/sdr_lib/tx_control.v + fpga-src/usrp2/sdr_lib/small_hb_dec.v + fpga-src/usrp2/sdr_lib/dsp_rx_glue.v + fpga-src/usrp2/sdr_lib/hb_dec_tb.v + fpga-src/usrp2/sdr_lib/rx_dcoffset_tb.v + fpga-src/usrp2/sdr_lib/rssi.v + fpga-src/usrp2/sdr_lib/hb/ram16_2sum.v + fpga-src/usrp2/sdr_lib/hb/ram16_2port.v + fpga-src/usrp2/sdr_lib/hb/ram32_2sum.v + fpga-src/usrp2/sdr_lib/hb/halfband_interp.v + fpga-src/usrp2/sdr_lib/hb/hbd_tb/test_hbd.v + fpga-src/usrp2/sdr_lib/hb/mac.v + fpga-src/usrp2/sdr_lib/hb/acc.v + fpga-src/usrp2/sdr_lib/hb/mult.v + fpga-src/usrp2/sdr_lib/hb/coeff_ram.v + fpga-src/usrp2/sdr_lib/hb/coeff_rom.v + fpga-src/usrp2/sdr_lib/duc_chain.v + fpga-src/usrp2/sdr_lib/acc.v + fpga-src/usrp2/sdr_lib/dspengine_16to8.v + fpga-src/usrp2/sdr_lib/hb_interp_tb.v + fpga-src/usrp2/sdr_lib/hb_tb.v + fpga-src/usrp2/sdr_lib/rx_dcoffset.v + fpga-src/usrp2/sdr_lib/dummy_rx.v + fpga-src/usrp2/sdr_lib/halfband_ideal.v + fpga-src/usrp2/sdr_lib/dsp_tx_glue.v + fpga-src/usrp2/sdr_lib/pipestage.v + fpga-src/usrp2/sdr_lib/ddc_chain.v + fpga-src/usrp2/sdr_lib/add2_reg.v + fpga-src/usrp2/sdr_lib/small_hb_int.v + fpga-src/usrp2/sdr_lib/add2_and_round_reg.v + fpga-src/usrp2/sdr_lib/rx_control.v + fpga-src/usrp2/serdes/Makefile.srcs + fpga-src/usrp2/serdes/serdes.v + fpga-src/usrp2/serdes/serdes_rx.v + fpga-src/usrp2/serdes/serdes_tx.v + fpga-src/usrp2/serdes/serdes_fc_tx.v + fpga-src/usrp2/serdes/serdes_fc_rx.v + fpga-src/usrp2/serdes/serdes_tb.v + fpga-src/usrp2/fifo/dsp_framer36.v + fpga-src/usrp2/fifo/Makefile.srcs + fpga-src/usrp2/fifo/fifo36_to_fifo19.v + fpga-src/usrp2/fifo/fifo19_mux.v + fpga-src/usrp2/fifo/packet_tb.v + fpga-src/usrp2/fifo/buffer_int2.v + fpga-src/usrp2/fifo/fifo19_to_ll8.v + fpga-src/usrp2/fifo/packet_verifier.v + fpga-src/usrp2/fifo/buffer_int.v + fpga-src/usrp2/fifo/fifo_2clock.v + fpga-src/usrp2/fifo/fifo19_pad.v + fpga-src/usrp2/fifo/packet_generator32.v + fpga-src/usrp2/fifo/fifo36_to_ll8.v + fpga-src/usrp2/fifo/packet_verifier32.v + fpga-src/usrp2/fifo/fifo_19to36_tb.v + fpga-src/usrp2/fifo/packet_dispatcher36_x3.v + fpga-src/usrp2/fifo/buffer_pool_tb.v + fpga-src/usrp2/fifo/fifo_2clock_cascade.v + fpga-src/usrp2/fifo/fifo_tb.v + fpga-src/usrp2/fifo/fifo72_to_fifo36.v + fpga-src/usrp2/fifo/fifo36_to_fifo72.v + fpga-src/usrp2/fifo/packet_router.v + fpga-src/usrp2/fifo/fifo19_to_fifo36.v + fpga-src/usrp2/fifo/crossbar36.v + fpga-src/usrp2/fifo/splitter36.v + fpga-src/usrp2/fifo/fifo_long.v + fpga-src/usrp2/fifo/buffer_int_tb.v + fpga-src/usrp2/fifo/packet32_tb.v + fpga-src/usrp2/fifo/fifo_short.v + fpga-src/usrp2/fifo/ll8_to_fifo19.v + fpga-src/usrp2/fifo/ll8_shortfifo.v + fpga-src/usrp2/fifo/packet_generator.v + fpga-src/usrp2/fifo/fifo_pacer.v + fpga-src/usrp2/fifo/fifo36_mux.v + fpga-src/usrp2/fifo/ll8_to_fifo36.v + fpga-src/usrp2/fifo/fifo36_demux.v + fpga-src/usrp2/fifo/buffer_pool.v + fpga-src/usrp2/fifo/fifo_cascade.v + fpga-src/usrp2/fifo/add_routing_header.v + fpga-src/usrp2/fifo/valve36.v + fpga-src/usrp2/control_lib/Makefile.srcs + fpga-src/usrp2/control_lib/bin2gray.v + fpga-src/usrp2/control_lib/mux_32_4.v + fpga-src/usrp2/control_lib/mux8.v + fpga-src/usrp2/control_lib/srl.v + fpga-src/usrp2/control_lib/settings_bus_16LE.v + fpga-src/usrp2/control_lib/reset_sync.v + fpga-src/usrp2/control_lib/ram_harv_cache.v + fpga-src/usrp2/control_lib/quad_uart.v + fpga-src/usrp2/control_lib/gray2bin.v + fpga-src/usrp2/control_lib/user_settings.v + fpga-src/usrp2/control_lib/wb_output_pins32.v + fpga-src/usrp2/control_lib/double_buffer.v + fpga-src/usrp2/control_lib/shortfifo.v + fpga-src/usrp2/control_lib/oneshot_2clk.v + fpga-src/usrp2/control_lib/ram_harvard.v + fpga-src/usrp2/control_lib/settings_bus.v + fpga-src/usrp2/control_lib/sd_spi_wb.v + fpga-src/usrp2/control_lib/wb_bridge_16_32.v + fpga-src/usrp2/control_lib/clock_control.v + fpga-src/usrp2/control_lib/longfifo.v + fpga-src/usrp2/control_lib/dbsm.v + fpga-src/usrp2/control_lib/simple_uart.v + fpga-src/usrp2/control_lib/bootram.v + fpga-src/usrp2/control_lib/sd_spi_tb.v + fpga-src/usrp2/control_lib/system_control.v + fpga-src/usrp2/control_lib/wb_semaphore.v + fpga-src/usrp2/control_lib/dpram32.v + fpga-src/usrp2/control_lib/dcache.v + fpga-src/usrp2/control_lib/clock_bootstrap_rom.v + fpga-src/usrp2/control_lib/v5icap_wb.v + fpga-src/usrp2/control_lib/s3a_icap_wb.v + fpga-src/usrp2/control_lib/priority_enc.v + fpga-src/usrp2/control_lib/simple_uart_tx.v + fpga-src/usrp2/control_lib/wb_regfile_2clock.v + fpga-src/usrp2/control_lib/gray_send.v + fpga-src/usrp2/control_lib/decoder_3_8.v + fpga-src/usrp2/control_lib/wb_ram_dist.v + fpga-src/usrp2/control_lib/wb_bus_writer.v + fpga-src/usrp2/control_lib/traffic_cop.v + fpga-src/usrp2/control_lib/icache.v + fpga-src/usrp2/control_lib/setting_reg.v + fpga-src/usrp2/control_lib/wb_sim.v + fpga-src/usrp2/control_lib/atr_controller16.v + fpga-src/usrp2/control_lib/ram_2port_mixed_width.v + fpga-src/usrp2/control_lib/atr_controller.v + fpga-src/usrp2/control_lib/ram_2port.v + fpga-src/usrp2/control_lib/ss_rcvr.v + fpga-src/usrp2/control_lib/wb_readback_mux_16LE.v + fpga-src/usrp2/control_lib/ram_harvard2.v + fpga-src/usrp2/control_lib/settings_bus_crossclock.v + fpga-src/usrp2/control_lib/fifo_to_wb.v + fpga-src/usrp2/control_lib/mux4.v + fpga-src/usrp2/control_lib/fifo_to_wb_tb.v + fpga-src/usrp2/control_lib/double_buffer_tb.v + fpga-src/usrp2/control_lib/medfifo.v + fpga-src/usrp2/control_lib/simple_uart_rx.v + fpga-src/usrp2/control_lib/ram_loader.v + fpga-src/usrp2/control_lib/system_control_tb.v + fpga-src/usrp2/control_lib/ram_wb_harvard.v + fpga-src/usrp2/control_lib/spi.v + fpga-src/usrp2/control_lib/sd_spi.v + fpga-src/usrp2/control_lib/clock_control_tb.v + fpga-src/usrp2/control_lib/wb_ram_block.v + fpga-src/usrp2/control_lib/gpio_atr.v + fpga-src/usrp2/control_lib/wb_readback_mux.v + fpga-src/usrp2/udp/Makefile.srcs + fpga-src/usrp2/udp/add_onescomp.v + fpga-src/usrp2/udp/prot_eng_tx_tb.v + fpga-src/usrp2/udp/udp_wrapper.v + fpga-src/usrp2/udp/prot_eng_tx.v + fpga-src/usrp2/udp/fifo19_rxrealign.v + fpga-src/usrp2/udp/prot_eng_rx.v + fpga-src/usrp2/opencores/Makefile.srcs + fpga-src/usrp2/gpif/Makefile.srcs + fpga-src/usrp2/gpif/packet_reframer.v + fpga-src/usrp2/gpif/packet_splitter.v + fpga-src/usrp2/gpif/gpif_wr_tb.v + fpga-src/usrp2/gpif/slave_fifo.v + fpga-src/usrp2/gpif/gpif_tb.v + fpga-src/usrp2/gpif/gpif_wr.v + fpga-src/usrp2/gpif/gpif.v + fpga-src/usrp2/gpif/gpif_rd.v + fpga-src/usrp2/gpif/packet_splitter_tb.v + fpga-src/usrp2/testbench/single_u2_sim.v + fpga-src/usrp2/coregen/Makefile.srcs + fpga-src/usrp2/vrt/Makefile.srcs + fpga-src/usrp2/vrt/vita_rx_control.v + fpga-src/usrp2/vrt/gen_context_pkt.v + fpga-src/usrp2/vrt/vita_rx_tb.v + fpga-src/usrp2/vrt/vita_tx_chain.v + fpga-src/usrp2/vrt/trigger_context_pkt.v + fpga-src/usrp2/vrt/vita_pkt_gen.v + fpga-src/usrp2/vrt/vita_rx_chain.v + fpga-src/usrp2/vrt/vita_tx_deframer.v + fpga-src/usrp2/vrt/vita_tx_engine_glue.v + fpga-src/usrp2/vrt/vita_rx_framer.v + fpga-src/usrp2/vrt/vita_tx_control.v + fpga-src/usrp2/vrt/vita_rx_engine_glue.v + fpga-src/usrp2/vrt/vita_tx_tb.v + fpga-src/usrp2/timing/Makefile.srcs + fpga-src/usrp2/timing/time_compare.v + fpga-src/usrp2/timing/timer.v + fpga-src/usrp2/timing/time_transfer_tb.v + fpga-src/usrp2/timing/time_sender.v + fpga-src/usrp2/timing/time_64bit.v + fpga-src/usrp2/timing/time_sync.v + fpga-src/usrp2/timing/time_receiver.v + fpga-src/usrp2/timing/simple_timer.v + fpga-src/usrp2/gpmc/Makefile.srcs + fpga-src/usrp2/gpmc/cross_clock_reader.v + fpga-src/usrp2/gpmc/gpmc_wb.v + fpga-src/usrp2/gpmc/fifo_to_gpmc.v + fpga-src/usrp2/gpmc/gpmc_to_fifo.v + fpga-src/usrp2/gpmc/gpmc.v + fpga-src/usrp2/simple_gemac/eth_tasks_f36.v + fpga-src/usrp2/simple_gemac/Makefile.srcs + fpga-src/usrp2/simple_gemac/crc.v + fpga-src/usrp2/simple_gemac/flow_ctrl_rx.v + fpga-src/usrp2/simple_gemac/simple_gemac_wrapper_tb.v + fpga-src/usrp2/simple_gemac/simple_gemac.v + fpga-src/usrp2/simple_gemac/simple_gemac_tx.v + fpga-src/usrp2/simple_gemac/simple_gemac_tb.v + fpga-src/usrp2/simple_gemac/ll8_to_txmac.v + fpga-src/usrp2/simple_gemac/simple_gemac_wb.v + fpga-src/usrp2/simple_gemac/simple_gemac_wrapper.v + fpga-src/usrp2/simple_gemac/rxmac_to_ll8.v + fpga-src/usrp2/simple_gemac/flow_ctrl_tx.v + fpga-src/usrp2/simple_gemac/eth_tasks.v + fpga-src/usrp2/simple_gemac/ethtx_realign.v + fpga-src/usrp2/simple_gemac/address_filter.v + fpga-src/usrp2/simple_gemac/simple_gemac_wrapper_f36_tb.v + fpga-src/usrp2/simple_gemac/simple_gemac_rx.v + fpga-src/usrp2/simple_gemac/delay_line.v + fpga-src/usrp2/simple_gemac/address_filter_promisc.v + fpga-src/usrp2/simple_gemac/ethrx_realign.v + fpga-src/usrp2/simple_gemac/eth_tasks_f19.v + fpga-src/usrp2/models/M24LC02B.v + fpga-src/usrp2/models/CY7C1356C/cy1356.v + fpga-src/usrp2/models/CY7C1356C/testbench.v + fpga-src/usrp2/models/cpld_model.v + fpga-src/usrp2/models/adc_model.v + fpga-src/usrp2/models/serdes_model.v + fpga-src/usrp2/models/MULT18X18S.v + fpga-src/usrp2/models/gpmc_model_async.v + fpga-src/usrp2/models/xlnx_glbl.v + fpga-src/usrp2/models/gpmc_model_sync.v + fpga-src/usrp2/models/miim_model.v + fpga-src/usrp2/models/uart_rx.v + fpga-src/usrp2/models/M24LC024B.v + fpga-src/usrp2/models/math_real.v + fpga-src/usrp2/custom/power_trig_tb.v + fpga-src/usrp2/custom/custom_dsp_tx.v + fpga-src/usrp2/custom/custom_engine_tx.v + fpga-src/usrp2/custom/custom_engine_rx.v + fpga-src/usrp2/custom/power_trig.v + fpga-src/usrp2/custom/custom_dsp_rx.v + fpga-src/usrp2/extramfifo/Makefile.srcs + fpga-src/usrp2/extramfifo/nobl_fifo.v + fpga-src/usrp2/extramfifo/refill_randomizer.v + fpga-src/usrp2/extramfifo/nobl_if.v + fpga-src/usrp2/extramfifo/ext_fifo.v + fpga-src/usrp2/extramfifo/test_sram_if.v + fpga-src/usrp2/extramfifo/ext_fifo_tb.v + fpga-src/usrp2/top/python/check_timing.py + fpga-src/usrp2/top/python/check_inout.py + fpga-src/usrp2/top/tcl/ise_helper.tcl + fpga-src/usrp2/top/USRP2/u2_rev3.v + fpga-src/usrp2/top/USRP2/u2_core.v + fpga-src/usrp2/top/USRP2/Makefile + fpga-src/usrp2/top/Makefile.common + fpga-src/usrp2/top/E1x0/u1e.v + fpga-src/usrp2/top/E1x0/Makefile.E100 + fpga-src/usrp2/top/E1x0/tb_u1e.v + fpga-src/usrp2/top/E1x0/Makefile.E110 + fpga-src/usrp2/top/E1x0/u1e_core.v + fpga-src/usrp2/top/E1x0/Makefile + fpga-src/usrp2/top/B100/u1plus.v + fpga-src/usrp2/top/B100/u1plus_core.v + fpga-src/usrp2/top/B100/B100.v + fpga-src/usrp2/top/B100/Makefile.B100 + fpga-src/usrp2/top/B100/Makefile + fpga-src/usrp2/top/N2x0/Makefile.N210R3 + fpga-src/usrp2/top/N2x0/u2plus.v + fpga-src/usrp2/top/N2x0/u2plus_core.v + fpga-src/usrp2/top/N2x0/capture_ddrlvds.v + fpga-src/usrp2/top/N2x0/Makefile.N200R4 + fpga-src/usrp2/top/N2x0/Makefile.N200R3 + fpga-src/usrp2/top/N2x0/Makefile.N210R4 + fpga-src/usrp2/top/N2x0/Makefile +Copyright: 2008-2018 Ettus Research, A National Instruments Company +License: GPL-3+ +Comment: Not used for uhd-host package + +Files: fpga-src/usrp1/megacells/* + fpga-src/usrp1/toplevel/*.qsf fpga-src/usrp1/toplevel/*.qpf +Copyright: (C) 1991-2004 Altera Corporation +License: Altera-boilerplate +Comment: Boilerplate terms prepended to files which include design + parameters for the project licensed GPL-3+. + . + Not used for uhd-host package + +Files: fpga-src/usrp2/coregen/fifo* + fpga-src/usrp2/models/FIFO_GENERATOR_V4_3.v + fpga-src/usrp2/models/FIFO_GENERATOR_V4_3.v + fpga-src/usrp2/models/BUFG.v + fpga-src/usrp2/models/IOBUF.v + fpga-src/usrp2/models/RAMB16_S36_S36.v + fpga-src/usrp2/models/RAMB16_S36_S36.v + fpga-src/usrp2/models/SRLC16E.v + fpga-src/usrp2/models/SRL16E.v + fpga-src/usrp2/models/FIFO_GENERATOR_V6_1.v + fpga-src/usrp2/extramfifo/icon.v + fpga-src/usrp2/extramfifo/ila.v +Copyright: (c) 1995-2010 Xilinx, Inc. +License: Xilinx-boilerplate +Comment: Boilerplate terms prepended to files which include design + parameters for the project licensed GPL-3+. + . + Not used for uhd-host package. + +Files: fpga-src/usrp2/opencores/8b10b +Copyright: (c)2002 Chuck Benz, Hollis, NH +License: Benz +Comment: Not used for uhd-host package + +Files: fpga-src/usrp2/opencores/aemb +Copyright: (C) 2004-2007 Shawn Tan Ser Ngiap <shawn.tan@aeste.net> +License: AEMB-LGPL-3+ + +Files: fpga-src/usrp2/opencores/i2c/* + fpga-src/usrp2/opencores/simple_gpio/* + fpga-src/usrp2/opencores/simple_pic/* +Copyright: (C) 2000,2001,2002,2004 Richard Herveille +License: Herveille +Comment: Not used for uhd-host package + +Files: fpga-src/usrp2/opencores/spi +Copyright: (C) 2002 Simon Srot (simons@opencores.org) +License: Srot-LGPL-2.1+ +Comment: Not used for uhd-host package + +Files: fpga-src/usrp2/opencores/spi_boot/* +Copyright: (c) 2005, Arnim Laeuger (arniml@opencores.org) +License: GPL-2 +Comment: + COPYING file is GPL-2. + . + On Debian systems, the complete text of the GNU General + Public License can be found in `/usr/share/common-licenses/GPL-2'. + . + Not used for uhd-host package + +Files: fpga-src/usrp2/opencores/wb_zbt +Copyright: (C) 2008 Sebastien Bourdeauducq - http://lekernel.net +License: Milkymist-LGPL-2+ +Comment: Not used for uhd-host package + +Files: fpga-src/usrp2/opencores/zpu/* +Copyright: 2004-2008 oharboe - �yvind Harboe - oyvind.harboe@zylin.com +License: zpu-FreeBSD +Comment: Not used for uhd-host package + +License: GPL-2+ This program is free software: you can redistribute it and/or modify it under the terms of the GNU General Public License as published by - the Free Software Foundation, either version 3 of the License, or + the Free Software Foundation, either version 2 of the License, or (at your option) any later version. . This program is distributed in the hope that it will be useful, @@ -23,16 +711,23 @@ License: GPL-3+ On Debian systems, the complete text of the GNU General Public License can be found in `/usr/share/common-licenses/GPL-3'. -Files: debian/* -Copyright: © 2011-2012 A. Maitland Bottoms <bottoms@debian.org> -License: GPL-3+ - -Files: host/* not listed below: -Copyright: Copyright 2010-2017 Ettus Research, a National Instruments Company License: GPL-3+ + This program is free software: you can redistribute it and/or modify + it under the terms of the GNU General Public License as published by + the Free Software Foundation, either version 3 of the License, or + (at your option) any later version. + . + This program is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU General Public License for more details. + . + You should have received a copy of the GNU General Public License + along with this program. If not, see <http://www.gnu.org/licenses/>. + . + On Debian systems, the complete text of the GNU General + Public License can be found in `/usr/share/common-licenses/GPL-3'. -Files: host/cmake/Modules/FindGit.cmake -Copyright: Copyright 2010 Kitware, Inc. License: Kitware-BSD Redistribution and use in source and binary forms, with or without modification, are permitted provided that the following conditions @@ -62,78 +757,6 @@ License: Kitware-BSD (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. -Files: host/cmake/Modules/FindUSB1.cmake -Copyright: Copyright (c) 2006, 2008 Laurent Montel, <montel@kde.org> -License: Kitware-BSD - -Files: host/cmake/msvc/* -Copyright: Copyright (c) 2006 Alexander Chemeris -Comment: Not used for building Debian packages. -License: BSD - // Redistribution and use in source and binary forms, with or without - // modification, are permitted provided that the following conditions are met: - // - // 1. Redistributions of source code must retain the above copyright notice, - // this list of conditions and the following disclaimer. - // - // 2. Redistributions in binary form must reproduce the above copyright - // notice, this list of conditions and the following disclaimer in the - // documentation and/or other materials provided with the distribution. - // - // 3. The name of the author may be used to endorse or promote products - // derived from this software without specific prior written permission. - // - // THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR IMPLIED - // WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF - // MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO - // EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, - // SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, - // PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; - // OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, - // WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR - // OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF - // ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - -Files: images/* -Copyright: Copyright 2010-2011 Ettus Research LLC -License: GPL-3+ -Comment: Not used for uhd-host package - -Files: firmware/fx3/* firmware/octoclock/* firmware/x300/* -Copyright: 2013-2014 Ettus Research LLC -License: GPL-3+ - -Files: firmware/fx2/* not listed below -Copyright: 2003,2004,2006,2007 Free Software Foundation, Inc. -License: GPL-3+ - -Files: firmware/fx2/b100/CMakeLists.txt - firmware/fx2/CMakeLists.txt - firmware/fx2/config/CMakeASM_SDCCInformation.cmake - firmware/fx2/config/Rename.cmake - firmware/fx2/config/Toolchain-sdcc.cmake - firmware/fx2/usrp1/CMakeLists.txt -Copyright: 2010 Ettus Research LLC -License: GPL-3+ - -Files: firmware/fx2/config/CMakeTestASM_SDCCCompiler.cmake - firmware/fx2/config/CMakeDetermineASM_SDCCCompiler.cmake -Copyright: 2008-2009 Kitware, Inc. -License: Kitware-BSD - -Files: firmware/zpu/apps* firmware/zpu/lib/* - firmware/zpu/lwip/*.h firmware/zpu/usrp2/* - firmware/README.txt -Copyright: Copyright 2010-2011 Ettus Research LLC -License: GPL-3+ - -Files: firmware/zpu/apps* firmware/zpu/bin/* firmware/zpu/lib/* - firmware/zpu/lwip/*.h firmware/zpu/usrp2/* -Copyright: Copyright 2007-2009 Free Software Foundation, Inc. -License: GPL-3+ - -Files: firmware/zpu/lwip/lwip-1.3.1 -Copyright: (c) 2001-2004 Swedish Institute of Computer Science. License: lwip-BSD * Redistribution and use in source and binary forms, with or without modification, * are permitted provided that the following conditions are met: @@ -156,52 +779,7 @@ License: lwip-BSD * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING * IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY * OF SUCH DAMAGE. -Comment: liIP Author Adam Dunkels <adam@sics.se> - http://savannah.nongnu.org/projects/lwip/ - Also includes other BSD licensed code from additional copyright - holders outlined in detail below... - -Files: firmware/zpu/lwip/lwip-1.3.1/src/core/dns.c firmware/zpu/lwip/lwip-1.3.1/src/include/lwip/dns.h -Copyright: (c) 2002-2003, Adam Dunkels. -License: lwip-BSD -Comments: - * Port to lwIP from uIP - * by Jim Pettinato April 2007 - * ported from uIP resolv.c - -Files: firmware/zpu/lwip/lwip-1.3.1/src/core/ipv4/autoip.c firmware/zpu/lwip/lwip-1.3.1/src/include/ipv4/lwip/autoip.h -Copyright: (c) 2007 Dominik Spies <kontakt@dspies.de> - * All rights reserved. -License: lwip-BSD - -Files: firmware/zpu/lwip/lwip-1.3.1/src/core/dhcp.c - firmware/zpu/lwip/lwip-1.3.1/src/netif/etharp.c - firmware/zpu/lwip/lwip-1.3.1/src/include/netif/etharp.h - firmware/zpu/lwip/lwip-1.3.1/src/include/lwip/snmp.h -Copyright: (c) 2001-2004 Leon Woestenberg <leon.woestenberg@gmx.net> -License: lwip-BSD -Files: firmware/zpu/lwip/lwip-1.3.1/src/include/netif/etharp.h - firmware/zpu/lwip/lwip-1.3.1/src/include/lwip/snmp.h - firmware/zpu/lwip/lwip-1.3.1/src/include/lwip/snmp_asn1.h - firmware/zpu/lwip/lwip-1.3.1/src/include/lwip/snmp_msg.h - firmware/zpu/lwip/lwip-1.3.1/src/include/lwip/snmp_structs.h - firmware/zpu/lwip/lwip-1.3.1/src/core/dhcp.c - firmware/zpu/lwip/lwip-1.3.1/src/core/snmp/mib2.c - firmware/zpu/lwip/lwip-1.3.1/src/core/snmp/msg_out.c - firmware/zpu/lwip/lwip-1.3.1/src/core/snmp/msg_in.c - firmware/zpu/lwip/lwip-1.3.1/src/core/snmp/asn1_dec.c - firmware/zpu/lwip/lwip-1.3.1/src/core/snmp/asn1_enc.c - firmware/zpu/lwip/lwip-1.3.1/src/core/snmp/mib_structs.c - firmware/zpu/lwip/lwip-1.3.1/src/netif/etharp.c -Copyright: (c) 2001-2004,2006 Axon Digital Design B.V., The Netherlands. -License: lwip-BSD -Comment: Christiaan Simons <christiaan.simons@axon.tv> - -Files: firmware/zpu/lwip/lwip-1.3.1/src/netif/ppp/pppdebug.h: -Copyright: (c) 2003 by Marc Boucher, Services Informatiques (MBSI) inc. - portions Copyright (c) 1998 Global Election Systems Inc. - portions Copyright (c) 2001 by Cognizant Pty Ltd. License: MBSI-BSD * The authors hereby grant permission to use, copy, modify, distribute, * and license this software and its documentation for any purpose, provided @@ -221,37 +799,7 @@ License: MBSI-BSD * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. -Files: firmware/zpu/lwip/lwip-1.3.1/src/netif/ppp/randm.c firmware/zpu/lwip/lwip-1.3.1/src/netif/ppp/randm.h -Copyright: (c) 2003 by Marc Boucher, Services Informatiques (MBSI) inc. - Copyright (c) 1998 Global Election Systems Inc. -License: MBSI-BSD -Comments: - * 03-01-01 Marc Boucher <marc@mbsi.ca> - * Ported to lwIP. - * 98-06-03 Guy Lancaster <lancasterg@acm.org>, Global Election Systems Inc. - * Extracted from avos. - -Files: firmware/zpu/lwip/lwip-1.3.1/src/netif/ppp/chpms.c firmware/zpu/lwip/lwip-1.3.1/src/netif/ppp/chpms.h - firmware/zpu/lwip/lwip-1.3.1/src/netif/ppp/chap.c firmware/zpu/lwip/lwip-1.3.1/src/netif/ppp/chap.h -Copyright: (c) 2003 by Marc Boucher, Services Informatiques (MBSI) inc. - portions Copyright (c) 1998 Global Election Systems Inc. -License: MBSI-BSD - -Files: firmware/zpu/lwip/lwip-1.3.1/src/netif/ppp/auth.c firmware/zpu/lwip/lwip-1.3.1/src/netif/ppp/auth.h - firmware/zpu/lwip/lwip-1.3.1/src/netif/ppp/magic.c firmware/zpu/lwip/lwip-1.3.1/src/netif/ppp/magic.h - firmware/zpu/lwip/lwip-1.3.1/src/netif/ppp/fsm.c firmware/zpu/lwip/lwip-1.3.1/src/netif/ppp/fsm.h - firmware/zpu/lwip/lwip-1.3.1/src/netif/ppp/ppp.c firmware/zpu/lwip/lwip-1.3.1/src/netif/ppp/ppp.h - firmware/zpu/lwip/lwip-1.3.1/src/netif/ppp/pap.c firmware/zpu/lwip/lwip-1.3.1/src/netif/ppp/pap.h - firmware/zpu/lwip/lwip-1.3.1/src/netif/ppp/lcp.c firmware/zpu/lwip/lwip-1.3.1/src/netif/ppp/lcp.h - firmware/zpu/lwip/lwip-1.3.1/src/netif/ppp/ipcp.c firmware/zpu/lwip/lwip-1.3.1/src/netif/ppp/ipcp.h -Copyright: (c) 2003 by Marc Boucher, Services Informatiques (MBSI) inc. - portions Copyright (c) 1997,1998 by Global Election Systems Inc. -License: MBSI-BSD - -Files: firmware/zpu/lwip/lwip-1.3.1/src/netif/ppp/chpms.c firmware/zpu/lwip/lwip-1.3.1/src/netif/ppp/chpms.h -Copyright: (c) 1995 Eric Rosenquist, Strata Software Limited. - * All rights reserved. -License: +License: Rosenquist * Redistribution and use in source and binary forms are permitted * provided that the above copyright notice and this paragraph are * duplicated in all such forms and that any documentation, @@ -264,12 +812,8 @@ License: * THIS SOFTWARE IS PROVIDED ``AS IS'' AND WITHOUT ANY EXPRESS OR * IMPLIED WARRANTIES, INCLUDING, WITHOUT LIMITATION, THE IMPLIED * WARRANTIES OF MERCHANTIBILITY AND FITNESS FOR A PARTICULAR PURPOSE. -Comments: http://www.strataware.com/ -Files: firmware/zpu/lwip/lwip-1.3.1/src/netif/ppp/chap.c firmware/zpu/lwip/lwip-1.3.1/src/netif/ppp/chap.h -Copyright: (c) 1991 Gregory M. Christy - * All rights reserved. -License: +License: Christy * Redistribution and use in source and binary forms are permitted * provided that the above copyright notice and this paragraph are * duplicated in all such forms and that any documentation, @@ -283,12 +827,7 @@ License: * IMPLIED WARRANTIES, INCLUDING, WITHOUT LIMITATION, THE IMPLIED * WARRANTIES OF MERCHANTIBILITY AND FITNESS FOR A PARTICULAR PURPOSE. -Files: firmware/zpu/lwip/lwip-1.3.1/src/netif/ppp/ppp.c firmware/zpu/lwip/lwip-1.3.1/src/netif/ppp/ppp.h - firmware/zpu/lwip/lwip-1.3.1/src/netif/ppp/auth.c - firmware/zpu/lwip/lwip-1.3.1/src/netif/ppp/chap.c firmware/zpu/lwip/lwip-1.3.1/src/netif/ppp/chap.h -Copyright: (c) 1993,1994 The Australian National University. - * All rights reserved. -License: +License: Australian-National-University * Permission to use, copy, modify, and distribute this software and its * documentation is hereby granted, provided that the above copyright * notice appears in all copies. This software is provided without any @@ -309,16 +848,7 @@ License: * OBLIGATION TO PROVIDE MAINTENANCE, SUPPORT, UPDATES, ENHANCEMENTS, * OR MODIFICATIONS. -Files: firmware/zpu/lwip/lwip-1.3.1/src/netif/ppp/ppp.c firmware/zpu/lwip/lwip-1.3.1/src/netif/ppp/ppp.h - firmware/zpu/lwip/lwip-1.3.1/src/netif/ppp/auth.c firmware/zpu/lwip/lwip-1.3.1/src/netif/ppp/auth.h - firmware/zpu/lwip/lwip-1.3.1/src/netif/ppp/pap.c firmware/zpu/lwip/lwip-1.3.1/src/netif/ppp/pap.h - firmware/zpu/lwip/lwip-1.3.1/src/netif/ppp/lcp.c firmware/zpu/lwip/lwip-1.3.1/src/netif/ppp/lcp.h - firmware/zpu/lwip/lwip-1.3.1/src/netif/ppp/ipcp.c firmware/zpu/lwip/lwip-1.3.1/src/netif/ppp/ipcp.h - firmware/zpu/lwip/lwip-1.3.1/src/netif/ppp/fsm.c firmware/zpu/lwip/lwip-1.3.1/src/netif/ppp/fsm.h - firmware/zpu/lwip/lwip-1.3.1/src/netif/ppp/magic.c firmware/zpu/lwip/lwip-1.3.1/src/netif/ppp/magic.h -Copyright: (c) 1989 Carnegie Mellon University. - * All rights reserved. -License: +License: Carnegie-Mellon-University * Redistribution and use in source and binary forms are permitted * provided that the above copyright notice and this paragraph are * duplicated in all such forms and that any documentation, @@ -331,13 +861,6 @@ License: * IMPLIED WARRANTIES, INCLUDING, WITHOUT LIMITATION, THE IMPLIED * WARRANTIES OF MERCHANTIBILITY AND FITNESS FOR A PARTICULAR PURPOSE. -Files: firmware/zpu/lwip/lwip-1.3.1/src/netif/ppp/ppp_oe.c firmware/zpu/lwip/lwip-1.3.1/src/include/netif/ppp_oe.h -Copyright: (c) 2006 by Marc Boucher, Services Informatiques (MBSI) inc. -License: MBSI-BSD - -Files: firmware/zpu/lwip/lwip-1.3.1/src/core/ipv4/igmp.c firmware/zpu/lwip/lwip-1.3.1/src/include/ipv4/lwip/igmp.h -Copyright: (c) 2002 CITEL Technologies Ltd. - * All rights reserved. License: CITEL-BSD * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions @@ -368,8 +891,6 @@ License: CITEL-BSD * are specifically granted permission to redistribute this * source code. -Files: firmware/zpu/lwip/lwip-1.3.1/src/netif/ppp/ppp_oe.c firmware/zpu/lwip/lwip-1.3.1/src/include/netif/ppp_oe.h -Copyright: (c) 2002 The NetBSD Foundation, Inc. License: NetBSD * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions @@ -398,15 +919,7 @@ License: NetBSD * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE * POSSIBILITY OF SUCH DAMAGE. -Comments: - /* based on NetBSD: if_pppoe.c,v 1.64 2006/01/31 23:50:15 martin Exp */ - * This code is derived from software contributed to The NetBSD Foundation - * by Martin Husemann <martin@NetBSD.org>. -Files: firmware/zpu/lwip/lwip-1.3.1/src/netif/ppp/vj.c - firmware/zpu/lwip/lwip-1.3.1/src/netif/ppp/vj.h -Copyright: (c) 1989 Regents of the University of California. - * All rights reserved. License: VJ-BSD * Redistribution and use in source and binary forms are permitted * provided that the above copyright notice and this paragraph are @@ -419,20 +932,7 @@ License: VJ-BSD * THIS SOFTWARE IS PROVIDED ``AS IS'' AND WITHOUT ANY EXPRESS OR * IMPLIED WARRANTIES, INCLUDING, WITHOUT LIMITATION, THE IMPLIED * WARRANTIES OF MERCHANTIBILITY AND FITNESS FOR A PARTICULAR PURPOSE. -Comments: - * Van Jacobson (van@helios.ee.lbl.gov), Dec 31, 1989: - * Initial distribution. - * - * Modified June 1993 by Paul Mackerras, paulus@cs.anu.edu.au, - * so that the entire packet being decompressed doesn't have - * to be in contiguous memory (just the compressed header). - * - * Modified March 1998 by Guy Lancaster, glanca@gesn.com, - * for a 16 bit processor. -Files: firmware/zpu/lwip/lwip-1.3.1/src/netif/ppp/md5.c - firmware/zpu/lwip/lwip-1.3.1/src/netif/ppp/md5.h -Copyright: (C) 1990, RSA Data Security, Inc. All rights reserved. License: RSA-BSD ** License to copy and use this software is granted provided that ** ** it is identified as the "RSA Data Security, Inc. MD5 Message- ** @@ -450,388 +950,9 @@ License: RSA-BSD ** is" without express or implied warranty of any kind. ** ** ** ** These notices must be retained in any copies of any part of this ** - ** documentation and/or software. ** + ** documentation and/or software. - -Files: fpga/* not listed below -Copyright: 2008-2012 Ettus Research LLC -License: GPL-3+ -Comment: Not used for uhd-host package - -Files: fpga/usrp2/opencores/spi_boot/COPYING - fpga/usrp1/rbf/rev2/Makefile.am - fpga/usrp1/rbf/Makefile.am - fpga/usrp1/rbf/rev4/Makefile.am - fpga/usrp1/Makefile.am - fpga/usrp1/gen_makefile_extra.py - fpga/usrp1/toplevel/mrfm/mrfm_fft.py - fpga/usrp1/toplevel/mrfm/mrfm.py - fpga/usrp1/toplevel/usrp_inband_usb/usrp_inband_usb.v -Copyright: Copyright (C) 1989,1991,2004-2007,2009 Free Software Foundation, Inc. -License: GPL-3+ - -Files: fpga/usrp1/sdr_lib/master_control.v fpga/usrp1/sdr_lib/atr_delay.v -Copyright: (C) 2007 Corgan Enterprises LLC -License: GPL-2+ - -Files: fpga/usrp1/sdr_lib/master_control_multi.v - fpga/usrp1/toplevel/include/common_config_2rx_0tx.vh - fpga/usrp1/toplevel/include/common_config_2rxhb_0tx.vh - fpga/usrp1/toplevel/usrp_multi/config.vh - fpga/usrp1/toplevel/usrp_multi/usrp_multi.v -Copyright: (C) 2006 Martin Dudok van Heel -License: GPL-2+ - -Files: fpga/usrp2/sdr_lib/round_reg.v - fpga/usrp2/sdr_lib/ddc.v - fpga/usrp2/sdr_lib/cordic_z24.v - fpga/usrp2/sdr_lib/duc.v - fpga/usrp2/sdr_lib/cordic_stage.v - fpga/usrp2/sdr_lib/cic_interp.v - fpga/usrp2/sdr_lib/clip.v - fpga/usrp2/sdr_lib/clip_reg.v - fpga/usrp2/sdr_lib/round.v - fpga/usrp2/sdr_lib/cordic.v - fpga/usrp2/sdr_lib/cic_dec_shifter.v - fpga/usrp2/sdr_lib/hb/halfband_decim.v - fpga/usrp2/sdr_lib/clip_and_round.v - fpga/usrp2/sdr_lib/round_tb.v - fpga/usrp2/sdr_lib/cic_decim.v - fpga/usrp2/sdr_lib/cic_int_shifter.v - fpga/usrp2/sdr_lib/clip_and_round_reg.v - fpga/usrp2/sdr_lib/cic_strober.v - fpga/usrp2/sdr_lib/sign_extend.v - fpga/usrp1/sdr_lib/ddc.v - fpga/usrp1/sdr_lib/master_control.v - fpga/usrp1/sdr_lib/clk_divider.v - fpga/usrp1/sdr_lib/tx_chain_hb.v - fpga/usrp1/sdr_lib/duc.v - fpga/usrp1/sdr_lib/tx_buffer.v - fpga/usrp1/sdr_lib/cordic_stage.v - fpga/usrp1/sdr_lib/cic_interp.v - fpga/usrp1/sdr_lib/rx_chain_dual.v - fpga/usrp1/sdr_lib/cordic.v - fpga/usrp1/sdr_lib/rx_chain.v - fpga/usrp1/sdr_lib/cic_dec_shifter.v - fpga/usrp1/sdr_lib/hb/halfband_decim.v - fpga/usrp1/sdr_lib/dpram.v - fpga/usrp1/sdr_lib/ext_fifo.v - fpga/usrp1/sdr_lib/cic_decim.v - fpga/usrp1/sdr_lib/rx_buffer.v - fpga/usrp1/sdr_lib/strobe_gen.v - fpga/usrp1/sdr_lib/serial_io.v - fpga/usrp1/sdr_lib/cic_int_shifter.v - fpga/usrp1/sdr_lib/gen_sync.v - fpga/usrp1/sdr_lib/tx_chain.v - fpga/usrp1/sdr_lib/sign_extend.v - fpga/usrp1/sdr_lib/io_pins.v - fpga/usrp1/sdr_lib/phase_acc.v - fpga/usrp1/tb/interp_tb.v - fpga/usrp1/tb/decim_tb.v - fpga/usrp1/tb/justinterp_tb.v - fpga/usrp1/tb/usrp_tasks.v - fpga/usrp1/tb/cordic_tb.v - fpga/usrp1/tb/fullchip_tb.v - fpga/usrp1/models/pll.v - fpga/usrp1/toplevel/usrp_std/usrp_std.v - fpga/usrp1/toplevel/usrp_std/config.vh - fpga/usrp1/toplevel/include/common_config_bottom.vh - fpga/usrp1/toplevel/include/common_config_2rx_0tx.vh - fpga/usrp1/toplevel/include/common_config_2rxhb_0tx.vh - fpga/usrp1/toplevel/include/common_config_4rx_0tx.vh - fpga/usrp1/toplevel/include/common_config_1rxhb_1tx.vh - fpga/usrp1/toplevel/include/common_config_2rxhb_2tx.vh - fpga/usrp1/toplevel/mrfm/shifter.v - fpga/usrp1/toplevel/mrfm/mrfm.v - fpga/usrp1/toplevel/sizetest/sizetest.v - fpga/usrp1/toplevel/usrp_inband_usb/usrp_inband_usb.v - fpga/usrp1/toplevel/usrp_inband_usb/config.vh - fpga/usrp1/toplevel/usrp_multi/config.vh - fpga/usrp1/toplevel/usrp_multi/usrp_multi.v -Copyright: (C) 2003-2008 Matt Ettus -License: GPL-3+ - -Files: fpga/usrp2/sdr_lib/integrate.v - fpga/usrp2/sdr_lib/hb_interp.v - fpga/usrp2/sdr_lib/Makefile.srcs - fpga/usrp2/sdr_lib/small_hb_int_tb.v - fpga/usrp2/sdr_lib/dspengine_8to16.v - fpga/usrp2/sdr_lib/pipectrl.v - fpga/usrp2/sdr_lib/add2.v - fpga/usrp2/sdr_lib/add2_and_round.v - fpga/usrp2/sdr_lib/hb_dec.v - fpga/usrp2/sdr_lib/med_hb_int.v - fpga/usrp2/sdr_lib/small_hb_dec_tb.v - fpga/usrp2/sdr_lib/halfband_tb.v - fpga/usrp2/sdr_lib/tx_control.v - fpga/usrp2/sdr_lib/small_hb_dec.v - fpga/usrp2/sdr_lib/dsp_rx_glue.v - fpga/usrp2/sdr_lib/hb_dec_tb.v - fpga/usrp2/sdr_lib/rx_dcoffset_tb.v - fpga/usrp2/sdr_lib/rssi.v - fpga/usrp2/sdr_lib/hb/ram16_2sum.v - fpga/usrp2/sdr_lib/hb/ram16_2port.v - fpga/usrp2/sdr_lib/hb/ram32_2sum.v - fpga/usrp2/sdr_lib/hb/halfband_interp.v - fpga/usrp2/sdr_lib/hb/hbd_tb/test_hbd.v - fpga/usrp2/sdr_lib/hb/mac.v - fpga/usrp2/sdr_lib/hb/acc.v - fpga/usrp2/sdr_lib/hb/mult.v - fpga/usrp2/sdr_lib/hb/coeff_ram.v - fpga/usrp2/sdr_lib/hb/coeff_rom.v - fpga/usrp2/sdr_lib/duc_chain.v - fpga/usrp2/sdr_lib/acc.v - fpga/usrp2/sdr_lib/dspengine_16to8.v - fpga/usrp2/sdr_lib/hb_interp_tb.v - fpga/usrp2/sdr_lib/hb_tb.v - fpga/usrp2/sdr_lib/rx_dcoffset.v - fpga/usrp2/sdr_lib/dummy_rx.v - fpga/usrp2/sdr_lib/halfband_ideal.v - fpga/usrp2/sdr_lib/dsp_tx_glue.v - fpga/usrp2/sdr_lib/pipestage.v - fpga/usrp2/sdr_lib/ddc_chain.v - fpga/usrp2/sdr_lib/add2_reg.v - fpga/usrp2/sdr_lib/small_hb_int.v - fpga/usrp2/sdr_lib/add2_and_round_reg.v - fpga/usrp2/sdr_lib/rx_control.v - fpga/usrp2/serdes/Makefile.srcs - fpga/usrp2/serdes/serdes.v - fpga/usrp2/serdes/serdes_rx.v - fpga/usrp2/serdes/serdes_tx.v - fpga/usrp2/serdes/serdes_fc_tx.v - fpga/usrp2/serdes/serdes_fc_rx.v - fpga/usrp2/serdes/serdes_tb.v - fpga/usrp2/fifo/dsp_framer36.v - fpga/usrp2/fifo/Makefile.srcs - fpga/usrp2/fifo/fifo36_to_fifo19.v - fpga/usrp2/fifo/fifo19_mux.v - fpga/usrp2/fifo/packet_tb.v - fpga/usrp2/fifo/buffer_int2.v - fpga/usrp2/fifo/fifo19_to_ll8.v - fpga/usrp2/fifo/packet_verifier.v - fpga/usrp2/fifo/buffer_int.v - fpga/usrp2/fifo/fifo_2clock.v - fpga/usrp2/fifo/fifo19_pad.v - fpga/usrp2/fifo/packet_generator32.v - fpga/usrp2/fifo/fifo36_to_ll8.v - fpga/usrp2/fifo/packet_verifier32.v - fpga/usrp2/fifo/fifo_19to36_tb.v - fpga/usrp2/fifo/packet_dispatcher36_x3.v - fpga/usrp2/fifo/buffer_pool_tb.v - fpga/usrp2/fifo/fifo_2clock_cascade.v - fpga/usrp2/fifo/fifo_tb.v - fpga/usrp2/fifo/fifo72_to_fifo36.v - fpga/usrp2/fifo/fifo36_to_fifo72.v - fpga/usrp2/fifo/packet_router.v - fpga/usrp2/fifo/fifo19_to_fifo36.v - fpga/usrp2/fifo/crossbar36.v - fpga/usrp2/fifo/splitter36.v - fpga/usrp2/fifo/fifo_long.v - fpga/usrp2/fifo/buffer_int_tb.v - fpga/usrp2/fifo/packet32_tb.v - fpga/usrp2/fifo/fifo_short.v - fpga/usrp2/fifo/ll8_to_fifo19.v - fpga/usrp2/fifo/ll8_shortfifo.v - fpga/usrp2/fifo/packet_generator.v - fpga/usrp2/fifo/fifo_pacer.v - fpga/usrp2/fifo/fifo36_mux.v - fpga/usrp2/fifo/ll8_to_fifo36.v - fpga/usrp2/fifo/fifo36_demux.v - fpga/usrp2/fifo/buffer_pool.v - fpga/usrp2/fifo/fifo_cascade.v - fpga/usrp2/fifo/add_routing_header.v - fpga/usrp2/fifo/valve36.v - fpga/usrp2/control_lib/Makefile.srcs - fpga/usrp2/control_lib/bin2gray.v - fpga/usrp2/control_lib/mux_32_4.v - fpga/usrp2/control_lib/mux8.v - fpga/usrp2/control_lib/srl.v - fpga/usrp2/control_lib/settings_bus_16LE.v - fpga/usrp2/control_lib/reset_sync.v - fpga/usrp2/control_lib/ram_harv_cache.v - fpga/usrp2/control_lib/quad_uart.v - fpga/usrp2/control_lib/gray2bin.v - fpga/usrp2/control_lib/user_settings.v - fpga/usrp2/control_lib/wb_output_pins32.v - fpga/usrp2/control_lib/double_buffer.v - fpga/usrp2/control_lib/shortfifo.v - fpga/usrp2/control_lib/oneshot_2clk.v - fpga/usrp2/control_lib/ram_harvard.v - fpga/usrp2/control_lib/settings_bus.v - fpga/usrp2/control_lib/sd_spi_wb.v - fpga/usrp2/control_lib/wb_bridge_16_32.v - fpga/usrp2/control_lib/clock_control.v - fpga/usrp2/control_lib/longfifo.v - fpga/usrp2/control_lib/dbsm.v - fpga/usrp2/control_lib/simple_uart.v - fpga/usrp2/control_lib/bootram.v - fpga/usrp2/control_lib/sd_spi_tb.v - fpga/usrp2/control_lib/system_control.v - fpga/usrp2/control_lib/wb_semaphore.v - fpga/usrp2/control_lib/dpram32.v - fpga/usrp2/control_lib/dcache.v - fpga/usrp2/control_lib/clock_bootstrap_rom.v - fpga/usrp2/control_lib/v5icap_wb.v - fpga/usrp2/control_lib/s3a_icap_wb.v - fpga/usrp2/control_lib/priority_enc.v - fpga/usrp2/control_lib/simple_uart_tx.v - fpga/usrp2/control_lib/wb_regfile_2clock.v - fpga/usrp2/control_lib/gray_send.v - fpga/usrp2/control_lib/decoder_3_8.v - fpga/usrp2/control_lib/wb_ram_dist.v - fpga/usrp2/control_lib/wb_bus_writer.v - fpga/usrp2/control_lib/traffic_cop.v - fpga/usrp2/control_lib/icache.v - fpga/usrp2/control_lib/setting_reg.v - fpga/usrp2/control_lib/wb_sim.v - fpga/usrp2/control_lib/atr_controller16.v - fpga/usrp2/control_lib/ram_2port_mixed_width.v - fpga/usrp2/control_lib/atr_controller.v - fpga/usrp2/control_lib/ram_2port.v - fpga/usrp2/control_lib/ss_rcvr.v - fpga/usrp2/control_lib/wb_readback_mux_16LE.v - fpga/usrp2/control_lib/ram_harvard2.v - fpga/usrp2/control_lib/settings_bus_crossclock.v - fpga/usrp2/control_lib/fifo_to_wb.v - fpga/usrp2/control_lib/mux4.v - fpga/usrp2/control_lib/fifo_to_wb_tb.v - fpga/usrp2/control_lib/double_buffer_tb.v - fpga/usrp2/control_lib/medfifo.v - fpga/usrp2/control_lib/simple_uart_rx.v - fpga/usrp2/control_lib/ram_loader.v - fpga/usrp2/control_lib/system_control_tb.v - fpga/usrp2/control_lib/ram_wb_harvard.v - fpga/usrp2/control_lib/spi.v - fpga/usrp2/control_lib/sd_spi.v - fpga/usrp2/control_lib/clock_control_tb.v - fpga/usrp2/control_lib/wb_ram_block.v - fpga/usrp2/control_lib/gpio_atr.v - fpga/usrp2/control_lib/wb_readback_mux.v - fpga/usrp2/udp/Makefile.srcs - fpga/usrp2/udp/add_onescomp.v - fpga/usrp2/udp/prot_eng_tx_tb.v - fpga/usrp2/udp/udp_wrapper.v - fpga/usrp2/udp/prot_eng_tx.v - fpga/usrp2/udp/fifo19_rxrealign.v - fpga/usrp2/udp/prot_eng_rx.v - fpga/usrp2/opencores/Makefile.srcs - fpga/usrp2/gpif/Makefile.srcs - fpga/usrp2/gpif/packet_reframer.v - fpga/usrp2/gpif/packet_splitter.v - fpga/usrp2/gpif/gpif_wr_tb.v - fpga/usrp2/gpif/slave_fifo.v - fpga/usrp2/gpif/gpif_tb.v - fpga/usrp2/gpif/gpif_wr.v - fpga/usrp2/gpif/gpif.v - fpga/usrp2/gpif/gpif_rd.v - fpga/usrp2/gpif/packet_splitter_tb.v - fpga/usrp2/testbench/single_u2_sim.v - fpga/usrp2/coregen/Makefile.srcs - fpga/usrp2/vrt/Makefile.srcs - fpga/usrp2/vrt/vita_rx_control.v - fpga/usrp2/vrt/gen_context_pkt.v - fpga/usrp2/vrt/vita_rx_tb.v - fpga/usrp2/vrt/vita_tx_chain.v - fpga/usrp2/vrt/trigger_context_pkt.v - fpga/usrp2/vrt/vita_pkt_gen.v - fpga/usrp2/vrt/vita_rx_chain.v - fpga/usrp2/vrt/vita_tx_deframer.v - fpga/usrp2/vrt/vita_tx_engine_glue.v - fpga/usrp2/vrt/vita_rx_framer.v - fpga/usrp2/vrt/vita_tx_control.v - fpga/usrp2/vrt/vita_rx_engine_glue.v - fpga/usrp2/vrt/vita_tx_tb.v - fpga/usrp2/timing/Makefile.srcs - fpga/usrp2/timing/time_compare.v - fpga/usrp2/timing/timer.v - fpga/usrp2/timing/time_transfer_tb.v - fpga/usrp2/timing/time_sender.v - fpga/usrp2/timing/time_64bit.v - fpga/usrp2/timing/time_sync.v - fpga/usrp2/timing/time_receiver.v - fpga/usrp2/timing/simple_timer.v - fpga/usrp2/gpmc/Makefile.srcs - fpga/usrp2/gpmc/cross_clock_reader.v - fpga/usrp2/gpmc/gpmc_wb.v - fpga/usrp2/gpmc/fifo_to_gpmc.v - fpga/usrp2/gpmc/gpmc_to_fifo.v - fpga/usrp2/gpmc/gpmc.v - fpga/usrp2/simple_gemac/eth_tasks_f36.v - fpga/usrp2/simple_gemac/Makefile.srcs - fpga/usrp2/simple_gemac/crc.v - fpga/usrp2/simple_gemac/flow_ctrl_rx.v - fpga/usrp2/simple_gemac/simple_gemac_wrapper_tb.v - fpga/usrp2/simple_gemac/simple_gemac.v - fpga/usrp2/simple_gemac/simple_gemac_tx.v - fpga/usrp2/simple_gemac/simple_gemac_tb.v - fpga/usrp2/simple_gemac/ll8_to_txmac.v - fpga/usrp2/simple_gemac/simple_gemac_wb.v - fpga/usrp2/simple_gemac/simple_gemac_wrapper.v - fpga/usrp2/simple_gemac/rxmac_to_ll8.v - fpga/usrp2/simple_gemac/flow_ctrl_tx.v - fpga/usrp2/simple_gemac/eth_tasks.v - fpga/usrp2/simple_gemac/ethtx_realign.v - fpga/usrp2/simple_gemac/address_filter.v - fpga/usrp2/simple_gemac/simple_gemac_wrapper_f36_tb.v - fpga/usrp2/simple_gemac/simple_gemac_rx.v - fpga/usrp2/simple_gemac/delay_line.v - fpga/usrp2/simple_gemac/address_filter_promisc.v - fpga/usrp2/simple_gemac/ethrx_realign.v - fpga/usrp2/simple_gemac/eth_tasks_f19.v - fpga/usrp2/models/M24LC02B.v - fpga/usrp2/models/CY7C1356C/cy1356.v - fpga/usrp2/models/CY7C1356C/testbench.v - fpga/usrp2/models/cpld_model.v - fpga/usrp2/models/adc_model.v - fpga/usrp2/models/serdes_model.v - fpga/usrp2/models/MULT18X18S.v - fpga/usrp2/models/gpmc_model_async.v - fpga/usrp2/models/xlnx_glbl.v - fpga/usrp2/models/gpmc_model_sync.v - fpga/usrp2/models/miim_model.v - fpga/usrp2/models/uart_rx.v - fpga/usrp2/models/M24LC024B.v - fpga/usrp2/models/math_real.v - fpga/usrp2/custom/power_trig_tb.v - fpga/usrp2/custom/custom_dsp_tx.v - fpga/usrp2/custom/custom_engine_tx.v - fpga/usrp2/custom/custom_engine_rx.v - fpga/usrp2/custom/power_trig.v - fpga/usrp2/custom/custom_dsp_rx.v - fpga/usrp2/extramfifo/Makefile.srcs - fpga/usrp2/extramfifo/nobl_fifo.v - fpga/usrp2/extramfifo/refill_randomizer.v - fpga/usrp2/extramfifo/nobl_if.v - fpga/usrp2/extramfifo/ext_fifo.v - fpga/usrp2/extramfifo/test_sram_if.v - fpga/usrp2/extramfifo/ext_fifo_tb.v - fpga/usrp2/top/python/check_timing.py - fpga/usrp2/top/python/check_inout.py - fpga/usrp2/top/tcl/ise_helper.tcl - fpga/usrp2/top/USRP2/u2_rev3.v - fpga/usrp2/top/USRP2/u2_core.v - fpga/usrp2/top/USRP2/Makefile - fpga/usrp2/top/Makefile.common - fpga/usrp2/top/B100/u1plus.v - fpga/usrp2/top/B100/u1plus_core.v - fpga/usrp2/top/B100/B100.v - fpga/usrp2/top/B100/Makefile.B100 - fpga/usrp2/top/B100/Makefile - fpga/usrp2/top/N2x0/Makefile.N210R3 - fpga/usrp2/top/N2x0/u2plus.v - fpga/usrp2/top/N2x0/u2plus_core.v - fpga/usrp2/top/N2x0/capture_ddrlvds.v - fpga/usrp2/top/N2x0/Makefile.N200R4 - fpga/usrp2/top/N2x0/Makefile.N200R3 - fpga/usrp2/top/N2x0/Makefile.N210R4 - fpga/usrp2/top/N2x0/Makefile -Copyright: 2008-2012 Ettus Research LLC -License: GPL-3+ - -Files: fpga/usrp1/megacells/* - fpga/usrp1/toplevel/*.qsf fpga/usrp1/toplevel/*.qpf -Copyright: (C) 1991-2004 Altera Corporation -License: +License: Altera-boilerplate Any megafunction design, and related netlist (encrypted or decrypted), support information, device programming or simulation file, and any other associated documentation or information provided by Altera or a partner @@ -850,25 +971,8 @@ License: partner, remains with Altera, the megafunction partner, or their respective licensors. No other licenses, including any licenses needed under any third party's intellectual property, are provided herein. -Comment: Boilerplate terms prepended to files which include design - parameters for the project licensed GPL-3+. - . - Not used for uhd-host package. -Files: fpga/usrp2/coregen/fifo* - fpga/usrp2/models/FIFO_GENERATOR_V4_3.v - fpga/usrp2/models/FIFO_GENERATOR_V4_3.v - fpga/usrp2/models/BUFG.v - fpga/usrp2/models/IOBUF.v - fpga/usrp2/models/RAMB16_S36_S36.v - fpga/usrp2/models/RAMB16_S36_S36.v - fpga/usrp2/models/SRLC16E.v - fpga/usrp2/models/SRL16E.v - fpga/usrp2/models/FIFO_GENERATOR_V6_1.v - fpga/usrp2/extramfifo/icon.v - fpga/usrp2/extramfifo/ila.v -Copyright: (c) 1995-2010 Xilinx, Inc. -License: +License: Xilinx-boilerplate This file is owned and controlled by Xilinx and must be used solely for design, simulation, implementation and creation of design files limited to Xilinx devices or technologies. Use @@ -888,14 +992,8 @@ License: REPRESENTATIONS THAT THIS IMPLEMENTATION IS FREE FROM CLAIMS OF INFRINGEMENT, IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE. -Comment: Boilerplate terms prepended to files which include design - parameters for the project licensed GPL-3+. - . - Not used for uhd-host package. -Files: fpga/usrp2/opencores/8b10b -Copyright: (c)2002 Chuck Benz, Hollis, NH -License: +License: Benz The information and description contained herein is the property of Chuck Benz. . @@ -904,9 +1002,7 @@ License: preserved. Modifications may be made as long as this notice is preserved. -Files: fpga/usrp2/opencores/aemb -Copyright: (C) 2004-2007 Shawn Tan Ser Ngiap <shawn.tan@aeste.net> -License: LGPL-3+ +License: AEMB-LGPL-3+ AEMB is free software: you can redistribute it and/or modify it under the terms of the GNU Lesser General Public License as published by the Free Software Foundation, either version 3 of the @@ -923,11 +1019,7 @@ License: LGPL-3+ On Debian systems, the complete text of the GNU Lesser General Public License can be found in `/usr/share/common-licenses/LGPL-3'. -Files: fpga/usrp2/opencores/i2c/* - fpga/usrp2/opencores/simple_gpio/* - fpga/usrp2/opencores/simple_pic/* -Copyright: (C) 2000,2001,2002,2004 Richard Herveille -License: +License: Herveille This source file may be used and distributed without restriction provided that this copyright statement is not removed from the file and that any derivative work contains @@ -945,12 +1037,9 @@ License: LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE - POSSIBILITY OF SUCH DAMAGE. - + POSSIBILITY OF SUCH DAMAGE. -Files: fpga/usrp2/opencores/spi -Copyright: (C) 2002 Simon Srot (simons@opencores.org) -License: +License: Srot-LGPL-2.1+ This source file may be used and distributed without restriction provided that this copyright statement is not removed from the file and that any derivative work contains @@ -975,8 +1064,6 @@ License: On Debian systems, the complete text of the GNU Lesser General Public License can be found in `/usr/share/common-licenses/LGPL-2.1'. -Files: fpga/usrp2/opencores/spi_boot/* -Copyright: (c) 2005, Arnim Laeuger (arniml@opencores.org) License: GPL-2 Redistribution and use in source and synthezised forms, with or without modification, are permitted provided that the following conditions are met: @@ -1010,15 +1097,8 @@ License: GPL-2 . The latest version of this file can be found at: http://www.opencores.org/projects.cgi/web/spi_boot/overview -Comment: - COPYING file is GPL-2. - . - On Debian systems, the complete text of the GNU General - Public License can be found in `/usr/share/common-licenses/GPL-2'. -Files: fpga/usrp2/opencores/wb_zbt -Copyright: (C) 2008 Sebastien Bourdeauducq - http://lekernel.net -License: LGPL-2+ +License: Milkymist-LGPL-2+ * Milkymist is free software; you can redistribute it and/or modify it * under the terms of the GNU Library General Public License as published * by the Free Software Foundation; either version 2, or (at your option) @@ -1034,9 +1114,7 @@ License: LGPL-2+ * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301, * USA. -Files: fpga/usrp2/opencores/zpu/* -Copyright: 2004-2008 oharboe - �yvind Harboe - oyvind.harboe@zylin.com -License: +License: zpu-FreeBSD The FreeBSD license . Redistribution and use in source and binary forms, with or without @@ -1066,108 +1144,3 @@ License: The views and conclusions contained in the software and documentation are those of the authors and should not be interpreted as representing official policies, either expressed or implied, of the ZPU Project. - -License: lwip-BSD - * Redistribution and use in source and binary forms, with or without modification, - * are permitted provided that the following conditions are met: - * - * 1. Redistributions of source code must retain the above copyright notice, - * this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright notice, - * this list of conditions and the following disclaimer in the documentation - * and/or other materials provided with the distribution. - * 3. The name of the author may not be used to endorse or promote products - * derived from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR IMPLIED - * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF - * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT - * SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, - * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT - * OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS - * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN - * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING - * IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY - * OF SUCH DAMAGE. - -License: MBSI-BSD - * The authors hereby grant permission to use, copy, modify, distribute, - * and license this software and its documentation for any purpose, provided - * that existing copyright notices are retained in all copies and that this - * notice and the following disclaimer are included verbatim in any - * distributions. No written agreement, license, or royalty fee is required - * for any of the authorized uses. - * - * THIS SOFTWARE IS PROVIDED BY THE CONTRIBUTORS *AS IS* AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES - * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. - * IN NO EVENT SHALL THE CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT - * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF - * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - -License: Kitware-BSD - Redistribution and use in source and binary forms, with or without - modification, are permitted provided that the following conditions - are met: - . - * Redistributions of source code must retain the above copyright - notice, this list of conditions and the following disclaimer. - . - * Redistributions in binary form must reproduce the above copyright - notice, this list of conditions and the following disclaimer in the - documentation and/or other materials provided with the distribution. - . - * Neither the names of Kitware, Inc., the Insight Software Consortium, - nor the names of their contributors may be used to endorse or promote - products derived from this software without specific prior written - permission. - . - THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR - A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT - HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, - SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT - LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE - OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - -License: GPL-2+ - This program is free software: you can redistribute it and/or modify - it under the terms of the GNU General Public License as published by - the Free Software Foundation, either version 2 of the License, or - (at your option) any later version. - . - This program is distributed in the hope that it will be useful, - but WITHOUT ANY WARRANTY; without even the implied warranty of - MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - GNU General Public License for more details. - . - You should have received a copy of the GNU General Public License - along with this program. If not, see <http://www.gnu.org/licenses/>. - . - On Debian systems, the complete text of the GNU General - Public License can be found in `/usr/share/common-licenses/GPL-3'. - -License: GPL-3+ - This program is free software: you can redistribute it and/or modify - it under the terms of the GNU General Public License as published by - the Free Software Foundation, either version 3 of the License, or - (at your option) any later version. - . - This program is distributed in the hope that it will be useful, - but WITHOUT ANY WARRANTY; without even the implied warranty of - MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - GNU General Public License for more details. - . - You should have received a copy of the GNU General Public License - along with this program. If not, see <http://www.gnu.org/licenses/>. - . - On Debian systems, the complete text of the GNU General - Public License can be found in `/usr/share/common-licenses/GPL-3'. |