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-rw-r--r--fpga/usrp3/lib/rfnoc/blocks/rfnoc_block_axi_ram_fifo/rfnoc_block_axi_ram_fifo_tb.sv2
-rw-r--r--fpga/usrp3/lib/rfnoc/blocks/rfnoc_block_fosphor/rfnoc_block_fosphor_tb.sv2
-rw-r--r--fpga/usrp3/lib/rfnoc/core/axis_pyld_ctxt_to_chdr.v2
-rw-r--r--fpga/usrp3/lib/rfnoc/crossbar/chdr_crossbar_nxn.v2
-rw-r--r--fpga/usrp3/lib/rfnoc/crossbar/chdr_xb_ingress_buff.v2
5 files changed, 5 insertions, 5 deletions
diff --git a/fpga/usrp3/lib/rfnoc/blocks/rfnoc_block_axi_ram_fifo/rfnoc_block_axi_ram_fifo_tb.sv b/fpga/usrp3/lib/rfnoc/blocks/rfnoc_block_axi_ram_fifo/rfnoc_block_axi_ram_fifo_tb.sv
index 5fc9e71fb..8830cd774 100644
--- a/fpga/usrp3/lib/rfnoc/blocks/rfnoc_block_axi_ram_fifo/rfnoc_block_axi_ram_fifo_tb.sv
+++ b/fpga/usrp3/lib/rfnoc/blocks/rfnoc_block_axi_ram_fifo/rfnoc_block_axi_ram_fifo_tb.sv
@@ -47,7 +47,7 @@ module rfnoc_block_axi_ram_fifo_tb #(
// Block configuration
localparam int NOC_ID = 'hF1F0_0000;
localparam int THIS_PORTID = 'h123;
- localparam int MTU = 12;
+ localparam int MTU = 10;
localparam int NUM_HB = 3;
localparam int CIC_MAX_DECIM = 255;
localparam int BURST_TIMEOUT = 64;
diff --git a/fpga/usrp3/lib/rfnoc/blocks/rfnoc_block_fosphor/rfnoc_block_fosphor_tb.sv b/fpga/usrp3/lib/rfnoc/blocks/rfnoc_block_fosphor/rfnoc_block_fosphor_tb.sv
index 3f46e4383..ac4ee4e2c 100644
--- a/fpga/usrp3/lib/rfnoc/blocks/rfnoc_block_fosphor/rfnoc_block_fosphor_tb.sv
+++ b/fpga/usrp3/lib/rfnoc/blocks/rfnoc_block_fosphor/rfnoc_block_fosphor_tb.sv
@@ -32,7 +32,7 @@ module rfnoc_block_fosphor_tb;
localparam int ITEM_W = 32;
localparam int NUM_PORTS_I = 1;
localparam int NUM_PORTS_O = 2;
- localparam int MTU = 13;
+ localparam int MTU = 10;
localparam int SPP = 128;
localparam int PKT_SIZE_BYTES = SPP * (ITEM_W/8);
localparam int STALL_PROB = 60; // Default BFM stall probability
diff --git a/fpga/usrp3/lib/rfnoc/core/axis_pyld_ctxt_to_chdr.v b/fpga/usrp3/lib/rfnoc/core/axis_pyld_ctxt_to_chdr.v
index c73d7f365..71f38fd8b 100644
--- a/fpga/usrp3/lib/rfnoc/core/axis_pyld_ctxt_to_chdr.v
+++ b/fpga/usrp3/lib/rfnoc/core/axis_pyld_ctxt_to_chdr.v
@@ -44,7 +44,7 @@ module axis_pyld_ctxt_to_chdr #(
parameter SYNC_CLKS = 0,
parameter CONTEXT_FIFO_SIZE = 1,
parameter PAYLOAD_FIFO_SIZE = 1,
- parameter MTU = 9,
+ parameter MTU = 10,
parameter CONTEXT_PREFETCH_EN = 1
)(
// Clock, reset and settings
diff --git a/fpga/usrp3/lib/rfnoc/crossbar/chdr_crossbar_nxn.v b/fpga/usrp3/lib/rfnoc/crossbar/chdr_crossbar_nxn.v
index 79f1a6626..edf182e31 100644
--- a/fpga/usrp3/lib/rfnoc/crossbar/chdr_crossbar_nxn.v
+++ b/fpga/usrp3/lib/rfnoc/crossbar/chdr_crossbar_nxn.v
@@ -45,7 +45,7 @@ module chdr_crossbar_nxn #(
parameter CHDR_W = 64,
parameter [7:0] NPORTS = 8,
parameter [7:0] DEFAULT_PORT = 0,
- parameter MTU = 9,
+ parameter MTU = 10,
parameter ROUTE_TBL_SIZE = 6,
parameter MUX_ALLOC = "ROUND-ROBIN",
parameter OPTIMIZE = "AREA",
diff --git a/fpga/usrp3/lib/rfnoc/crossbar/chdr_xb_ingress_buff.v b/fpga/usrp3/lib/rfnoc/crossbar/chdr_xb_ingress_buff.v
index dcb11da8e..1cc2fb94c 100644
--- a/fpga/usrp3/lib/rfnoc/crossbar/chdr_xb_ingress_buff.v
+++ b/fpga/usrp3/lib/rfnoc/crossbar/chdr_xb_ingress_buff.v
@@ -22,7 +22,7 @@
module chdr_xb_ingress_buff #(
parameter WIDTH = 64,
- parameter MTU = 5,
+ parameter MTU = 10,
parameter DEST_W = 4,
parameter [9:0] NODE_ID = 0
) (