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-rw-r--r--fpga/usrp3/lib/rfnoc/blocks/rfnoc_block_addsub/Makefile3
-rw-r--r--fpga/usrp3/lib/rfnoc/blocks/rfnoc_block_ddc/Makefile3
-rw-r--r--fpga/usrp3/lib/rfnoc/blocks/rfnoc_block_duc/Makefile3
-rw-r--r--fpga/usrp3/lib/rfnoc/blocks/rfnoc_block_logpwr/Makefile3
-rw-r--r--fpga/usrp3/lib/rfnoc/blocks/rfnoc_block_siggen/Makefile3
-rw-r--r--fpga/usrp3/lib/rfnoc/blocks/rfnoc_block_vector_iir/Makefile3
-rw-r--r--fpga/usrp3/lib/rfnoc/blocks/rfnoc_block_window/Makefile3
-rw-r--r--fpga/usrp3/top/x400/rf/sim/Makefile3
8 files changed, 8 insertions, 16 deletions
diff --git a/fpga/usrp3/lib/rfnoc/blocks/rfnoc_block_addsub/Makefile b/fpga/usrp3/lib/rfnoc/blocks/rfnoc_block_addsub/Makefile
index 0c825f41d..2bca6ddf8 100644
--- a/fpga/usrp3/lib/rfnoc/blocks/rfnoc_block_addsub/Makefile
+++ b/fpga/usrp3/lib/rfnoc/blocks/rfnoc_block_addsub/Makefile
@@ -7,8 +7,7 @@
#-------------------------------------------------
# Top-of-Makefile
#-------------------------------------------------
-# Define BASE_DIR to point to the "top" dir. Note:
-# UHD_FPGA_DIR must be passed into this Makefile.
+# Define BASE_DIR to point to the "top" dir.
BASE_DIR = ../../../../top
# Include viv_sim_preample after defining BASE_DIR
include $(BASE_DIR)/../tools/make/viv_sim_preamble.mak
diff --git a/fpga/usrp3/lib/rfnoc/blocks/rfnoc_block_ddc/Makefile b/fpga/usrp3/lib/rfnoc/blocks/rfnoc_block_ddc/Makefile
index b63685ef7..cf2d5b036 100644
--- a/fpga/usrp3/lib/rfnoc/blocks/rfnoc_block_ddc/Makefile
+++ b/fpga/usrp3/lib/rfnoc/blocks/rfnoc_block_ddc/Makefile
@@ -7,8 +7,7 @@
#-------------------------------------------------
# Top-of-Makefile
#-------------------------------------------------
-# Define BASE_DIR to point to the "top" dir. Note:
-# UHD_FPGA_DIR must be passed into this Makefile.
+# Define BASE_DIR to point to the "top" dir.
BASE_DIR = ../../../../top
# Include viv_sim_preample after defining BASE_DIR
include $(BASE_DIR)/../tools/make/viv_sim_preamble.mak
diff --git a/fpga/usrp3/lib/rfnoc/blocks/rfnoc_block_duc/Makefile b/fpga/usrp3/lib/rfnoc/blocks/rfnoc_block_duc/Makefile
index c632e52f6..7b1d18a8f 100644
--- a/fpga/usrp3/lib/rfnoc/blocks/rfnoc_block_duc/Makefile
+++ b/fpga/usrp3/lib/rfnoc/blocks/rfnoc_block_duc/Makefile
@@ -7,8 +7,7 @@
#-------------------------------------------------
# Top-of-Makefile
#-------------------------------------------------
-# Define BASE_DIR to point to the "top" dir. Note:
-# UHD_FPGA_DIR must be passed into this Makefile.
+# Define BASE_DIR to point to the "top" dir.
BASE_DIR = ../../../../top
# Include viv_sim_preample after defining BASE_DIR
include $(BASE_DIR)/../tools/make/viv_sim_preamble.mak
diff --git a/fpga/usrp3/lib/rfnoc/blocks/rfnoc_block_logpwr/Makefile b/fpga/usrp3/lib/rfnoc/blocks/rfnoc_block_logpwr/Makefile
index cd8e2e45b..02d84e450 100644
--- a/fpga/usrp3/lib/rfnoc/blocks/rfnoc_block_logpwr/Makefile
+++ b/fpga/usrp3/lib/rfnoc/blocks/rfnoc_block_logpwr/Makefile
@@ -7,8 +7,7 @@
#-------------------------------------------------
# Top-of-Makefile
#-------------------------------------------------
-# Define BASE_DIR to point to the "top" dir. Note:
-# UHD_FPGA_DIR must be passed into this Makefile.
+# Define BASE_DIR to point to the "top" dir.
BASE_DIR = ../../../../top
# Include viv_sim_preample after defining BASE_DIR
include $(BASE_DIR)/../tools/make/viv_sim_preamble.mak
diff --git a/fpga/usrp3/lib/rfnoc/blocks/rfnoc_block_siggen/Makefile b/fpga/usrp3/lib/rfnoc/blocks/rfnoc_block_siggen/Makefile
index 8fffd1c2e..92720c8ad 100644
--- a/fpga/usrp3/lib/rfnoc/blocks/rfnoc_block_siggen/Makefile
+++ b/fpga/usrp3/lib/rfnoc/blocks/rfnoc_block_siggen/Makefile
@@ -7,8 +7,7 @@
#-------------------------------------------------
# Top-of-Makefile
#-------------------------------------------------
-# Define BASE_DIR to point to the "top" dir. Note:
-# UHD_FPGA_DIR must be passed into this Makefile.
+# Define BASE_DIR to point to the "top" dir.
BASE_DIR = ../../../../top
# Include viv_sim_preample after defining BASE_DIR
include $(BASE_DIR)/../tools/make/viv_sim_preamble.mak
diff --git a/fpga/usrp3/lib/rfnoc/blocks/rfnoc_block_vector_iir/Makefile b/fpga/usrp3/lib/rfnoc/blocks/rfnoc_block_vector_iir/Makefile
index 656b4d5c0..0d60a7b9a 100644
--- a/fpga/usrp3/lib/rfnoc/blocks/rfnoc_block_vector_iir/Makefile
+++ b/fpga/usrp3/lib/rfnoc/blocks/rfnoc_block_vector_iir/Makefile
@@ -7,8 +7,7 @@
#-------------------------------------------------
# Top-of-Makefile
#-------------------------------------------------
-# Define BASE_DIR to point to the "top" dir. Note:
-# UHD_FPGA_DIR must be passed into this Makefile.
+# Define BASE_DIR to point to the "top" dir.
BASE_DIR = ../../../../top
# Include viv_sim_preample after defining BASE_DIR
include $(BASE_DIR)/../tools/make/viv_sim_preamble.mak
diff --git a/fpga/usrp3/lib/rfnoc/blocks/rfnoc_block_window/Makefile b/fpga/usrp3/lib/rfnoc/blocks/rfnoc_block_window/Makefile
index f05034702..83c7c2916 100644
--- a/fpga/usrp3/lib/rfnoc/blocks/rfnoc_block_window/Makefile
+++ b/fpga/usrp3/lib/rfnoc/blocks/rfnoc_block_window/Makefile
@@ -7,8 +7,7 @@
#-------------------------------------------------
# Top-of-Makefile
#-------------------------------------------------
-# Define BASE_DIR to point to the "top" dir. Note:
-# UHD_FPGA_DIR must be passed into this Makefile.
+# Define BASE_DIR to point to the "top" dir.
BASE_DIR = ../../../../top
# Include viv_sim_preample after defining BASE_DIR
include $(BASE_DIR)/../tools/make/viv_sim_preamble.mak
diff --git a/fpga/usrp3/top/x400/rf/sim/Makefile b/fpga/usrp3/top/x400/rf/sim/Makefile
index 08b62f4fb..6d3996d38 100644
--- a/fpga/usrp3/top/x400/rf/sim/Makefile
+++ b/fpga/usrp3/top/x400/rf/sim/Makefile
@@ -7,8 +7,7 @@
#-------------------------------------------------
# Top-of-Makefile
#-------------------------------------------------
-# Define BASE_DIR to point to the "top" dir. Note:
-# UHD_FPGA_DIR must be passed into this Makefile.
+# Define BASE_DIR to point to the "top" dir.
BASE_DIR = ../../..
# Include viv_sim_preample after defining BASE_DIR
include $(BASE_DIR)/../tools/make/viv_sim_preamble.mak