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-rw-r--r--fpga/usrp3/top/e31x/e31x_rfnoc_image_core.yml2
1 files changed, 1 insertions, 1 deletions
diff --git a/fpga/usrp3/top/e31x/e31x_rfnoc_image_core.yml b/fpga/usrp3/top/e31x/e31x_rfnoc_image_core.yml
index 066f7ab0e..aa464454e 100644
--- a/fpga/usrp3/top/e31x/e31x_rfnoc_image_core.yml
+++ b/fpga/usrp3/top/e31x/e31x_rfnoc_image_core.yml
@@ -6,7 +6,7 @@ license: 'SPDX-License-Identifier: LGPL-3.0-or-later' # License information used
version: 1.0 # File version
rfnoc_version: 1.0 # RFNoC protocol version
chdr_width: 64 # Bit width of the CHDR bus for this image
-device: 'e31x'
+device: 'e310'
default_target: 'E310_SG3'
# A list of all stream endpoints in design