diff options
Diffstat (limited to 'fpga/usrp3/top/x300/Makefile.x300.inc')
| -rw-r--r-- | fpga/usrp3/top/x300/Makefile.x300.inc | 3 |
1 files changed, 2 insertions, 1 deletions
diff --git a/fpga/usrp3/top/x300/Makefile.x300.inc b/fpga/usrp3/top/x300/Makefile.x300.inc index 1f18cbf02..1664869b2 100644 --- a/fpga/usrp3/top/x300/Makefile.x300.inc +++ b/fpga/usrp3/top/x300/Makefile.x300.inc @@ -114,13 +114,14 @@ $(RFNOC_BLOCK_REPLAY_SRCS) \ $(RFNOC_OOT_SRCS) EDGE_TBL_DEF="RFNOC_EDGE_TBL_FILE=$(call RESOLVE_PATH,$(EDGE_FILE))" +IMAGE_CORE_DEF="RFNOC_IMAGE_CORE_HDR=$(DEFAULT_RFNOC_IMAGE_CORE_FILE:.v=.vh)" ################################################## # Dependency Targets ################################################## .SECONDEXPANSION: -VERILOG_DEFS=$(EXTRA_DEFS) $(CUSTOM_DEFS) $(GIT_HASH_VERILOG_DEF) $(EDGE_TBL_DEF) +VERILOG_DEFS=$(EXTRA_DEFS) $(CUSTOM_DEFS) $(GIT_HASH_VERILOG_DEF) $(EDGE_TBL_DEF) $(IMAGE_CORE_DEF) # DESIGN_SRCS and VERILOG_DEFS must be defined bin: .prereqs $$(DESIGN_SRCS) ip |