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-rw-r--r--fpga/usrp3/top/e320/e320.v6
1 files changed, 5 insertions, 1 deletions
diff --git a/fpga/usrp3/top/e320/e320.v b/fpga/usrp3/top/e320/e320.v
index 873677c06..501f6a06d 100644
--- a/fpga/usrp3/top/e320/e320.v
+++ b/fpga/usrp3/top/e320/e320.v
@@ -156,7 +156,8 @@ module e320 (
output wire XCVR_TXNRX,
output wire XCVR_ENA_AGC,
output wire XCVR_RESET_N,
- input wire [7:0] XCVR_CTRL_OUT,
+ input wire [7:0] XCVR_CTRL_OUT,
+ output wire [3:0] XCVR_CTRL_IN,
// Amplifiers
output wire TX_HFAMP1_ENA,
@@ -1844,5 +1845,8 @@ module e320 (
.device_id(device_id)
);
+ // Control pins to AD9361 will lay low for now
+ assign XCVR_CTRL_IN = 4'h0;
+
endmodule // e320
`default_nettype wire