diff options
Diffstat (limited to 'fpga/usrp3/top/e31x/e31x.v')
| -rw-r--r-- | fpga/usrp3/top/e31x/e31x.v | 150 |
1 files changed, 134 insertions, 16 deletions
diff --git a/fpga/usrp3/top/e31x/e31x.v b/fpga/usrp3/top/e31x/e31x.v index 3902ed551..7f0d159a6 100644 --- a/fpga/usrp3/top/e31x/e31x.v +++ b/fpga/usrp3/top/e31x/e31x.v @@ -168,6 +168,22 @@ module e31x ( wire clk40_rstn; wire FCLK_RESET0_N; + //ETH DMA + wire m_axi_eth_internal_arvalid; + wire m_axi_eth_internal_awvalid; + wire m_axi_eth_internal_bready; + wire m_axi_eth_internal_rready; + wire m_axi_eth_internal_wvalid; + wire [31:0] m_axi_eth_internal_araddr; + wire [31:0] m_axi_eth_internal_awaddr; + wire [31:0] m_axi_eth_internal_wdata; + wire [3:0] m_axi_eth_internal_wstrb; + wire m_axi_eth_internal_rvalid; + wire m_axi_eth_internal_wready; + wire [1:0] m_axi_eth_internal_bresp; + wire [1:0] m_axi_eth_internal_rresp; + wire [31:0] m_axi_eth_internal_rdata; + // Crossbar wire m_axi_xbar_arvalid; wire m_axi_xbar_awvalid; @@ -212,15 +228,25 @@ module e31x ( wire [3:0] m_axi_pmu_wstrb; wire m_axi_pmu_wvalid; - // DMA xport adapter to PS + // Internal Ethernet xport adapter to PS + wire [63:0] h2e_tdata; + wire [7:0] h2e_tkeep; + wire h2e_tlast; + wire h2e_tready; + wire h2e_tvalid; + + wire [63:0] e2h_tdata; + wire [7:0] e2h_tkeep; + wire e2h_tlast; + wire e2h_tready; + wire e2h_tvalid; + wire [63:0] m_axis_dma_tdata; - wire [3:0] m_axis_dma_tuser; wire m_axis_dma_tlast; wire m_axis_dma_tready; wire m_axis_dma_tvalid; wire [63:0] s_axis_dma_tdata; - wire [3:0] s_axis_dma_tdest; wire s_axis_dma_tlast; wire s_axis_dma_tready; wire s_axis_dma_tvalid; @@ -356,6 +382,79 @@ module e31x ( ///////////////////////////////////////////////////////////////////// // + // Internal Ethernet Interface + // + ////////////////////////////////////////////////////////////////////// + eth_internal #( + .DWIDTH(REG_DWIDTH), + .AWIDTH(REG_AWIDTH), + .PORTNUM(8'd1) + ) eth_internal_i ( + // Resets + .bus_rst (bus_rst), + + // Clocks + .bus_clk (bus_clk), + + //Axi-lite + .s_axi_aclk (clk40), + .s_axi_aresetn (clk40_rstn), + .s_axi_awaddr (m_axi_eth_internal_awaddr), + .s_axi_awvalid (m_axi_eth_internal_awvalid), + .s_axi_awready (m_axi_eth_internal_awready), + + .s_axi_wdata (m_axi_eth_internal_wdata), + .s_axi_wstrb (m_axi_eth_internal_wstrb), + .s_axi_wvalid (m_axi_eth_internal_wvalid), + .s_axi_wready (m_axi_eth_internal_wready), + + .s_axi_bresp (m_axi_eth_internal_bresp), + .s_axi_bvalid (m_axi_eth_internal_bvalid), + .s_axi_bready (m_axi_eth_internal_bready), + + .s_axi_araddr (m_axi_eth_internal_araddr), + .s_axi_arvalid (m_axi_eth_internal_arvalid), + .s_axi_arready (m_axi_eth_internal_arready), + + .s_axi_rdata (m_axi_eth_internal_rdata), + .s_axi_rresp (m_axi_eth_internal_rresp), + .s_axi_rvalid (m_axi_eth_internal_rvalid), + .s_axi_rready (m_axi_eth_internal_rready), + + // Host-Ethernet DMA interface + .e2h_tdata (e2h_tdata), + .e2h_tkeep (e2h_tkeep), + .e2h_tlast (e2h_tlast), + .e2h_tvalid (e2h_tvalid), + .e2h_tready (e2h_tready), + + .h2e_tdata (h2e_tdata), + .h2e_tkeep (h2e_tkeep), + .h2e_tlast (h2e_tlast), + .h2e_tvalid (h2e_tvalid), + .h2e_tready (h2e_tready), + + // Vita router interface + .e2v_tdata (m_axis_dma_tdata), + .e2v_tlast (m_axis_dma_tlast), + .e2v_tvalid (m_axis_dma_tvalid), + .e2v_tready (m_axis_dma_tready), + + .v2e_tdata (s_axis_dma_tdata), + .v2e_tlast (s_axis_dma_tlast), + .v2e_tvalid (s_axis_dma_tvalid), + .v2e_tready (s_axis_dma_tready), + + // MISC + .port_info (), + .device_id (device_id), + + .link_up (), + .activity () + ); + + ///////////////////////////////////////////////////////////////////// + // // PS Connections // ////////////////////////////////////////////////////////////////////// @@ -440,6 +539,27 @@ module e31x ( .SPI1_SS_O(), .SPI1_SS_T(), + // Ethernet DMA engines + .m_axi_eth_internal_araddr(m_axi_eth_internal_araddr), + .m_axi_eth_internal_arprot(), + .m_axi_eth_internal_arready(m_axi_eth_internal_arready), + .m_axi_eth_internal_arvalid(m_axi_eth_internal_arvalid), + .m_axi_eth_internal_awaddr(m_axi_eth_internal_awaddr), + .m_axi_eth_internal_awprot(), + .m_axi_eth_internal_awready(m_axi_eth_internal_awready), + .m_axi_eth_internal_awvalid(m_axi_eth_internal_awvalid), + .m_axi_eth_internal_bready(m_axi_eth_internal_bready), + .m_axi_eth_internal_bresp(m_axi_eth_internal_bresp), + .m_axi_eth_internal_bvalid(m_axi_eth_internal_bvalid), + .m_axi_eth_internal_rdata(m_axi_eth_internal_rdata), + .m_axi_eth_internal_rready(m_axi_eth_internal_rready), + .m_axi_eth_internal_rresp(m_axi_eth_internal_rresp), + .m_axi_eth_internal_rvalid(m_axi_eth_internal_rvalid), + .m_axi_eth_internal_wdata(m_axi_eth_internal_wdata), + .m_axi_eth_internal_wready(m_axi_eth_internal_wready), + .m_axi_eth_internal_wstrb(m_axi_eth_internal_wstrb), + .m_axi_eth_internal_wvalid(m_axi_eth_internal_wvalid), + // USB .USBIND_0_port_indctl(), .USBIND_0_vbus_pwrfault(), @@ -495,16 +615,16 @@ module e31x ( .m_axi_pmu_wvalid(m_axi_pmu_wvalid), // DMA - .s_axis_dma_tdata(s_axis_dma_tdata), - .s_axis_dma_tdest(s_axis_dma_tdest), - .s_axis_dma_tlast(s_axis_dma_tlast), - .s_axis_dma_tready(s_axis_dma_tready), - .s_axis_dma_tvalid(s_axis_dma_tvalid), - .m_axis_dma_tdata(m_axis_dma_tdata), - .m_axis_dma_tuser(m_axis_dma_tuser), - .m_axis_dma_tlast(m_axis_dma_tlast), - .m_axis_dma_tready(m_axis_dma_tready), - .m_axis_dma_tvalid(m_axis_dma_tvalid) + .s_axis_dma_tdata(e2h_tdata), + .s_axis_dma_tkeep(e2h_tkeep), + .s_axis_dma_tlast(e2h_tlast), + .s_axis_dma_tready(e2h_tready), + .s_axis_dma_tvalid(e2h_tvalid), + .m_axis_dma_tdata(h2e_tdata), + .m_axis_dma_tkeep(h2e_tkeep), + .m_axis_dma_tlast(h2e_tlast), + .m_axis_dma_tready(h2e_tready), + .m_axis_dma_tvalid(h2e_tvalid) ); ///////////////////////////////////////////////////////////////////// @@ -787,15 +907,13 @@ module e31x ( .rx(rx_flat), .tx(tx_flat), - // DMA to PS + // Internal DMA to PS .m_dma_tdata(s_axis_dma_tdata), - .m_dma_tdest(s_axis_dma_tdest), .m_dma_tlast(s_axis_dma_tlast), .m_dma_tready(s_axis_dma_tready), .m_dma_tvalid(s_axis_dma_tvalid), .s_dma_tdata(m_axis_dma_tdata), - .s_dma_tuser(m_axis_dma_tuser), .s_dma_tlast(m_axis_dma_tlast), .s_dma_tready(m_axis_dma_tready), .s_dma_tvalid(m_axis_dma_tvalid), |