diff options
Diffstat (limited to 'fpga/usrp3/top/e31x/Makefile.e31x.inc')
| -rw-r--r-- | fpga/usrp3/top/e31x/Makefile.e31x.inc | 3 |
1 files changed, 2 insertions, 1 deletions
diff --git a/fpga/usrp3/top/e31x/Makefile.e31x.inc b/fpga/usrp3/top/e31x/Makefile.e31x.inc index 4e017ca0c..871dd5318 100644 --- a/fpga/usrp3/top/e31x/Makefile.e31x.inc +++ b/fpga/usrp3/top/e31x/Makefile.e31x.inc @@ -107,13 +107,14 @@ $(RFNOC_BLOCK_EXAMPLE_SRCS) \ $(abspath $(MB_XDC)) EDGE_TBL_DEF="RFNOC_EDGE_TBL_FILE=$(call RESOLVE_PATH,$(EDGE_FILE))" +IMAGE_CORE_DEF="RFNOC_IMAGE_CORE_HDR=$(call RESOLVE_PATH,$(IMAGE_CORE:.v=.vh))" ################################################## # Dependency Targets ################################################## .SECONDEXPANSION: -VERILOG_DEFS=$(EXTRA_DEFS) $(CUSTOM_DEFS) $(GIT_HASH_VERILOG_DEF) $(EDGE_TBL_DEF) +VERILOG_DEFS=$(EXTRA_DEFS) $(CUSTOM_DEFS) $(GIT_HASH_VERILOG_DEF) $(EDGE_TBL_DEF) $(IMAGE_CORE_DEF) # DESIGN_SRCS and VERILOG_DEFS must be defined bin: .prereqs $$(DESIGN_SRCS) ip |