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-rw-r--r--fpga/usrp3/tools/make/viv_sim_preamble.mak2
1 files changed, 2 insertions, 0 deletions
diff --git a/fpga/usrp3/tools/make/viv_sim_preamble.mak b/fpga/usrp3/tools/make/viv_sim_preamble.mak
index afeca0b3c..514b06a0a 100644
--- a/fpga/usrp3/tools/make/viv_sim_preamble.mak
+++ b/fpga/usrp3/tools/make/viv_sim_preamble.mak
@@ -30,12 +30,14 @@ include $(BASE_DIR)/../sim/general/Makefile.srcs
include $(BASE_DIR)/../sim/axi/Makefile.srcs
include $(BASE_DIR)/../sim/control/Makefile.srcs
include $(BASE_DIR)/../sim/rfnoc/Makefile.srcs
+include $(BASE_DIR)/../sim/packages/Makefile.srcs
INC_SRCS = $(abspath \
$(SIM_GENERAL_SRCS) \
$(SIM_AXI_SRCS) \
$(SIM_CONTROL_SRCS) \
$(SIM_RFNOC_SRCS) \
+$(SIM_PACKAGES_SRCS) \
)
# Predeclare RFNOC_OOT_SRCS to make sure it's not recursively expanded