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-rw-r--r--fpga/usrp3/lib/zynq_fifo/Makefile.srcs15
1 files changed, 15 insertions, 0 deletions
diff --git a/fpga/usrp3/lib/zynq_fifo/Makefile.srcs b/fpga/usrp3/lib/zynq_fifo/Makefile.srcs
new file mode 100644
index 000000000..0a63d1627
--- /dev/null
+++ b/fpga/usrp3/lib/zynq_fifo/Makefile.srcs
@@ -0,0 +1,15 @@
+#
+# Copyright 2012 Ettus Research LLC
+#
+
+##################################################
+# ZYNQ FIFO interface sources
+##################################################
+ZYNQ_FIFO_SRCS = $(abspath $(addprefix $(BASE_DIR)/../lib/zynq_fifo/, \
+zf_arbiter.v \
+zf_stream_to_host.v \
+zf_host_to_stream.v \
+zf_slave_readback.v \
+zf_slave_settings.v \
+zynq_fifo_top.v \
+))