diff options
Diffstat (limited to 'fpga/usrp3/lib/wishbone/i2c_master_defines.v')
| -rw-r--r-- | fpga/usrp3/lib/wishbone/i2c_master_defines.v | 64 |
1 files changed, 0 insertions, 64 deletions
diff --git a/fpga/usrp3/lib/wishbone/i2c_master_defines.v b/fpga/usrp3/lib/wishbone/i2c_master_defines.v deleted file mode 100644 index ee3b694fa..000000000 --- a/fpga/usrp3/lib/wishbone/i2c_master_defines.v +++ /dev/null @@ -1,64 +0,0 @@ -///////////////////////////////////////////////////////////////////// -//// //// -//// WISHBONE rev.B2 compliant I2C Master controller defines //// -//// //// -//// //// -//// Author: Richard Herveille //// -//// richard@asics.ws //// -//// www.asics.ws //// -//// //// -//// Downloaded from: http://www.opencores.org/projects/i2c/ //// -//// //// -///////////////////////////////////////////////////////////////////// -//// //// -//// Copyright (C) 2001 Richard Herveille //// -//// richard@asics.ws //// -//// //// -//// This source file may be used and distributed without //// -//// restriction provided that this copyright statement is not //// -//// removed from the file and that any derivative work contains //// -//// the original copyright notice and the associated disclaimer.//// -//// //// -//// THIS SOFTWARE IS PROVIDED ``AS IS'' AND WITHOUT ANY //// -//// EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED //// -//// TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS //// -//// FOR A PARTICULAR PURPOSE. IN NO EVENT SHALL THE AUTHOR //// -//// OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, //// -//// INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES //// -//// (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE //// -//// GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR //// -//// BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF //// -//// LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT //// -//// (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT //// -//// OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE //// -//// POSSIBILITY OF SUCH DAMAGE. //// -//// //// -///////////////////////////////////////////////////////////////////// - -// CVS Log -// -// $Id: i2c_master_defines.v,v 1.3 2001/11/05 11:59:25 rherveille Exp $ -// -// $Date: 2001/11/05 11:59:25 $ -// $Revision: 1.3 $ -// $Author: rherveille $ -// $Locker: $ -// $State: Exp $ -// -// Change History: -// $Log: i2c_master_defines.v,v $ -// Revision 1.3 2001/11/05 11:59:25 rherveille -// Fixed wb_ack_o generation bug. -// Fixed bug in the byte_controller statemachine. -// Added headers. -// - - -// I2C registers wishbone addresses - -// bitcontroller states -`define I2C_CMD_NOP 4'b0000 -`define I2C_CMD_START 4'b0001 -`define I2C_CMD_STOP 4'b0010 -`define I2C_CMD_WRITE 4'b0100 -`define I2C_CMD_READ 4'b1000 |