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-rw-r--r--fpga/usrp3/lib/wishbone/Makefile.srcs19
1 files changed, 19 insertions, 0 deletions
diff --git a/fpga/usrp3/lib/wishbone/Makefile.srcs b/fpga/usrp3/lib/wishbone/Makefile.srcs
new file mode 100644
index 000000000..6459de834
--- /dev/null
+++ b/fpga/usrp3/lib/wishbone/Makefile.srcs
@@ -0,0 +1,19 @@
+#
+# Copyright 2010-2012 Ettus Research LLC
+#
+
+##################################################
+# Wishbone Perifs
+##################################################
+WISHBONE_SRCS = $(abspath $(addprefix $(BASE_DIR)/../lib/wishbone/, \
+simple_uart_rx.v \
+simple_uart_tx.v \
+simple_uart.v \
+wb_1master.v \
+settings_bus.v \
+settings_readback.v \
+i2c_master_top.v \
+i2c_master_bit_ctrl.v \
+i2c_master_byte_ctrl.v \
+axi_stream_to_wb.v \
+))