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-rw-r--r--fpga/usrp3/lib/simple_gemac/delay_line.v26
1 files changed, 0 insertions, 26 deletions
diff --git a/fpga/usrp3/lib/simple_gemac/delay_line.v b/fpga/usrp3/lib/simple_gemac/delay_line.v
deleted file mode 100644
index 325182f38..000000000
--- a/fpga/usrp3/lib/simple_gemac/delay_line.v
+++ /dev/null
@@ -1,26 +0,0 @@
-//
-// Copyright 2011 Ettus Research LLC
-//
-
-
-
-
-module delay_line
- #(parameter WIDTH=32)
- (input clk,
- input [3:0] delay,
- input [WIDTH-1:0] din,
- output [WIDTH-1:0] dout);
-
- genvar i;
- generate
- for (i=0;i<WIDTH;i=i+1)
- begin : gen_delay
- SRL16E
- srl16e(.Q(dout[i]),
- .A0(delay[0]),.A1(delay[1]),.A2(delay[2]),.A3(delay[3]),
- .CE(1),.CLK(clk),.D(din[i]));
- end
- endgenerate
-
-endmodule // delay_line