diff options
Diffstat (limited to 'fpga/usrp3/lib/sim/arm_deframer/Makefile')
| -rw-r--r-- | fpga/usrp3/lib/sim/arm_deframer/Makefile | 47 |
1 files changed, 47 insertions, 0 deletions
diff --git a/fpga/usrp3/lib/sim/arm_deframer/Makefile b/fpga/usrp3/lib/sim/arm_deframer/Makefile new file mode 100644 index 000000000..eb7231d5e --- /dev/null +++ b/fpga/usrp3/lib/sim/arm_deframer/Makefile @@ -0,0 +1,47 @@ +# +# Copyright 2015 Ettus Research LLC +# + +#------------------------------------------------- +# Top-of-Makefile +#------------------------------------------------- +# Define BASE_DIR to point to the "top" dir +BASE_DIR = $(abspath ../../../top) +# Include viv_sim_preamble after defining BASE_DIR +include $(BASE_DIR)/../tools/make/viv_sim_preamble.mak + +#------------------------------------------------- +# IP Specific +#------------------------------------------------- +# If simulation contains IP, define the IP_DIR and point +# it to the base level IP directory +LIB_IP_DIR = $(BASE_DIR)/../lib/ip + +# Include makefiles and sources for all IP components +# *after* defining the IP_DIR + +DESIGN_SRCS += $(abspath \ +../../packet_proc/arm_deframer.v \ +../../fifo/axi_mux4.v \ +) + +#------------------------------------------------- +# Testbench Specific +#------------------------------------------------- +# Define only one toplevel module +SIM_TOP = arm_deframer_tb + +SIM_SRCS = $(abspath \ +$(SIM_PROTORFNOC_SRCS) \ +arm_deframer_tb.sv \ +) + +MODELSIM_USER_DO = $(abspath wave.do) + +#------------------------------------------------- +# Bottom-of-Makefile +#------------------------------------------------- +# Include all simulator specific makefiles here +# Each should define a unique target to simulate +# e.g. xsim, vsim, etc and a common "clean" target +include $(BASE_DIR)/../tools/make/viv_simulator.mak |