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-rw-r--r--fpga/usrp3/lib/rfnoc/core/ctrlport.vh19
1 files changed, 12 insertions, 7 deletions
diff --git a/fpga/usrp3/lib/rfnoc/core/ctrlport.vh b/fpga/usrp3/lib/rfnoc/core/ctrlport.vh
index 7b5f9fcaa..814cfae26 100644
--- a/fpga/usrp3/lib/rfnoc/core/ctrlport.vh
+++ b/fpga/usrp3/lib/rfnoc/core/ctrlport.vh
@@ -1,21 +1,26 @@
//
-// Copyright 2019 Ettus Research, A National Instruments Company
+// Copyright 2020 Ettus Research, A National Instruments Brand
//
// SPDX-License-Identifier: LGPL-3.0-or-later
//
// Module: ctrlport.vh
+//
// Description:
-// Defines constants for the control port interface.
//
-// Requires rfnoc_axis_ctrl_utils.vh in same directory to be
-// included first.
+// Defines constants for the control port interface. See also
+// rfnoc_axis_ctrl_utils.vh for related AXIS-Ctrl definitions.
+//
//---------------------------------------------------------------
// Signal widths
//---------------------------------------------------------------
-localparam CTRLPORT_ADDR_W = 20;
-localparam CTRLPORT_DATA_W = 32;
-localparam CTRLPORT_STS_W = 2;
+localparam CTRLPORT_ADDR_W = 20;
+localparam CTRLPORT_DATA_W = 32;
+localparam CTRLPORT_STS_W = 2;
+localparam CTRLPORT_PORTID_W = 10;
+localparam CTRLPORT_REM_EPID_W = 16;
+localparam CTRLPORT_BYTE_EN_W = 4;
+localparam CTRLPORT_TIME_W = 64;
//---------------------------------------------------------------
// Status values