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-rw-r--r--fpga/usrp3/lib/rfnoc/cvita_hdr_encoder.v22
1 files changed, 22 insertions, 0 deletions
diff --git a/fpga/usrp3/lib/rfnoc/cvita_hdr_encoder.v b/fpga/usrp3/lib/rfnoc/cvita_hdr_encoder.v
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+++ b/fpga/usrp3/lib/rfnoc/cvita_hdr_encoder.v
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+//
+// Copyright 2016 Ettus Research
+// Copyright 2018 Ettus Research, a National Instruments Company
+//
+// SPDX-License-Identifier: LGPL-3.0-or-later
+//
+// Encodes CVITA packet header fields into a header word
+
+module cvita_hdr_encoder (
+ input [1:0] pkt_type, input eob, input has_time,
+ input [11:0] seqnum,
+ input [15:0] payload_length,
+ input [15:0] src_sid, input [15:0] dst_sid,
+ input [63:0] vita_time,
+ output [127:0] header
+);
+
+ assign header = {pkt_type, has_time, eob, seqnum,
+ payload_length + (has_time ? 16'd16 : 16'd8),
+ src_sid, dst_sid, vita_time};
+
+endmodule