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-rw-r--r--fpga/usrp3/lib/axi4s_sv/Makefile.srcs18
1 files changed, 18 insertions, 0 deletions
diff --git a/fpga/usrp3/lib/axi4s_sv/Makefile.srcs b/fpga/usrp3/lib/axi4s_sv/Makefile.srcs
new file mode 100644
index 000000000..b86de5b41
--- /dev/null
+++ b/fpga/usrp3/lib/axi4s_sv/Makefile.srcs
@@ -0,0 +1,18 @@
+#
+# Copyright 2020 Ettus Research, A National Instruments Brand
+#
+# SPDX-License-Identifier: LGPL-3.0-or-later
+#
+
+##################################################
+# RFNoC Utility Sources
+##################################################
+AXI4S_SV_SRCS = $(abspath $(addprefix $(BASE_DIR)/../lib/axi4s_sv/, \
+AxiStreamIf.sv \
+axi4s_remove_bytes.sv \
+axi4s_remove_bytes_start.sv \
+axi4s_add_bytes.sv \
+axi4s_fifo.sv \
+axi4s_packet_gate.sv \
+axi4s_width_conv.sv \
+))