aboutsummaryrefslogtreecommitdiffstats
path: root/fpga/usrp2/vrt/vita_rx.build
diff options
context:
space:
mode:
Diffstat (limited to 'fpga/usrp2/vrt/vita_rx.build')
-rwxr-xr-xfpga/usrp2/vrt/vita_rx.build1
1 files changed, 1 insertions, 0 deletions
diff --git a/fpga/usrp2/vrt/vita_rx.build b/fpga/usrp2/vrt/vita_rx.build
new file mode 100755
index 000000000..f6d2d75a3
--- /dev/null
+++ b/fpga/usrp2/vrt/vita_rx.build
@@ -0,0 +1 @@
+iverilog -Wimplict -Wportbind -y ../models -y . -y ../control_lib/ -y ../control_lib/newfifo -y ../coregen -y /opt/Xilinx/10.1/ISE/verilog/src/XilinxCoreLib -y /opt/Xilinx/10.1/ISE/verilog/src/unisims/ -y ../timing -o vita_rx_tb vita_rx_tb.v