4 files changed, 23 insertions, 6 deletions
diff --git a/fpga/usrp2/top/B100/u1plus_core.v b/fpga/usrp2/top/B100/u1plus_core.v
index 9fe09c60e..7f137f0d1 100644
--- a/fpga/usrp2/top/B100/u1plus_core.v
+++ b/fpga/usrp2/top/B100/u1plus_core.v
@@ -1,5 +1,5 @@
 //
-// Copyright 2011-2012 Ettus Research LLC
+// Copyright 2011-2013 Ettus Research LLC
 //
 // This program is free software: you can redistribute it and/or modify
 // it under the terms of the GNU General Public License as published by
@@ -71,7 +71,7 @@ module u1plus_core
     localparam SR_GPIO         = 224;     // 5
 
     //compatibility number -> increment when the fpga has been sufficiently altered
-    localparam compat_num = {16'd11, 16'd3}; //major, minor
+    localparam compat_num = {16'd11, 16'd4}; //major, minor
 
     //assign run signals used for ATR logic
     wire [NUM_RX_DSPS-1:0] run_rx_n;
diff --git a/fpga/usrp2/top/N2x0/u2plus_core.v b/fpga/usrp2/top/N2x0/u2plus_core.v
index e2539e183..f616681d2 100644
--- a/fpga/usrp2/top/N2x0/u2plus_core.v
+++ b/fpga/usrp2/top/N2x0/u2plus_core.v
@@ -1,5 +1,5 @@
 //
-// Copyright 2011-2012 Ettus Research LLC
+// Copyright 2011-2013 Ettus Research LLC
 //
 // This program is free software: you can redistribute it and/or modify
 // it under the terms of the GNU General Public License as published by
@@ -448,7 +448,7 @@ module u2plus_core
    // Buffer Pool Status -- Slave #5   
    
    //compatibility number -> increment when the fpga has been sufficiently altered
-   localparam compat_num = {16'd10, 16'd0}; //major, minor
+   localparam compat_num = {16'd10, 16'd1}; //major, minor
 
    wire [31:0] irq_readback = {18'b0, button, spi_ready, clk_status, serdes_link_up, 10'b0};
 
diff --git a/fpga/usrp2/top/USRP2/u2_core.v b/fpga/usrp2/top/USRP2/u2_core.v
index d8fe8cf10..aed69a9bd 100644
--- a/fpga/usrp2/top/USRP2/u2_core.v
+++ b/fpga/usrp2/top/USRP2/u2_core.v
@@ -1,5 +1,5 @@
 //
-// Copyright 2011-2012 Ettus Research LLC
+// Copyright 2011-2013 Ettus Research LLC
 //
 // This program is free software: you can redistribute it and/or modify
 // it under the terms of the GNU General Public License as published by
@@ -456,7 +456,7 @@ module u2_core
    // Buffer Pool Status -- Slave #5   
    
    //compatibility number -> increment when the fpga has been sufficiently altered
-   localparam compat_num = {16'd10, 16'd0}; //major, minor
+   localparam compat_num = {16'd10, 16'd1}; //major, minor
 
    wire [31:0] irq_readback = {19'b0, spi_ready, clk_status, serdes_link_up, 10'b0};
 
diff --git a/fpga/usrp2/top/impactor.sh b/fpga/usrp2/top/impactor.sh
new file mode 100755
index 000000000..c6699424d
--- /dev/null
+++ b/fpga/usrp2/top/impactor.sh
@@ -0,0 +1,17 @@
+#!/bin/bash
+
+echo "loading $1 into FPGA..."
+
+CMD_PATH=/tmp/impact.cmd
+
+echo "generating ${CMD_PATH}..."
+
+echo "setmode -bscan" > ${CMD_PATH}
+echo "setcable -p auto" >> ${CMD_PATH}
+echo "addDevice -p 1 -file $1" >> ${CMD_PATH}
+echo "program -p 1" >> ${CMD_PATH}
+echo "quit" >> ${CMD_PATH}
+
+impact -batch ${CMD_PATH}
+
+echo "done!"