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-rw-r--r--fpga/usrp2/top/u1e/u1e_core.v2
1 files changed, 1 insertions, 1 deletions
diff --git a/fpga/usrp2/top/u1e/u1e_core.v b/fpga/usrp2/top/u1e/u1e_core.v
index 8e6d74edf..d10a3ab30 100644
--- a/fpga/usrp2/top/u1e/u1e_core.v
+++ b/fpga/usrp2/top/u1e/u1e_core.v
@@ -36,7 +36,7 @@ module u1e_core
localparam SR_GLOBAL_RESET = 50; // 1 reg
localparam SR_REG_TEST32 = 52; // 1 reg
- wire [7:0] COMPAT_NUM = 8'd3;
+ wire [7:0] COMPAT_NUM = 8'd4;
wire wb_clk = clk_fpga;
wire wb_rst, global_reset;