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-rw-r--r--fpga/usrp2/top/USRP2/u2_core.v2
1 files changed, 1 insertions, 1 deletions
diff --git a/fpga/usrp2/top/USRP2/u2_core.v b/fpga/usrp2/top/USRP2/u2_core.v
index 6bf60fe58..93064254f 100644
--- a/fpga/usrp2/top/USRP2/u2_core.v
+++ b/fpga/usrp2/top/USRP2/u2_core.v
@@ -442,7 +442,7 @@ module u2_core
// Buffer Pool Status -- Slave #5
//compatibility number -> increment when the fpga has been sufficiently altered
- localparam compat_num = {16'd9, 16'd0}; //major, minor
+ localparam compat_num = {16'd9, 16'd1}; //major, minor
wire [31:0] churn = 0; //tweak churn until timing meets!
wb_readback_mux buff_pool_status