diff options
Diffstat (limited to 'fpga/usrp2/top/E1x0/timing.ucf')
| -rw-r--r-- | fpga/usrp2/top/E1x0/timing.ucf | 23 |
1 files changed, 23 insertions, 0 deletions
diff --git a/fpga/usrp2/top/E1x0/timing.ucf b/fpga/usrp2/top/E1x0/timing.ucf new file mode 100644 index 000000000..6bd559426 --- /dev/null +++ b/fpga/usrp2/top/E1x0/timing.ucf @@ -0,0 +1,23 @@ + +NET "CLK_FPGA_P" TNM_NET = "CLK_FPGA_P"; +TIMESPEC "TS_clk_fpga_p" = PERIOD "CLK_FPGA_P" 15625 ps HIGH 50 %; + +NET "EM_CLK" TNM_NET = "EM_CLK"; +TIMESPEC "TS_em_clk" = PERIOD "EM_CLK" 18867 ps HIGH 50 %; + +#constrain GPMC IO +INST "EM_D<*>" TNM = gpmc_net_out; +INST "EM_D<*>" TNM = gpmc_net; +INST "EM_A<*>" TNM = gpmc_net; +INST "EM_NCS4" TNM = gpmc_net; +INST "EM_NCS6" TNM = gpmc_net; +INST "EM_NWE" TNM = gpmc_net; +INST "EM_NOE" TNM = gpmc_net; + +TIMEGRP "gpmc_net" OFFSET = IN 7 ns VALID 14 ns BEFORE "EM_CLK" FALLING; +TIMEGRP "gpmc_net_out" OFFSET = OUT 14 ns AFTER "EM_CLK" RISING; //2 clock cyc per read + +#constrain interrupt lines +NET "overo_gpio144" MAXDELAY = 5.5 ns; #have space +NET "overo_gpio146" MAXDELAY = 5.5 ns; #have data +NET "overo_gpio147" MAXDELAY = 5.5 ns; #have msg/aux spi miso |