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-rw-r--r--fpga/usrp2/top/E1x0/cmdfile20
1 files changed, 0 insertions, 20 deletions
diff --git a/fpga/usrp2/top/E1x0/cmdfile b/fpga/usrp2/top/E1x0/cmdfile
deleted file mode 100644
index 291c723b8..000000000
--- a/fpga/usrp2/top/E1x0/cmdfile
+++ /dev/null
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-
-# My stuff
--y .
--y ../../control_lib
--y ../../control_lib/newfifo
--y ../../sdr_lib
--y ../../timing
--y ../../coregen
--y ../../gpmc
-
-# Models
--y ../../models
--y /opt/Xilinx/10.1/ISE/verilog/src/unisims
-
-# Open Cores
--y ../../opencores/spi/rtl/verilog
-+incdir+../../opencores/spi/rtl/verilog
--y ../../opencores/i2c/rtl/verilog
-+incdir+../../opencores/i2c/rtl/verilog
-