4 files changed, 47 insertions, 0 deletions

diff --git a/fpga/usrp2/testbench/.gitignore b/fpga/usrp2/testbench/.gitignore
new file mode 100644
index 000000000..eedcf9652
--- /dev/null
+++ b/fpga/usrp2/testbench/.gitignore
@@ -0,0 +1,5 @@
+/single_u2_sim
+/dual_u2_sim
+/*.lxt
+/*.vcd
+/*.sav
diff --git a/fpga/usrp2/testbench/Makefile b/fpga/usrp2/testbench/Makefile
new file mode 100644
index 000000000..6032a0123
--- /dev/null
+++ b/fpga/usrp2/testbench/Makefile
@@ -0,0 +1,10 @@
+all: single dual
+
+single:	
+	iverilog -Wimplicit -Wportbind -c cmdfile ../top/single_u2_sim/single_u2_sim.v -o single_u2_sim
+
+dual:	
+	iverilog -Wimplicit -Wportbind -c cmdfile ../top/dual_u2_sim/dual_u2_sim.v -o dual_u2_sim
+
+clean:
+	rm -f single_u2_sim dual_u2_sim *.vcd *.lxt
diff --git a/fpga/usrp2/testbench/README b/fpga/usrp2/testbench/README
new file mode 100644
index 000000000..14bbb68bb
--- /dev/null
+++ b/fpga/usrp2/testbench/README
@@ -0,0 +1,5 @@
+The path to happiness:
+
+make clean
+make
+./u2_sim +rom=../../firmware/eth_test.rom -lxt2
diff --git a/fpga/usrp2/testbench/cmdfile b/fpga/usrp2/testbench/cmdfile
new file mode 100644
index 000000000..8083eb92a
--- /dev/null
+++ b/fpga/usrp2/testbench/cmdfile
@@ -0,0 +1,27 @@
+
+# My stuff
+-y .
+-y ../top/u2_core
+-y ../control_lib
+-y ../control_lib/newfifo
+-y ../serdes
+-y ../sdr_lib
+-y ../timing
+-y ../coregen
+-y ../extram
+-y ../simple_gemac
+-y ../simple_gemac/miim
+
+# Models
+-y ../models
+-y ../models/CY7C1356C
+
+# Open Cores
+-y ../opencores/8b10b
+-y ../opencores/spi/rtl/verilog
++incdir+../opencores/spi/rtl/verilog
+-y ../opencores/i2c/rtl/verilog
++incdir+../opencores/i2c/rtl/verilog
+-y ../opencores/aemb/rtl/verilog
+-y ../opencores/simple_pic/rtl
+