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-rw-r--r--fpga/usrp2/sdr_lib/Makefile.srcs39
1 files changed, 39 insertions, 0 deletions
diff --git a/fpga/usrp2/sdr_lib/Makefile.srcs b/fpga/usrp2/sdr_lib/Makefile.srcs
new file mode 100644
index 000000000..defbced17
--- /dev/null
+++ b/fpga/usrp2/sdr_lib/Makefile.srcs
@@ -0,0 +1,39 @@
+#
+# Copyright 2010 Ettus Research LLC
+#
+
+##################################################
+# FIFO Sources
+##################################################
+SDR_LIB_SRCS = $(abspath $(addprefix $(BASE_DIR)/../sdr_lib/, \
+acc.v \
+add2.v \
+add2_and_clip.v \
+add2_and_clip_reg.v \
+add2_and_round.v \
+add2_and_round_reg.v \
+add2_reg.v \
+cic_dec_shifter.v \
+cic_decim.v \
+cic_int_shifter.v \
+cic_interp.v \
+cic_strober.v \
+clip.v \
+clip_reg.v \
+cordic.v \
+cordic_z24.v \
+cordic_stage.v \
+dsp_core_rx.v \
+dsp_core_tx.v \
+hb_dec.v \
+hb_interp.v \
+round.v \
+round_reg.v \
+round_sd.v \
+rx_dcoffset.v \
+rx_frontend.v \
+sign_extend.v \
+small_hb_dec.v \
+small_hb_int.v \
+tx_frontend.v \
+))