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-rw-r--r--fpga/usrp2/opencores/Makefile.srcs8
1 files changed, 8 insertions, 0 deletions
diff --git a/fpga/usrp2/opencores/Makefile.srcs b/fpga/usrp2/opencores/Makefile.srcs
index 284578b39..838b1b813 100644
--- a/fpga/usrp2/opencores/Makefile.srcs
+++ b/fpga/usrp2/opencores/Makefile.srcs
@@ -25,4 +25,12 @@ spi/rtl/verilog/spi_defines.v \
spi/rtl/verilog/spi_shift.v \
spi/rtl/verilog/spi_top.v \
spi/rtl/verilog/spi_top16.v \
+zpu/zpu_top_pkg.vhd \
+zpu/zpu_wb_top.vhd \
+zpu/wishbone/wishbone_pkg.vhd \
+zpu/wishbone/zpu_system.vhd \
+zpu/wishbone/zpu_wb_bridge.vhd \
+zpu/core/zpu_config.vhd \
+zpu/core/zpu_core.vhd \
+zpu/core/zpupkg.vhd \
))