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-rw-r--r--fpga/usrp2/opencores/Makefile.srcs3
1 files changed, 1 insertions, 2 deletions
diff --git a/fpga/usrp2/opencores/Makefile.srcs b/fpga/usrp2/opencores/Makefile.srcs
index 30360a17d..1ccecf337 100644
--- a/fpga/usrp2/opencores/Makefile.srcs
+++ b/fpga/usrp2/opencores/Makefile.srcs
@@ -23,6 +23,5 @@ i2c/rtl/verilog/timescale.v \
spi/rtl/verilog/spi_clgen.v \
spi/rtl/verilog/spi_defines.v \
spi/rtl/verilog/spi_shift.v \
-spi/rtl/verilog/spi_top.v \
-spi/rtl/verilog/timescale.v \
+spi/rtl/verilog/spi_top16.v \
))