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-rw-r--r--fpga/usrp2/models/CY7C1356C/testbench.v17
1 files changed, 17 insertions, 0 deletions
diff --git a/fpga/usrp2/models/CY7C1356C/testbench.v b/fpga/usrp2/models/CY7C1356C/testbench.v
index 5dde89e6c..01e0cbe00 100644
--- a/fpga/usrp2/models/CY7C1356C/testbench.v
+++ b/fpga/usrp2/models/CY7C1356C/testbench.v
@@ -1,3 +1,20 @@
+//
+// Copyright 2011 Ettus Research LLC
+//
+// This program is free software: you can redistribute it and/or modify
+// it under the terms of the GNU General Public License as published by
+// the Free Software Foundation, either version 3 of the License, or
+// (at your option) any later version.
+//
+// This program is distributed in the hope that it will be useful,
+// but WITHOUT ANY WARRANTY; without even the implied warranty of
+// MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+// GNU General Public License for more details.
+//
+// You should have received a copy of the GNU General Public License
+// along with this program. If not, see <http://www.gnu.org/licenses/>.
+//
+
`timescale 1ns / 10ps