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-rw-r--r--fpga/usrp2/gpmc/fifo_watcher.v7
1 files changed, 2 insertions, 5 deletions
diff --git a/fpga/usrp2/gpmc/fifo_watcher.v b/fpga/usrp2/gpmc/fifo_watcher.v
index 3971e3c54..b139f5143 100644
--- a/fpga/usrp2/gpmc/fifo_watcher.v
+++ b/fpga/usrp2/gpmc/fifo_watcher.v
@@ -30,11 +30,10 @@ module fifo_watcher
reg [15:0] counter;
wire [4:0] pkt_count;
assign debug = pkt_count;
- wire space;
fifo_short #(.WIDTH(16)) frame_lengths
(.clk(clk), .reset(reset), .clear(clear),
- .datain(counter), .src_rdy_i(write), .dst_rdy_o(space),
+ .datain(counter), .src_rdy_i(write), .dst_rdy_o(),
.dataout(length), .src_rdy_o(have_packet_int), .dst_rdy_i(read),
.occupied(pkt_count), .space());
@@ -54,9 +53,7 @@ module fifo_watcher
bus_error <= 1;
else if(read & ~have_packet_int)
bus_error <= 1;
- else if(write & ~space)
- bus_error <= 1;
-
+
reg in_packet;
always @(posedge clk)
if(reset | clear)