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-rw-r--r--fpga/usrp2/fifo/Makefile.srcs25
1 files changed, 25 insertions, 0 deletions
diff --git a/fpga/usrp2/fifo/Makefile.srcs b/fpga/usrp2/fifo/Makefile.srcs
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+++ b/fpga/usrp2/fifo/Makefile.srcs
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+#
+# Copyright 2010 Ettus Research LLC
+#
+
+##################################################
+# FIFO Sources
+##################################################
+FIFO_SRCS = $(abspath $(addprefix $(BASE_DIR)/../fifo/, \
+buffer_int.v \
+buffer_pool.v \
+fifo_2clock.v \
+fifo_2clock_cascade.v \
+ll8_shortfifo.v \
+fifo_short.v \
+fifo_long.v \
+fifo_cascade.v \
+fifo36_to_ll8.v \
+ll8_to_fifo36.v \
+fifo19_to_ll8.v \
+ll8_to_fifo19.v \
+fifo36_to_fifo19.v \
+fifo19_to_fifo36.v \
+fifo36_mux.v \
+fifo36_demux.v \
+))